| * Copyright (C) 2007,2008 |
| * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| * SPDX-License-Identifier: GPL-2.0+ |
| #include <asm/processor.h> |
| puts("BOARD: Renesas Solutions R2D Plus\n"); |
| int board_late_init(void) |
| #define FPGA_BASE 0xA4000000 |
| #define FPGA_CFCTL (FPGA_BASE + 0x04) |
| #define FPGA_CFPOW (FPGA_BASE + 0x06) |
| #define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A) |
| #define CFCDINTCLR_EN (0x01) |
| void ide_set_reset(int idereset) |
| /* if reset = 1 IDE reset will be asserted */ |
| outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */ |
| outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */ |
| outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */ |
| static struct pci_controller hose; |
| void pci_init_board(void) |
| int board_eth_init(bd_t *bis) |
| return pci_eth_init(bis); |