| * Copyright (C) 2020 Intel Corporation. All rights reserved |
| * SPDX-License-Identifier: GPL-2.0 |
| #include <linux/linkage.h> |
| mov x29, lr /* Save LR */ |
| #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) |
| #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) |
| ldr x4, =CPU_RELEASE_ADDR |
| branch_if_slave x0, wait_for_atf |
| #if defined(CONFIG_GICV3) |
| bl gic_init_secure_percpu |
| #elif defined(CONFIG_GICV2) |
| bl gic_init_secure_percpu |
| #ifdef CONFIG_ARMV8_MULTIENTRY |
| * Slave should wait for master clearing spin table. |
| * This sync prevent slaves observing incorrect |
| * value of spin table and jumping to wrong place. |
| #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) |
| bl gic_wait_for_interrupt |
| * All slaves will enter EL2 and optionally EL1. |
| #ifdef CONFIG_ARMV8_SWITCH_TO_EL1 |
| #endif /* CONFIG_ARMV8_MULTIENTRY */ |
| mov lr, x29 /* Restore LR */ |