| * Copyright 2015 Freescale Semiconductor, Inc. |
| * SPDX-License-Identifier: GPL-2.0+ |
| extern void erratum_a008850_post(void); |
| struct board_specific_parameters { |
| * These tables contain all valid speeds we want to override with board |
| * specific parameters. datarate_mhz_high values need to be in ascending order |
| * for each n_ranks group. |
| static const struct board_specific_parameters udimm0[] = { |
| * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T |
| * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay | |
| #ifdef CONFIG_SYS_FSL_DDR4 |
| {1, 1666, 0, 12, 7, 0x07090800, 0x00000000,}, |
| {1, 1900, 0, 12, 7, 0x07090800, 0x00000000,}, |
| {1, 2200, 0, 12, 7, 0x07090800, 0x00000000,}, |
| static const struct board_specific_parameters *udimms[] = { |