| // SPDX-License-Identifier: GPL-2.0 |
| * Copyright (C) 2022 MediaTek Inc. |
| * Author: Sam Shih <sam.shih@mediatek.com> |
| #include <asm/armv8/mmu.h> |
| #include <asm/global_data.h> |
| #define SZ_8G _AC(0x200000000, ULL) |
| ret = fdtdec_setup_mem_size_base(); |
| gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_8G); |
| int dram_init_banksize(void) |
| gd->bd->bi_dram[0].start = gd->ram_base; |
| gd->bd->bi_dram[0].size = gd->ram_size; |
| void reset_cpu(ulong addr) |
| static struct mm_region mt7988_mem_map[] = { |
| .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE, |
| .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| struct mm_region *mem_map = mt7988_mem_map; |