| commit | 75fafac22ad389c9f1953221002bd210a40b11ab | [log] [tgz] |
|---|---|---|
| author | Michal Simek <michal.simek@xilinx.com> | Thu Mar 13 13:07:57 2014 +0100 |
| committer | Michal Simek <michal.simek@xilinx.com> | Tue May 13 09:13:59 2014 +0200 |
| tree | 23c759ab37c1368763488a5548813231cfa1d3d0 | |
| parent | b4079cf38cd4c65775916fc38ac68441df25605c [diff] |
fpga: xilinx: Simplify load/dump/info function handling Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com>