board/compulab/imx8mm-cl-iot-gate/ddr/Makefile - filogic/uboot - Gitiles

 obj-y += ddr.o
 obj-y += lpddr4_timing_ff020008.o
 obj-y += lpddr4_timing_ff000110.o
 obj-y += lpddr4_timing_01061010.1_2.o
	obj-y += ddr.o
	obj-y += lpddr4_timing_ff020008.o
	obj-y += lpddr4_timing_ff000110.o
	obj-y += lpddr4_timing_01061010.1_2.o