board: atmel: add sama5d2_ptc_ek board
Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board
which was a prototype.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
diff --git a/board/atmel/sama5d2_ptc_ek/Kconfig b/board/atmel/sama5d2_ptc_ek/Kconfig
new file mode 100644
index 0000000..8b202d6
--- /dev/null
+++ b/board/atmel/sama5d2_ptc_ek/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_SAMA5D2_PTC_EK
+
+config SYS_BOARD
+ default "sama5d2_ptc_ek"
+
+config SYS_VENDOR
+ default "atmel"
+
+config SYS_SOC
+ default "at91"
+
+config SYS_CONFIG_NAME
+ default "sama5d2_ptc_ek"
+
+endif
diff --git a/board/atmel/sama5d2_ptc_ek/MAINTAINERS b/board/atmel/sama5d2_ptc_ek/MAINTAINERS
new file mode 100644
index 0000000..3c7b7f5
--- /dev/null
+++ b/board/atmel/sama5d2_ptc_ek/MAINTAINERS
@@ -0,0 +1,8 @@
+SAMA5D2 PTC EK BOARD
+M: Wenyou Yang <wenyou.yang@microchip.com>
+M: Ludovic Desroches <ludovic.desroches@microchip.com>
+S: Maintained
+F: board/atmel/sama5d2_ptc_ek/
+F: include/configs/sama5d2_ptc_ek.h
+F: configs/sama5d2_ptc_ek_mmc_defconfig
+F: configs/sama5d2_ptc_ek_nandflash_defconfig
diff --git a/board/atmel/sama5d2_ptc_ek/Makefile b/board/atmel/sama5d2_ptc_ek/Makefile
new file mode 100644
index 0000000..9fe4b41
--- /dev/null
+++ b/board/atmel/sama5d2_ptc_ek/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2017 Microchip Corporation
+# Wenyou Yang <wenyou.yang@microchip.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += sama5d2_ptc_ek.o
diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
new file mode 100644
index 0000000..4c2e209
--- /dev/null
+++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
@@ -0,0 +1,130 @@
+/*
+ * Copyright (C) 2017 Microchip Corporation
+ * Wenyou Yang <wenyou.yang@microchip.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <i2c.h>
+#include <nand.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/atmel_pio4.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_sdhci.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/sama5d2.h>
+#include <asm/arch/sama5d2_smc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_NAND_ATMEL
+static void board_nand_hw_init(void)
+{
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+
+ at91_periph_clk_enable(ATMEL_ID_HSMC);
+
+ /* Configure SMC CS3 for NAND */
+ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
+ AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
+ AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) |
+ AT91_SMC_TIMINGS_TWB(7) | AT91_SMC_TIMINGS_RBNSEL(3) |
+ AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+ AT91_SMC_MODE_DBW_8 |
+ AT91_SMC_MODE_TDF_CYCLE(3),
+ &smc->cs[3].mode);
+
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 22, 0); /* D0 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 23, 0); /* D1 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 24, 0); /* D2 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 25, 0); /* D3 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 26, 0); /* D4 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 27, 0); /* D5 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 28, 0); /* D6 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 29, 0); /* D7 */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTB, 2, 0); /* RE */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 30, 0); /* WE */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTA, 31, 1); /* NCS */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTC, 8, 1); /* RDY */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTB, 0, 1); /* ALE */
+ atmel_pio4_set_b_periph(AT91_PIO_PORTB, 1, 1); /* CLE */
+}
+#endif
+
+static void board_usb_hw_init(void)
+{
+ atmel_pio4_set_pio_output(AT91_PIO_PORTB, 12, 1);
+}
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+static void board_uart0_hw_init(void)
+{
+ atmel_pio4_set_c_periph(AT91_PIO_PORTB, 26, 1); /* URXD0 */
+ atmel_pio4_set_c_periph(AT91_PIO_PORTB, 27, 0); /* UTXD0 */
+
+ at91_periph_clk_enable(ATMEL_ID_UART0);
+}
+
+void board_debug_uart_init(void)
+{
+ board_uart0_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
+ return 0;
+}
+#endif
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_NAND_ATMEL
+ board_nand_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+ board_usb_hw_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+#define AT24MAC_MAC_OFFSET 0xfa
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+#ifdef CONFIG_I2C_EEPROM
+ at91_set_ethaddr(AT24MAC_MAC_OFFSET);
+#endif
+ return 0;
+}
+#endif