| /* |
| * (C) Copyright 2002 |
| * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| * Marius Groeger <mgroeger@sysgo.de> |
| * |
| * (C) Copyright 2002 |
| * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> |
| * |
| * (C) Copyright 2003 |
| * Texas Instruments, <www.ti.com> |
| * Kshitij Gupta <Kshitij@ti.com> |
| * |
| * (C) Copyright 2004 |
| * ARM Ltd. |
| * Philippe Robin, <philippe.robin@arm.com> |
| * |
| * See file CREDITS for list of people who contributed to this |
| * project. |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| * MA 02111-1307 USA |
| */ |
| |
| #include <common.h> |
| |
| void flash__init (void); |
| void ether__init (void); |
| void peripheral_power_enable (void); |
| |
| #if defined(CONFIG_SHOW_BOOT_PROGRESS) |
| void show_boot_progress(int progress) |
| { |
| printf("Boot reached stage %d\n", progress); |
| } |
| #endif |
| |
| #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF) |
| |
| static inline void delay (unsigned long loops) |
| { |
| __asm__ volatile ("1:\n" |
| "subs %0, %1, #1\n" |
| "bne 1b":"=r" (loops):"0" (loops)); |
| } |
| |
| /* |
| * Miscellaneous platform dependent initialisations |
| */ |
| |
| int board_init (void) |
| { |
| DECLARE_GLOBAL_DATA_PTR; |
| |
| |
| /* |
| * set clock frequency: |
| * VERSATILE_REFCLK is 32KHz |
| * VERSATILE_TIMCLK is 1MHz |
| */ |
| *(volatile unsigned int *)(VERSATILE_SCTL_BASE) |= |
| ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | |
| (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel)); |
| |
| /* arch number of Versatile Board */ |
| gd->bd->bi_arch_number = 387; |
| |
| /* adress of boot parameters */ |
| gd->bd->bi_boot_params = 0x00000100; |
| |
| gd->flags = 0; |
| |
| icache_enable (); |
| |
| flash__init (); |
| ether__init (); |
| return 0; |
| } |
| |
| |
| int misc_init_r (void) |
| { |
| setenv("verify", "n"); |
| return (0); |
| } |
| |
| /****************************** |
| Routine: |
| Description: |
| ******************************/ |
| void flash__init (void) |
| { |
| } |
| /************************************************************* |
| Routine:ether__init |
| Description: take the Ethernet controller out of reset and wait |
| for the EEPROM load to complete. |
| *************************************************************/ |
| void ether__init (void) |
| { |
| } |
| |
| /****************************** |
| Routine: |
| Description: |
| ******************************/ |
| int dram_init (void) |
| { |
| return 0; |
| } |