/* | |
* Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source | |
* | |
* Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
* http://www.samsung.com | |
* | |
* Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device | |
* tree nodes are listed in this file. | |
* | |
* This program is free software; you can redistribute it and/or modify | |
* it under the terms of the GNU General Public License version 2 as | |
* published by the Free Software Foundation. | |
*/ | |
/ { | |
pinctrl@11400000 { | |
gpa0: gpa0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpa1: gpa1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpb: gpb { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpc0: gpc0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpc1: gpc1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpd0: gpd0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpd1: gpd1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpf0: gpf0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpf1: gpf1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpf2: gpf2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpf3: gpf3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpj0: gpj0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpj1: gpj1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
pinctrl@11000000 { | |
gpk0: gpk0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpk1: gpk1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpk2: gpk2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpk3: gpk3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpl0: gpl0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpl1: gpl1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpl2: gpl2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpy0: gpy0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy1: gpy1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy2: gpy2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy3: gpy3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy4: gpy4 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy5: gpy5 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy6: gpy6 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpm0: gpm0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpm1: gpm1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpm2: gpm2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpm3: gpm3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpm4: gpm4 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpx0: gpx0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
interrupt-parent = <&gic>; | |
interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, | |
<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; | |
#interrupt-cells = <2>; | |
}; | |
gpx1: gpx1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
interrupt-parent = <&gic>; | |
interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, | |
<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; | |
#interrupt-cells = <2>; | |
}; | |
gpx2: gpx2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpx3: gpx3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
pinctrl@03860000 { | |
gpz: gpz { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
pinctrl@106E0000 { | |
gpv0: gpv0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpv1: gpv1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpv2: gpv2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpv3: gpv3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpv4: gpv4 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
}; |