| Xilinx Zynq QSPI controller Device Tree Bindings |
| ------------------------------------------------- |
| - compatible : Should be "xlnx,zynq-qspi-1.0". |
| - reg : Physical base address and size of QSPI registers map. |
| - interrupts : Property with a value describing the interrupt |
| - interrupt-parent : Must be core interrupt controller |
| - clock-names : List of input clock names - "ref_clk", "pclk" |
| (See clock bindings for details). |
| - clocks : Clock phandles (see clock bindings for details). |
| - num-cs : Number of chip selects used. |
| compatible = "xlnx,zynq-qspi-1.0"; |
| clock-names = "ref_clk", "pclk"; |
| clocks = <&clkc 10>, <&clkc 43>; |
| interrupt-parent = <&intc>; |
| reg = <0xe000d000 0x1000>; |