| // SPDX-License-Identifier: GPL-2.0+ OR X11 |
| * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH |
| u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ |
| u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ |
| stdout-path = "serial0:115200n8"; |
| u-boot,spl-boot-order = &emmc, &sdmmc; |
| * Validation of throughput using SPEC2000 shows the following |
| * relative performance for the different memory schedules: |
| * Note that the best performance for any given application workload |
| * may vary from the default configured here (e.g. 164.gzip is fastest |
| * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD). |
| * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for |
| * details on the 'rockchip,memory-schedule' property and how it |
| * affects the physical-address to device-address mapping. |
| rockchip,memory-schedule = <DMC_MSCH_CBDR>; |
| rockchip,ddr-frequency = <800000000>; |
| rockchip,ddr-speed-bin = <DDR3_1600K>; |
| clock-frequency = <24000000>; |