| /* SPDX-License-Identifier: GPL-2.0+ */ |
| * (C) Copyright 2012 Samsung Electronics |
| unsigned int decprot0stat; |
| unsigned int decprot0set; |
| unsigned int decprot0clr; |
| unsigned int decprot1stat; |
| unsigned int decprot1set; |
| unsigned int decprot1clr; |
| unsigned int decprot2stat; |
| unsigned int decprot2set; |
| unsigned int decprot2clr; |
| unsigned int decprot3stat; |
| unsigned int decprot3set; |
| unsigned int decprot3clr; |
| #define EXYNOS4_NR_TZPC_BANKS 6 |
| #define EXYNOS5_NR_TZPC_BANKS 10 |
| /* TZPC : Register Offsets */ |
| #define TZPC_BASE_OFFSET 0x10000 |
| * R0SIZE: 0x0 : Size of secured ram |
| * TZPC Decode Protection Register Value : |
| * DECPROTXSET: 0xFF : Set Decode region to non-secure |