| commit | 025e375d2554224e164b2807b7a87d384c236ae7 | [log] [tgz] |
|---|---|---|
| author | Pankaj Bharadiya <pankaj.bharadiya@ti.com> | Thu Sep 13 09:38:16 2012 +0000 |
| committer | Tom Rini <trini@ti.com> | Tue Oct 23 08:33:17 2012 -0700 |
| tree | ba21021eefcd5ca701b0b689b272f06689df633b | |
| parent | d4678237e7394fba2129620e8aa73b90ee31c1e2 [diff] |
USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY The endpoint rx count register value will be zero if it is read before receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set. Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before reading endpoint rx count register. Proceed with rx count read and FIFO read only if RXPKTRDY bit is set. Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com> Signed-off-by: Tom Rini <trini@ti.com>