tree ba21021eefcd5ca701b0b689b272f06689df633b
parent d4678237e7394fba2129620e8aa73b90ee31c1e2
author Pankaj Bharadiya <pankaj.bharadiya@ti.com> 1347529096 +0000
committer Tom Rini <trini@ti.com> 1351006397 -0700

USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY

The endpoint rx count register value will be zero if it is read before
receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set.

Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before
reading endpoint rx count register. Proceed with rx count read and
FIFO read only if RXPKTRDY bit is set.

Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>