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filogic
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uboot
/
02297bd626cb1461b28b5ba5442eb437b1324d30
/
.
/
board
/
compulab
/
imx8mm-cl-iot-gate
/
ddr
/
Makefile
blob: f73f35cd664c578c68437f6a061ebe8398a3cbb0 [
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obj
-
y
+=
ddr
.
o
obj
-
y
+=
lpddr4_timing_ff020008
.
o
obj
-
y
+=
lpddr4_timing_ff000110
.
o
obj
-
y
+=
lpddr4_timing_01061010
.
1_2.o