developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 1 | #define _GNU_SOURCE |
| 2 | #include <fcntl.h> |
| 3 | #include <sys/mman.h> |
| 4 | #include <sys/stat.h> |
| 5 | #include <sys/wait.h> |
| 6 | |
| 7 | #include "atenl.h" |
| 8 | |
developer | 963a66b | 2023-04-11 13:34:56 +0800 | [diff] [blame] | 9 | #define EEPROM_PART_SIZE 0xFF000 |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 10 | char *eeprom_file; |
| 11 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 12 | static int |
| 13 | atenl_create_file(struct atenl *an, bool flash_mode) |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 14 | { |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 15 | char fname[64], buf[1024]; |
| 16 | ssize_t w, len, max_len, total_len = 0; |
| 17 | int fd_ori, fd, ret; |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 18 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 19 | /* reserve space for pre-cal data in flash mode */ |
| 20 | if (flash_mode) { |
| 21 | atenl_dbg("%s: init eeprom with flash mode\n", __func__); |
| 22 | max_len = EEPROM_PART_SIZE; |
| 23 | } else { |
| 24 | atenl_dbg("%s: init eeprom with efuse mode\n", __func__); |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 25 | max_len = 0x1e00; |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 26 | } |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 27 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 28 | snprintf(fname, sizeof(fname), |
| 29 | "/sys/kernel/debug/ieee80211/phy%d/mt76/eeprom", |
| 30 | get_band_val(an, 0, phy_idx)); |
| 31 | fd_ori = open(fname, O_RDONLY); |
| 32 | if (fd_ori < 0) |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 33 | return -1; |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 34 | |
| 35 | fd = open(eeprom_file, O_RDWR | O_CREAT | O_EXCL, 00644); |
| 36 | if (fd < 0) |
| 37 | goto out; |
| 38 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 39 | while ((len = read(fd_ori, buf, sizeof(buf))) > 0) { |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 40 | retry: |
| 41 | w = write(fd, buf, len); |
| 42 | if (w > 0) { |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 43 | total_len += len; |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 44 | continue; |
| 45 | } |
| 46 | |
| 47 | if (errno == EINTR) |
| 48 | goto retry; |
| 49 | |
| 50 | perror("write"); |
| 51 | unlink(eeprom_file); |
| 52 | close(fd); |
| 53 | fd = -1; |
| 54 | goto out; |
| 55 | } |
| 56 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 57 | /* reserve space for pre-cal data in flash mode */ |
| 58 | len = sizeof(buf); |
| 59 | memset(buf, 0, len); |
| 60 | while (total_len < max_len) { |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 61 | w = write(fd, buf, len); |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 62 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 63 | if (w > 0) { |
| 64 | total_len += len; |
| 65 | continue; |
| 66 | } |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 67 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 68 | if (errno != EINTR) { |
| 69 | perror("write"); |
| 70 | unlink(eeprom_file); |
| 71 | close(fd); |
| 72 | fd = -1; |
| 73 | goto out; |
| 74 | } |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 75 | } |
| 76 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 77 | |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 78 | ret = lseek(fd, 0, SEEK_SET); |
| 79 | if (ret) { |
| 80 | close(fd_ori); |
| 81 | close(fd); |
| 82 | return ret; |
| 83 | } |
| 84 | |
| 85 | out: |
| 86 | close(fd_ori); |
| 87 | return fd; |
| 88 | } |
| 89 | |
| 90 | static bool |
| 91 | atenl_eeprom_file_exists(void) |
| 92 | { |
| 93 | struct stat st; |
| 94 | |
| 95 | return stat(eeprom_file, &st) == 0; |
| 96 | } |
| 97 | |
| 98 | static int |
| 99 | atenl_eeprom_init_file(struct atenl *an, bool flash_mode) |
| 100 | { |
| 101 | int fd; |
| 102 | |
developer | 4212668 | 2022-11-04 16:03:09 +0800 | [diff] [blame] | 103 | if (!atenl_eeprom_file_exists()) |
| 104 | return atenl_create_file(an, flash_mode); |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 105 | |
| 106 | fd = open(eeprom_file, O_RDWR); |
| 107 | if (fd < 0) |
| 108 | perror("open"); |
| 109 | |
| 110 | return fd; |
| 111 | } |
| 112 | |
| 113 | static void |
| 114 | atenl_eeprom_init_chip_id(struct atenl *an) |
| 115 | { |
| 116 | an->chip_id = *(u16 *)an->eeprom_data; |
| 117 | |
| 118 | if (is_mt7915(an)) { |
| 119 | an->adie_id = 0x7975; |
| 120 | } else if (is_mt7916(an)) { |
| 121 | an->adie_id = 0x7976; |
| 122 | } else if (is_mt7986(an)) { |
| 123 | bool is_7975 = false; |
| 124 | u32 val; |
| 125 | u8 sub_id; |
| 126 | |
| 127 | atenl_reg_read(an, 0x18050000, &val); |
| 128 | |
| 129 | switch (val & 0xf) { |
| 130 | case MT7975_ONE_ADIE_SINGLE_BAND: |
| 131 | is_7975 = true; |
| 132 | /* fallthrough */ |
| 133 | case MT7976_ONE_ADIE_SINGLE_BAND: |
| 134 | sub_id = 0xa; |
| 135 | break; |
| 136 | case MT7976_ONE_ADIE_DBDC: |
| 137 | sub_id = 0x7; |
| 138 | break; |
| 139 | case MT7975_DUAL_ADIE_DBDC: |
| 140 | is_7975 = true; |
| 141 | /* fallthrough */ |
| 142 | case MT7976_DUAL_ADIE_DBDC: |
| 143 | default: |
| 144 | sub_id = 0xf; |
| 145 | break; |
| 146 | } |
| 147 | |
| 148 | an->sub_chip_id = sub_id; |
| 149 | an->adie_id = is_7975 ? 0x7975 : 0x7976; |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 150 | } else if (is_mt7996(an)) { |
| 151 | /* TODO: parse info if required */ |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 152 | } |
| 153 | } |
| 154 | |
| 155 | static void |
| 156 | atenl_eeprom_init_max_size(struct atenl *an) |
| 157 | { |
| 158 | switch (an->chip_id) { |
| 159 | case 0x7915: |
| 160 | an->eeprom_size = 3584; |
| 161 | an->eeprom_prek_offs = 0x62; |
| 162 | break; |
| 163 | case 0x7906: |
| 164 | case 0x7916: |
| 165 | case 0x7986: |
| 166 | an->eeprom_size = 4096; |
| 167 | an->eeprom_prek_offs = 0x19a; |
| 168 | break; |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 169 | case 0x7990: |
| 170 | an->eeprom_size = 7680; |
| 171 | an->eeprom_prek_offs = 0x1a5; |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 172 | default: |
| 173 | break; |
| 174 | } |
| 175 | } |
| 176 | |
| 177 | static void |
| 178 | atenl_eeprom_init_band_cap(struct atenl *an) |
| 179 | { |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 180 | #define EAGLE_BAND_SEL(index) MT_EE_WIFI_EAGLE_CONF##index##_BAND_SEL |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 181 | u8 *eeprom = an->eeprom_data; |
| 182 | |
| 183 | if (is_mt7915(an)) { |
| 184 | u8 val = eeprom[MT_EE_WIFI_CONF]; |
| 185 | u8 band_sel = FIELD_GET(MT_EE_WIFI_CONF0_BAND_SEL, val); |
| 186 | struct atenl_band *anb = &an->anb[0]; |
| 187 | |
| 188 | /* MT7915A */ |
| 189 | if (band_sel == MT_EE_BAND_SEL_DEFAULT) { |
| 190 | anb->valid = true; |
| 191 | anb->cap = BAND_TYPE_2G_5G; |
| 192 | return; |
| 193 | } |
| 194 | |
| 195 | /* MT7915D */ |
| 196 | if (band_sel == MT_EE_BAND_SEL_2GHZ) { |
| 197 | anb->valid = true; |
| 198 | anb->cap = BAND_TYPE_2G; |
| 199 | } |
| 200 | |
| 201 | val = eeprom[MT_EE_WIFI_CONF + 1]; |
| 202 | band_sel = FIELD_GET(MT_EE_WIFI_CONF0_BAND_SEL, val); |
| 203 | anb++; |
| 204 | |
| 205 | if (band_sel == MT_EE_BAND_SEL_5GHZ) { |
| 206 | anb->valid = true; |
| 207 | anb->cap = BAND_TYPE_5G; |
| 208 | } |
| 209 | } else if (is_mt7916(an) || is_mt7986(an)) { |
| 210 | struct atenl_band *anb; |
| 211 | u8 val, band_sel; |
| 212 | int i; |
| 213 | |
| 214 | for (i = 0; i < 2; i++) { |
| 215 | val = eeprom[MT_EE_WIFI_CONF + i]; |
| 216 | band_sel = FIELD_GET(MT_EE_WIFI_CONF0_BAND_SEL, val); |
| 217 | anb = &an->anb[i]; |
| 218 | |
| 219 | anb->valid = true; |
| 220 | switch (band_sel) { |
| 221 | case MT_EE_BAND_SEL_2G: |
| 222 | anb->cap = BAND_TYPE_2G; |
| 223 | break; |
| 224 | case MT_EE_BAND_SEL_5G: |
| 225 | anb->cap = BAND_TYPE_5G; |
| 226 | break; |
| 227 | case MT_EE_BAND_SEL_6G: |
| 228 | anb->cap = BAND_TYPE_6G; |
| 229 | break; |
| 230 | case MT_EE_BAND_SEL_5G_6G: |
| 231 | anb->cap = BAND_TYPE_5G_6G; |
| 232 | break; |
| 233 | default: |
| 234 | break; |
| 235 | } |
| 236 | } |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 237 | } else if (is_mt7996(an)) { |
| 238 | struct atenl_band *anb; |
| 239 | u8 val, band_sel; |
| 240 | u8 band_sel_mask[3] = {EAGLE_BAND_SEL(0), EAGLE_BAND_SEL(1), |
| 241 | EAGLE_BAND_SEL(2)}; |
| 242 | int i; |
| 243 | |
| 244 | for (i = 0; i < 3; i++) { |
| 245 | val = eeprom[MT_EE_WIFI_CONF + i]; |
| 246 | band_sel = FIELD_GET(band_sel_mask[i], val); |
| 247 | anb = &an->anb[i]; |
| 248 | |
| 249 | anb->valid = true; |
| 250 | switch (band_sel) { |
| 251 | case MT_EE_EAGLE_BAND_SEL_2GHZ: |
| 252 | anb->cap = BAND_TYPE_2G; |
| 253 | break; |
| 254 | case MT_EE_EAGLE_BAND_SEL_5GHZ: |
| 255 | anb->cap = BAND_TYPE_5G; |
| 256 | break; |
| 257 | case MT_EE_EAGLE_BAND_SEL_6GHZ: |
| 258 | anb->cap = BAND_TYPE_6G; |
| 259 | break; |
| 260 | case MT_EE_EAGLE_BAND_SEL_5GHZ_6GHZ: |
| 261 | anb->cap = BAND_TYPE_5G_6G; |
| 262 | break; |
| 263 | default: |
| 264 | break; |
| 265 | } |
| 266 | } |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 267 | } |
| 268 | } |
| 269 | |
| 270 | static void |
| 271 | atenl_eeprom_init_antenna_cap(struct atenl *an) |
| 272 | { |
| 273 | if (is_mt7915(an)) { |
| 274 | if (an->anb[0].cap == BAND_TYPE_2G_5G) |
| 275 | an->anb[0].chainmask = 0xf; |
| 276 | else { |
| 277 | an->anb[0].chainmask = 0x3; |
| 278 | an->anb[1].chainmask = 0xc; |
| 279 | } |
| 280 | } else if (is_mt7916(an)) { |
| 281 | an->anb[0].chainmask = 0x3; |
| 282 | an->anb[1].chainmask = 0x3; |
| 283 | } else if (is_mt7986(an)) { |
| 284 | an->anb[0].chainmask = 0xf; |
| 285 | an->anb[1].chainmask = 0xf; |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 286 | } else if (is_mt7996(an)) { |
| 287 | an->anb[0].chainmask = 0xf; |
| 288 | an->anb[1].chainmask = 0xf; |
| 289 | an->anb[2].chainmask = 0xf; |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 290 | } |
| 291 | } |
| 292 | |
| 293 | int atenl_eeprom_init(struct atenl *an, u8 phy_idx) |
| 294 | { |
| 295 | bool flash_mode; |
| 296 | int eeprom_fd; |
| 297 | char buf[30]; |
| 298 | u8 main_phy_idx = phy_idx; |
| 299 | |
| 300 | set_band_val(an, 0, phy_idx, phy_idx); |
| 301 | atenl_nl_check_mtd(an); |
| 302 | flash_mode = an->mtd_part != NULL; |
| 303 | |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 304 | // Get the first main phy index for this chip |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 305 | if (flash_mode) |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 306 | main_phy_idx -= an->band_idx; |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 307 | |
| 308 | snprintf(buf, sizeof(buf), "/tmp/atenl-eeprom-phy%u", main_phy_idx); |
| 309 | eeprom_file = strdup(buf); |
| 310 | |
| 311 | eeprom_fd = atenl_eeprom_init_file(an, flash_mode); |
| 312 | if (eeprom_fd < 0) |
| 313 | return -1; |
| 314 | |
| 315 | an->eeprom_data = mmap(NULL, EEPROM_PART_SIZE, PROT_READ | PROT_WRITE, |
| 316 | MAP_SHARED, eeprom_fd, 0); |
| 317 | if (!an->eeprom_data) { |
| 318 | perror("mmap"); |
| 319 | close(eeprom_fd); |
| 320 | return -1; |
| 321 | } |
| 322 | |
| 323 | an->eeprom_fd = eeprom_fd; |
| 324 | atenl_eeprom_init_chip_id(an); |
| 325 | atenl_eeprom_init_max_size(an); |
| 326 | atenl_eeprom_init_band_cap(an); |
| 327 | atenl_eeprom_init_antenna_cap(an); |
| 328 | |
| 329 | if (get_band_val(an, 1, valid)) |
| 330 | set_band_val(an, 1, phy_idx, phy_idx + 1); |
| 331 | |
developer | 7af0f76 | 2023-05-22 15:16:16 +0800 | [diff] [blame] | 332 | if (get_band_val(an, 2, valid)) |
| 333 | set_band_val(an, 2, phy_idx, phy_idx + 2); |
| 334 | |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 335 | return 0; |
| 336 | } |
| 337 | |
| 338 | void atenl_eeprom_close(struct atenl *an) |
| 339 | { |
| 340 | msync(an->eeprom_data, EEPROM_PART_SIZE, MS_SYNC); |
| 341 | munmap(an->eeprom_data, EEPROM_PART_SIZE); |
| 342 | close(an->eeprom_fd); |
| 343 | |
| 344 | if (!an->cmd_mode) { |
| 345 | if (remove(eeprom_file)) |
| 346 | perror("remove"); |
| 347 | } |
| 348 | |
| 349 | free(eeprom_file); |
| 350 | } |
| 351 | |
| 352 | int atenl_eeprom_update_precal(struct atenl *an, int write_offs, int size) |
| 353 | { |
| 354 | u32 offs = an->eeprom_prek_offs; |
| 355 | u8 cal_indicator, *eeprom, *pre_cal; |
| 356 | |
| 357 | if (!an->cal && !an->cal_info) |
| 358 | return 0; |
| 359 | |
| 360 | eeprom = an->eeprom_data; |
| 361 | pre_cal = eeprom + an->eeprom_size; |
| 362 | cal_indicator = an->cal_info[4]; |
| 363 | |
| 364 | memcpy(eeprom + offs, &cal_indicator, sizeof(u8)); |
| 365 | memcpy(pre_cal, an->cal_info, PRE_CAL_INFO); |
| 366 | pre_cal += (PRE_CAL_INFO + write_offs); |
| 367 | |
| 368 | if (an->cal) |
| 369 | memcpy(pre_cal, an->cal, size); |
| 370 | else |
| 371 | memset(pre_cal, 0, size); |
| 372 | |
| 373 | return 0; |
| 374 | } |
| 375 | |
| 376 | int atenl_eeprom_write_mtd(struct atenl *an) |
| 377 | { |
| 378 | bool flash_mode = an->mtd_part != NULL; |
| 379 | pid_t pid; |
| 380 | char offset[10]; |
| 381 | |
| 382 | if (!flash_mode) |
| 383 | return 0; |
| 384 | |
| 385 | pid = fork(); |
| 386 | if (pid < 0) { |
| 387 | perror("Fork"); |
| 388 | return EXIT_FAILURE; |
| 389 | } else if (pid == 0) { |
| 390 | int ret; |
| 391 | char *part = strdup(an->mtd_part); |
| 392 | snprintf(offset, sizeof(offset), "%d", an->mtd_offset); |
| 393 | char *cmd[] = {"mtd", "-p", offset, "write", eeprom_file, part, NULL}; |
| 394 | |
| 395 | ret = execvp("mtd", cmd); |
| 396 | if (ret < 0) { |
| 397 | atenl_err("%s: exec error\n", __func__); |
| 398 | exit(0); |
| 399 | } |
| 400 | } else { |
| 401 | wait(&pid); |
| 402 | } |
| 403 | |
| 404 | return 0; |
| 405 | } |
| 406 | |
| 407 | /* Directly read values from driver's eeprom. |
| 408 | * It's usally used to get calibrated data from driver. |
| 409 | */ |
| 410 | int atenl_eeprom_read_from_driver(struct atenl *an, u32 offset, int len) |
| 411 | { |
| 412 | u8 *eeprom_data = an->eeprom_data + offset; |
| 413 | char fname[64], buf[1024]; |
| 414 | int fd_ori, ret; |
| 415 | ssize_t rd; |
| 416 | |
| 417 | snprintf(fname, sizeof(fname), |
| 418 | "/sys/kernel/debug/ieee80211/phy%d/mt76/eeprom", |
| 419 | get_band_val(an, 0, phy_idx)); |
| 420 | fd_ori = open(fname, O_RDONLY); |
| 421 | if (fd_ori < 0) |
| 422 | return -1; |
| 423 | |
| 424 | ret = lseek(fd_ori, offset, SEEK_SET); |
| 425 | if (ret < 0) |
| 426 | goto out; |
| 427 | |
| 428 | while ((rd = read(fd_ori, buf, sizeof(buf))) > 0 && len) { |
| 429 | if (len < rd) { |
| 430 | memcpy(eeprom_data, buf, len); |
| 431 | break; |
| 432 | } else { |
| 433 | memcpy(eeprom_data, buf, rd); |
| 434 | eeprom_data += rd; |
| 435 | len -= rd; |
| 436 | } |
| 437 | } |
| 438 | |
| 439 | ret = 0; |
| 440 | out: |
| 441 | close(fd_ori); |
| 442 | return ret; |
| 443 | } |
| 444 | |
| 445 | /* Update all eeprom values to driver before writing efuse */ |
| 446 | static void |
| 447 | atenl_eeprom_sync_to_driver(struct atenl *an) |
| 448 | { |
| 449 | int i; |
| 450 | |
| 451 | for (i = 0; i < an->eeprom_size; i += 16) |
| 452 | atenl_nl_write_eeprom(an, i, &an->eeprom_data[i], 16); |
| 453 | } |
| 454 | |
| 455 | void atenl_eeprom_cmd_handler(struct atenl *an, u8 phy_idx, char *cmd) |
| 456 | { |
| 457 | bool flash_mode; |
| 458 | |
| 459 | an->cmd_mode = true; |
| 460 | |
| 461 | atenl_eeprom_init(an, phy_idx); |
| 462 | flash_mode = an->mtd_part != NULL; |
| 463 | |
| 464 | if (!strncmp(cmd, "sync eeprom all", 15)) { |
| 465 | atenl_eeprom_write_mtd(an); |
| 466 | } else if (!strncmp(cmd, "eeprom", 6)) { |
| 467 | char *s = strchr(cmd, ' '); |
| 468 | |
| 469 | if (!s) { |
| 470 | atenl_err("eeprom: please type a correct command\n"); |
| 471 | return; |
| 472 | } |
| 473 | |
| 474 | s++; |
| 475 | if (!strncmp(s, "reset", 5)) { |
| 476 | unlink(eeprom_file); |
| 477 | } else if (!strncmp(s, "file", 4)) { |
| 478 | atenl_info("%s\n", eeprom_file); |
| 479 | atenl_info("Flash mode: %d\n", flash_mode); |
| 480 | } else if (!strncmp(s, "set", 3)) { |
| 481 | u32 offset, val; |
| 482 | |
| 483 | s = strchr(s, ' '); |
| 484 | if (!s) |
| 485 | return; |
| 486 | s++; |
| 487 | |
| 488 | if (!sscanf(s, "%x=%x", &offset, &val) || |
| 489 | offset > EEPROM_PART_SIZE) |
| 490 | return; |
| 491 | |
| 492 | an->eeprom_data[offset] = val; |
| 493 | atenl_info("set offset 0x%x to 0x%x\n", offset, val); |
| 494 | } else if (!strncmp(s, "update buffermode", 17)) { |
| 495 | atenl_eeprom_sync_to_driver(an); |
| 496 | atenl_nl_update_buffer_mode(an); |
| 497 | } else if (!strncmp(s, "write", 5)) { |
| 498 | s = strchr(s, ' '); |
| 499 | if (!s) |
| 500 | return; |
| 501 | s++; |
| 502 | |
| 503 | if (!strncmp(s, "flash", 5)) { |
| 504 | atenl_eeprom_write_mtd(an); |
| 505 | } else if (!strncmp(s, "to efuse", 8)) { |
| 506 | atenl_eeprom_sync_to_driver(an); |
| 507 | atenl_nl_write_efuse_all(an); |
| 508 | } |
| 509 | } else if (!strncmp(s, "read", 4)) { |
| 510 | u32 offset; |
| 511 | |
| 512 | s = strchr(s, ' '); |
| 513 | if (!s) |
| 514 | return; |
| 515 | s++; |
| 516 | |
| 517 | if (!sscanf(s, "%x", &offset) || |
| 518 | offset > EEPROM_PART_SIZE) |
| 519 | return; |
| 520 | |
| 521 | atenl_info("val = 0x%x (%u)\n", an->eeprom_data[offset], |
| 522 | an->eeprom_data[offset]); |
| 523 | } else if (!strncmp(s, "precal", 6)) { |
| 524 | s = strchr(s, ' '); |
| 525 | if (!s) |
| 526 | return; |
| 527 | s++; |
| 528 | |
| 529 | if (!strncmp(s, "sync group", 10)) { |
| 530 | atenl_nl_precal_sync_from_driver(an, PREK_SYNC_GROUP); |
| 531 | } else if (!strncmp(s, "sync dpd 2g", 11)) { |
| 532 | atenl_nl_precal_sync_from_driver(an, PREK_SYNC_DPD_2G); |
| 533 | } else if (!strncmp(s, "sync dpd 5g", 11)) { |
| 534 | atenl_nl_precal_sync_from_driver(an, PREK_SYNC_DPD_5G); |
| 535 | } else if (!strncmp(s, "sync dpd 6g", 11)) { |
| 536 | atenl_nl_precal_sync_from_driver(an, PREK_SYNC_DPD_6G); |
| 537 | } else if (!strncmp(s, "group clean", 11)) { |
| 538 | atenl_nl_precal_sync_from_driver(an, PREK_CLEAN_GROUP); |
| 539 | } else if (!strncmp(s, "dpd clean", 9)) { |
| 540 | atenl_nl_precal_sync_from_driver(an, PREK_CLEAN_DPD); |
| 541 | } else if (!strncmp(s, "sync", 4)) { |
| 542 | atenl_nl_precal_sync_from_driver(an, PREK_SYNC_ALL); |
| 543 | } |
developer | f9b0021 | 2023-07-31 12:27:06 +0800 | [diff] [blame^] | 544 | } else if (!strncmp(s, "ibf sync", 8)) { |
| 545 | atenl_get_ibf_cal_result(an); |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 546 | } else { |
developer | f9b0021 | 2023-07-31 12:27:06 +0800 | [diff] [blame^] | 547 | atenl_err("Unknown eeprom command: %s\n", cmd); |
| 548 | } |
developer | b9b4cd1 | 2022-10-11 13:18:59 +0800 | [diff] [blame] | 549 | } else { |
| 550 | atenl_err("Unknown command: %s\n", cmd); |
| 551 | } |
| 552 | } |