developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 1 | From 72dda83ffb5d48393da817757f537770aeca4e40 Mon Sep 17 00:00:00 2001 |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 2 | From: Sujuan Chen <sujuan.chen@mediatek.com> |
| 3 | Date: Fri, 6 Jan 2023 18:18:50 +0800 |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 4 | Subject: [PATCH 3006/3013] mt76: mt7915: wed: add rxwi for further in chip rro |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 5 | |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 6 | Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com> |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 7 | --- |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 8 | dma.c | 93 +++++++++++++++++++++++++------------------------ |
| 9 | mac80211.c | 2 +- |
| 10 | mt76.h | 24 ++++++++----- |
| 11 | mt7915/dma.c | 2 -- |
| 12 | mt7915/mmio.c | 27 +++++++------- |
| 13 | mt7915/mt7915.h | 1 + |
| 14 | tx.c | 16 ++++----- |
| 15 | 7 files changed, 86 insertions(+), 79 deletions(-) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 16 | |
| 17 | diff --git a/dma.c b/dma.c |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 18 | index 14553b24..d1a1dae4 100644 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 19 | --- a/dma.c |
| 20 | +++ b/dma.c |
| 21 | @@ -59,17 +59,17 @@ mt76_alloc_txwi(struct mt76_dev *dev) |
| 22 | return t; |
| 23 | } |
| 24 | |
| 25 | -static struct mt76_txwi_cache * |
| 26 | +static struct mt76_rxwi_cache * |
| 27 | mt76_alloc_rxwi(struct mt76_dev *dev) |
| 28 | { |
| 29 | - struct mt76_txwi_cache *t; |
| 30 | + struct mt76_rxwi_cache *r; |
| 31 | |
| 32 | - t = kzalloc(L1_CACHE_ALIGN(sizeof(*t)), GFP_ATOMIC); |
| 33 | - if (!t) |
| 34 | + r = kzalloc(L1_CACHE_ALIGN(sizeof(*r)), GFP_ATOMIC); |
| 35 | + if (!r) |
| 36 | return NULL; |
| 37 | |
| 38 | - t->ptr = NULL; |
| 39 | - return t; |
| 40 | + r->ptr = NULL; |
| 41 | + return r; |
| 42 | } |
| 43 | |
| 44 | static struct mt76_txwi_cache * |
| 45 | @@ -88,20 +88,20 @@ __mt76_get_txwi(struct mt76_dev *dev) |
| 46 | return t; |
| 47 | } |
| 48 | |
| 49 | -static struct mt76_txwi_cache * |
| 50 | +static struct mt76_rxwi_cache * |
| 51 | __mt76_get_rxwi(struct mt76_dev *dev) |
| 52 | { |
| 53 | - struct mt76_txwi_cache *t = NULL; |
| 54 | + struct mt76_rxwi_cache *r = NULL; |
| 55 | |
| 56 | - spin_lock(&dev->wed_lock); |
| 57 | + spin_lock(&dev->lock); |
| 58 | if (!list_empty(&dev->rxwi_cache)) { |
| 59 | - t = list_first_entry(&dev->rxwi_cache, struct mt76_txwi_cache, |
| 60 | + r = list_first_entry(&dev->rxwi_cache, struct mt76_rxwi_cache, |
| 61 | list); |
| 62 | - list_del(&t->list); |
| 63 | + list_del(&r->list); |
| 64 | } |
| 65 | - spin_unlock(&dev->wed_lock); |
| 66 | + spin_unlock(&dev->lock); |
| 67 | |
| 68 | - return t; |
| 69 | + return r; |
| 70 | } |
| 71 | |
| 72 | static struct mt76_txwi_cache * |
| 73 | @@ -115,13 +115,13 @@ mt76_get_txwi(struct mt76_dev *dev) |
| 74 | return mt76_alloc_txwi(dev); |
| 75 | } |
| 76 | |
| 77 | -struct mt76_txwi_cache * |
| 78 | +struct mt76_rxwi_cache * |
| 79 | mt76_get_rxwi(struct mt76_dev *dev) |
| 80 | { |
| 81 | - struct mt76_txwi_cache *t = __mt76_get_rxwi(dev); |
| 82 | + struct mt76_rxwi_cache *r = __mt76_get_rxwi(dev); |
| 83 | |
| 84 | - if (t) |
| 85 | - return t; |
| 86 | + if (r) |
| 87 | + return r; |
| 88 | |
| 89 | return mt76_alloc_rxwi(dev); |
| 90 | } |
| 91 | @@ -140,14 +140,14 @@ mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t) |
| 92 | EXPORT_SYMBOL_GPL(mt76_put_txwi); |
| 93 | |
| 94 | void |
| 95 | -mt76_put_rxwi(struct mt76_dev *dev, struct mt76_txwi_cache *t) |
| 96 | +mt76_put_rxwi(struct mt76_dev *dev, struct mt76_rxwi_cache *r) |
| 97 | { |
| 98 | - if (!t) |
| 99 | + if (!r) |
| 100 | return; |
| 101 | |
| 102 | - spin_lock(&dev->wed_lock); |
| 103 | - list_add(&t->list, &dev->rxwi_cache); |
| 104 | - spin_unlock(&dev->wed_lock); |
| 105 | + spin_lock(&dev->lock); |
| 106 | + list_add(&r->list, &dev->rxwi_cache); |
| 107 | + spin_unlock(&dev->lock); |
| 108 | } |
| 109 | EXPORT_SYMBOL_GPL(mt76_put_rxwi); |
| 110 | |
| 111 | @@ -168,13 +168,13 @@ mt76_free_pending_txwi(struct mt76_dev *dev) |
| 112 | void |
| 113 | mt76_free_pending_rxwi(struct mt76_dev *dev) |
| 114 | { |
| 115 | - struct mt76_txwi_cache *t; |
| 116 | + struct mt76_rxwi_cache *r; |
| 117 | |
| 118 | local_bh_disable(); |
| 119 | - while ((t = __mt76_get_rxwi(dev)) != NULL) { |
| 120 | - if (t->ptr) |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 121 | - mt76_put_page_pool_buf(t->ptr, false); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 122 | - kfree(t); |
| 123 | + while ((r = __mt76_get_rxwi(dev)) != NULL) { |
| 124 | + if (r->ptr) |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 125 | + mt76_put_page_pool_buf(r->ptr, false); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 126 | + kfree(r); |
| 127 | } |
| 128 | local_bh_enable(); |
| 129 | } |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 130 | @@ -212,7 +212,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 131 | { |
| 132 | struct mt76_desc *desc = &q->desc[q->head]; |
| 133 | struct mt76_queue_entry *entry = &q->entry[q->head]; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 134 | - struct mt76_txwi_cache *txwi = NULL; |
| 135 | + struct mt76_rxwi_cache *rxwi = NULL; |
| 136 | u32 buf1 = 0, ctrl; |
| 137 | int idx = q->head; |
| 138 | int rx_token; |
| 139 | @@ -220,13 +220,13 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
| 140 | ctrl = FIELD_PREP(MT_DMA_CTL_SD_LEN0, buf[0].len); |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 141 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 142 | if (mt76_queue_is_wed_rx(q)) { |
| 143 | - txwi = mt76_get_rxwi(dev); |
| 144 | - if (!txwi) |
| 145 | + rxwi = mt76_get_rxwi(dev); |
| 146 | + if (!rxwi) |
| 147 | return -ENOMEM; |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 148 | |
| 149 | - rx_token = mt76_rx_token_consume(dev, data, txwi, buf->addr); |
| 150 | + rx_token = mt76_rx_token_consume(dev, data, rxwi, buf->addr); |
| 151 | if (rx_token < 0) { |
| 152 | - mt76_put_rxwi(dev, txwi); |
| 153 | + mt76_put_rxwi(dev, rxwi); |
| 154 | return -ENOMEM; |
| 155 | } |
| 156 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 157 | @@ -241,7 +241,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 158 | |
| 159 | entry->dma_addr[0] = buf->addr; |
| 160 | entry->dma_len[0] = buf->len; |
| 161 | - entry->txwi = txwi; |
| 162 | + entry->rxwi = rxwi; |
| 163 | entry->buf = data; |
| 164 | entry->wcid = 0xffff; |
| 165 | entry->skip_buf1 = true; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 166 | @@ -254,7 +254,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 167 | static int |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 168 | mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q, |
| 169 | struct mt76_queue_buf *buf, int nbufs, u32 info, |
| 170 | - struct sk_buff *skb, void *txwi) |
| 171 | + struct sk_buff *skb, void *txwi, void *rxwi) |
| 172 | { |
| 173 | struct mt76_queue_entry *entry; |
| 174 | struct mt76_desc *desc; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 175 | @@ -307,6 +307,7 @@ mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 176 | } |
| 177 | |
| 178 | q->entry[idx].txwi = txwi; |
| 179 | + q->entry[idx].rxwi = rxwi; |
| 180 | q->entry[idx].skb = skb; |
| 181 | q->entry[idx].wcid = 0xffff; |
| 182 | |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 183 | @@ -405,13 +406,13 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
| 184 | u32 buf1 = le32_to_cpu(desc->buf1); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 185 | u32 id, find = 0; |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 186 | u32 token = FIELD_GET(MT_DMA_CTL_TOKEN, buf1); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 187 | - struct mt76_txwi_cache *t; |
| 188 | + struct mt76_rxwi_cache *r; |
| 189 | |
| 190 | if (*more) { |
| 191 | spin_lock_bh(&dev->rx_token_lock); |
| 192 | |
| 193 | - idr_for_each_entry(&dev->rx_token, t, id) { |
| 194 | - if (t->dma_addr == le32_to_cpu(desc->buf0)) { |
| 195 | + idr_for_each_entry(&dev->rx_token, r, id) { |
| 196 | + if (r->dma_addr == le32_to_cpu(desc->buf0)) { |
| 197 | find = 1; |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 198 | token = id; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 199 | |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 200 | @@ -428,19 +429,19 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 201 | return NULL; |
| 202 | } |
| 203 | |
| 204 | - t = mt76_rx_token_release(dev, token); |
| 205 | - if (!t) |
| 206 | + r = mt76_rx_token_release(dev, token); |
| 207 | + if (!r) |
| 208 | return NULL; |
| 209 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 210 | - dma_sync_single_for_cpu(dev->dma_dev, t->dma_addr, |
| 211 | + dma_sync_single_for_cpu(dev->dma_dev, r->dma_addr, |
| 212 | SKB_WITH_OVERHEAD(q->buf_size), |
| 213 | page_pool_get_dma_dir(q->page_pool)); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 214 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 215 | - buf = t->ptr; |
| 216 | - t->dma_addr = 0; |
| 217 | - t->ptr = NULL; |
| 218 | + buf = r->ptr; |
| 219 | + r->dma_addr = 0; |
| 220 | + r->ptr = NULL; |
developer | 21e74f6 | 2023-01-30 14:02:51 +0800 | [diff] [blame] | 221 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 222 | - mt76_put_rxwi(dev, t); |
| 223 | + mt76_put_rxwi(dev, r); |
developer | 21e74f6 | 2023-01-30 14:02:51 +0800 | [diff] [blame] | 224 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 225 | if (drop) { |
| 226 | u32 ctrl = le32_to_cpu(READ_ONCE(desc->ctrl)); |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 227 | @@ -501,7 +502,7 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 228 | buf.len = skb->len; |
| 229 | |
| 230 | spin_lock_bh(&q->lock); |
| 231 | - mt76_dma_add_buf(dev, q, &buf, 1, tx_info, skb, NULL); |
| 232 | + mt76_dma_add_buf(dev, q, &buf, 1, tx_info, skb, NULL, NULL); |
| 233 | mt76_dma_kick_queue(dev, q); |
| 234 | spin_unlock_bh(&q->lock); |
| 235 | |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 236 | @@ -578,7 +579,7 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 237 | goto unmap; |
| 238 | |
| 239 | return mt76_dma_add_buf(dev, q, tx_info.buf, tx_info.nbuf, |
| 240 | - tx_info.info, tx_info.skb, t); |
| 241 | + tx_info.info, tx_info.skb, t, NULL); |
| 242 | |
| 243 | unmap: |
| 244 | for (n--; n > 0; n--) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 245 | diff --git a/mac80211.c b/mac80211.c |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 246 | index e2122c78..4655f814 100644 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 247 | --- a/mac80211.c |
| 248 | +++ b/mac80211.c |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 249 | @@ -644,7 +644,6 @@ mt76_alloc_device(struct device *pdev, unsigned int size, |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 250 | spin_lock_init(&dev->lock); |
| 251 | spin_lock_init(&dev->cc_lock); |
| 252 | spin_lock_init(&dev->status_lock); |
| 253 | - spin_lock_init(&dev->wed_lock); |
| 254 | mutex_init(&dev->mutex); |
| 255 | init_waitqueue_head(&dev->tx_wait); |
| 256 | |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 257 | @@ -675,6 +674,7 @@ mt76_alloc_device(struct device *pdev, unsigned int size, |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 258 | INIT_LIST_HEAD(&dev->txwi_cache); |
| 259 | INIT_LIST_HEAD(&dev->rxwi_cache); |
| 260 | dev->token_size = dev->drv->token_size; |
| 261 | + dev->rx_token_size = dev->drv->rx_token_size; |
| 262 | |
| 263 | for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) |
| 264 | skb_queue_head_init(&dev->rx_skb[i]); |
| 265 | diff --git a/mt76.h b/mt76.h |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 266 | index d8438953..7919cda8 100644 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 267 | --- a/mt76.h |
| 268 | +++ b/mt76.h |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 269 | @@ -165,6 +165,7 @@ struct mt76_queue_entry { |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 270 | }; |
| 271 | union { |
| 272 | struct mt76_txwi_cache *txwi; |
| 273 | + struct mt76_rxwi_cache *rxwi; |
| 274 | struct urb *urb; |
| 275 | int buf_sz; |
| 276 | }; |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 277 | @@ -356,10 +357,15 @@ struct mt76_txwi_cache { |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 278 | struct list_head list; |
| 279 | dma_addr_t dma_addr; |
| 280 | |
| 281 | - union { |
| 282 | - struct sk_buff *skb; |
| 283 | - void *ptr; |
| 284 | - }; |
| 285 | + struct sk_buff *skb; |
| 286 | +}; |
| 287 | + |
| 288 | +struct mt76_rxwi_cache { |
| 289 | + struct list_head list; |
| 290 | + dma_addr_t dma_addr; |
| 291 | + |
| 292 | + void *ptr; |
| 293 | + u32 token; |
| 294 | }; |
| 295 | |
| 296 | struct mt76_rx_tid { |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 297 | @@ -445,6 +451,7 @@ struct mt76_driver_ops { |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 298 | u16 txwi_size; |
| 299 | u16 token_size; |
| 300 | u8 mcs_rates; |
| 301 | + u16 rx_token_size; |
| 302 | |
| 303 | void (*update_survey)(struct mt76_phy *phy); |
| 304 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 305 | @@ -815,7 +822,6 @@ struct mt76_dev { |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 306 | |
| 307 | struct ieee80211_hw *hw; |
| 308 | |
| 309 | - spinlock_t wed_lock; |
| 310 | spinlock_t lock; |
| 311 | spinlock_t cc_lock; |
| 312 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 313 | @@ -1406,8 +1412,8 @@ mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 314 | } |
| 315 | |
| 316 | void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); |
| 317 | -void mt76_put_rxwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); |
| 318 | -struct mt76_txwi_cache *mt76_get_rxwi(struct mt76_dev *dev); |
| 319 | +void mt76_put_rxwi(struct mt76_dev *dev, struct mt76_rxwi_cache *r); |
| 320 | +struct mt76_rxwi_cache *mt76_get_rxwi(struct mt76_dev *dev); |
| 321 | void mt76_free_pending_rxwi(struct mt76_dev *dev); |
| 322 | void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, |
| 323 | struct napi_struct *napi); |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 324 | @@ -1560,9 +1566,9 @@ struct mt76_txwi_cache * |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 325 | mt76_token_release(struct mt76_dev *dev, int token, bool *wake); |
| 326 | int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi); |
| 327 | void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked); |
| 328 | -struct mt76_txwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token); |
| 329 | +struct mt76_rxwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token); |
| 330 | int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr, |
| 331 | - struct mt76_txwi_cache *r, dma_addr_t phys); |
| 332 | + struct mt76_rxwi_cache *r, dma_addr_t phys); |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 333 | int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q); |
| 334 | static inline void mt76_put_page_pool_buf(void *buf, bool allow_direct) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 335 | { |
| 336 | diff --git a/mt7915/dma.c b/mt7915/dma.c |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 337 | index 43a5456d..6d9b2d15 100644 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 338 | --- a/mt7915/dma.c |
| 339 | +++ b/mt7915/dma.c |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 340 | @@ -493,7 +493,6 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 341 | mtk_wed_get_rx_capa(&mdev->mmio.wed)) { |
| 342 | dev->mt76.q_rx[MT_RXQ_MAIN].flags = |
| 343 | MT_WED_Q_RX(MT7915_RXQ_BAND0); |
| 344 | - dev->mt76.rx_token_size += MT7915_RX_RING_SIZE; |
| 345 | } |
| 346 | |
| 347 | ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 348 | @@ -530,7 +529,6 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 349 | mtk_wed_get_rx_capa(&mdev->mmio.wed)) { |
| 350 | dev->mt76.q_rx[MT_RXQ_BAND1].flags = |
| 351 | MT_WED_Q_RX(MT7915_RXQ_BAND1); |
| 352 | - dev->mt76.rx_token_size += MT7915_RX_RING_SIZE; |
| 353 | } |
| 354 | |
| 355 | /* rx data queue for band1 */ |
| 356 | diff --git a/mt7915/mmio.c b/mt7915/mmio.c |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 357 | index 890af388..6dec9d60 100644 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 358 | --- a/mt7915/mmio.c |
| 359 | +++ b/mt7915/mmio.c |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 360 | @@ -606,16 +606,16 @@ static void mt7915_mmio_wed_release_rx_buf(struct mtk_wed_device *wed) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 361 | |
| 362 | dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed); |
| 363 | for (i = 0; i < dev->mt76.rx_token_size; i++) { |
| 364 | - struct mt76_txwi_cache *t; |
| 365 | + struct mt76_rxwi_cache *r; |
| 366 | |
| 367 | - t = mt76_rx_token_release(&dev->mt76, i); |
| 368 | - if (!t || !t->ptr) |
| 369 | + r = mt76_rx_token_release(&dev->mt76, i); |
| 370 | + if (!r || !r->ptr) |
| 371 | continue; |
| 372 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 373 | - mt76_put_page_pool_buf(t->ptr, false); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 374 | - t->ptr = NULL; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 375 | + mt76_put_page_pool_buf(r->ptr, false); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 376 | + r->ptr = NULL; |
| 377 | |
| 378 | - mt76_put_rxwi(&dev->mt76, t); |
| 379 | + mt76_put_rxwi(&dev->mt76, r); |
| 380 | } |
| 381 | |
| 382 | mt76_free_pending_rxwi(&dev->mt76); |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 383 | @@ -624,7 +624,7 @@ static void mt7915_mmio_wed_release_rx_buf(struct mtk_wed_device *wed) |
| 384 | static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
| 385 | { |
| 386 | struct mtk_rxbm_desc *desc = wed->rx_buf_ring.desc; |
| 387 | - struct mt76_txwi_cache *t = NULL; |
| 388 | + struct mt76_rxwi_cache *r = NULL; |
| 389 | struct mt7915_dev *dev; |
| 390 | struct mt76_queue *q; |
| 391 | int i, len; |
| 392 | @@ -640,8 +640,8 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 393 | int token; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 394 | void *buf; |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 395 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 396 | - t = mt76_get_rxwi(&dev->mt76); |
| 397 | - if (!t) |
| 398 | + r = mt76_get_rxwi(&dev->mt76); |
| 399 | + if (!r) |
| 400 | goto unmap; |
| 401 | |
| 402 | buf = mt76_get_page_pool_buf(q, &offset, q->buf_size); |
| 403 | @@ -653,7 +653,7 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
| 404 | dma_sync_single_for_device(dev->mt76.dma_dev, addr, len, dir); |
| 405 | |
| 406 | desc->buf0 = cpu_to_le32(addr); |
| 407 | - token = mt76_rx_token_consume(&dev->mt76, buf, t, addr); |
| 408 | + token = mt76_rx_token_consume(&dev->mt76, buf, r, addr); |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 409 | if (token < 0) { |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 410 | mt76_put_page_pool_buf(buf, false); |
| 411 | goto unmap; |
| 412 | @@ -667,8 +667,8 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
| 413 | return 0; |
| 414 | |
| 415 | unmap: |
| 416 | - if (t) |
| 417 | - mt76_put_rxwi(&dev->mt76, t); |
| 418 | + if (r) |
| 419 | + mt76_put_rxwi(&dev->mt76, r); |
| 420 | mt7915_mmio_wed_release_rx_buf(wed); |
| 421 | return -ENOMEM; |
| 422 | } |
| 423 | @@ -818,7 +818,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, |
| 424 | wed->wlan.reset = mt7915_mmio_wed_reset; |
| 425 | wed->wlan.reset_complete = mt7915_mmio_wed_reset_complete; |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 426 | |
| 427 | - dev->mt76.rx_token_size = wed->wlan.rx_npkt; |
| 428 | + dev->mt76.rx_token_size += wed->wlan.rx_npkt; |
| 429 | |
| 430 | if (mtk_wed_device_attach(wed)) |
| 431 | return 0; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 432 | @@ -1024,6 +1024,7 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 433 | SURVEY_INFO_TIME_RX | |
| 434 | SURVEY_INFO_TIME_BSS_RX, |
| 435 | .token_size = MT7915_TOKEN_SIZE, |
| 436 | + .rx_token_size = MT7915_RX_TOKEN_SIZE, |
| 437 | .tx_prepare_skb = mt7915_tx_prepare_skb, |
| 438 | .tx_complete_skb = mt76_connac_tx_complete_skb, |
| 439 | .rx_skb = mt7915_queue_rx_skb, |
| 440 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
developer | b885304 | 2023-02-17 11:50:45 +0800 | [diff] [blame] | 441 | index 0fbc1047..dd6b673b 100644 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 442 | --- a/mt7915/mt7915.h |
| 443 | +++ b/mt7915/mt7915.h |
developer | 2aa1e64 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 444 | @@ -57,6 +57,7 @@ |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 445 | #define MT7915_EEPROM_BLOCK_SIZE 16 |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 446 | #define MT7915_HW_TOKEN_SIZE 4096 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 447 | #define MT7915_TOKEN_SIZE 8192 |
| 448 | +#define MT7915_RX_TOKEN_SIZE 4096 |
| 449 | |
| 450 | #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ |
| 451 | #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ |
| 452 | diff --git a/tx.c b/tx.c |
developer | b9a9660 | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 453 | index 6d55566f..a72b7779 100644 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 454 | --- a/tx.c |
| 455 | +++ b/tx.c |
| 456 | @@ -756,16 +756,16 @@ int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi) |
| 457 | EXPORT_SYMBOL_GPL(mt76_token_consume); |
| 458 | |
| 459 | int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr, |
| 460 | - struct mt76_txwi_cache *t, dma_addr_t phys) |
| 461 | + struct mt76_rxwi_cache *r, dma_addr_t phys) |
| 462 | { |
| 463 | int token; |
| 464 | |
| 465 | spin_lock_bh(&dev->rx_token_lock); |
| 466 | - token = idr_alloc(&dev->rx_token, t, 0, dev->rx_token_size, |
| 467 | + token = idr_alloc(&dev->rx_token, r, 0, dev->rx_token_size, |
| 468 | GFP_ATOMIC); |
| 469 | if (token >= 0) { |
| 470 | - t->ptr = ptr; |
| 471 | - t->dma_addr = phys; |
| 472 | + r->ptr = ptr; |
| 473 | + r->dma_addr = phys; |
| 474 | } |
| 475 | spin_unlock_bh(&dev->rx_token_lock); |
| 476 | |
| 477 | @@ -802,15 +802,15 @@ mt76_token_release(struct mt76_dev *dev, int token, bool *wake) |
| 478 | } |
| 479 | EXPORT_SYMBOL_GPL(mt76_token_release); |
| 480 | |
| 481 | -struct mt76_txwi_cache * |
| 482 | +struct mt76_rxwi_cache * |
| 483 | mt76_rx_token_release(struct mt76_dev *dev, int token) |
| 484 | { |
| 485 | - struct mt76_txwi_cache *t; |
| 486 | + struct mt76_rxwi_cache *r; |
| 487 | |
| 488 | spin_lock_bh(&dev->rx_token_lock); |
| 489 | - t = idr_remove(&dev->rx_token, token); |
| 490 | + r = idr_remove(&dev->rx_token, token); |
| 491 | spin_unlock_bh(&dev->rx_token_lock); |
| 492 | |
| 493 | - return t; |
| 494 | + return r; |
| 495 | } |
| 496 | EXPORT_SYMBOL_GPL(mt76_rx_token_release); |
| 497 | -- |
developer | 79a21a2 | 2023-01-09 13:57:39 +0800 | [diff] [blame] | 498 | 2.18.0 |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 499 | |