developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 1 | From b454d9a320895e76b3211a3c176dbf3ab24c1a8a Mon Sep 17 00:00:00 2001 |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 2 | From: Sujuan Chen <sujuan.chen@mediatek.com> |
| 3 | Date: Fri, 25 Nov 2022 14:32:35 +0800 |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 4 | Subject: [PATCH 3004/3013] mt76: mt7915: wed: find rx token by physical |
developer | bcc85ca | 2022-12-05 11:29:56 +0800 | [diff] [blame] | 5 | address |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 6 | |
| 7 | The token id in RxDMAD may be incorrect when it is not the last frame due to |
| 8 | WED HW bug. Lookup correct token id by physical address in sdp0. |
| 9 | |
developer | 780b915 | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 10 | Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 11 | --- |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 12 | dma.c | 25 ++++++++++++++++++++++++- |
| 13 | 1 file changed, 24 insertions(+), 1 deletion(-) |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 14 | |
| 15 | diff --git a/dma.c b/dma.c |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 16 | index fe65e0f3..14553b24 100644 |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 17 | --- a/dma.c |
| 18 | +++ b/dma.c |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 19 | @@ -403,9 +403,32 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 20 | |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 21 | if (mt76_queue_is_wed_rx(q)) { |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 22 | u32 buf1 = le32_to_cpu(desc->buf1); |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 23 | + u32 id, find = 0; |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 24 | u32 token = FIELD_GET(MT_DMA_CTL_TOKEN, buf1); |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 25 | - struct mt76_txwi_cache *t = mt76_rx_token_release(dev, token); |
| 26 | + struct mt76_txwi_cache *t; |
developer | 21e74f6 | 2023-01-30 14:02:51 +0800 | [diff] [blame] | 27 | + |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 28 | + if (*more) { |
| 29 | + spin_lock_bh(&dev->rx_token_lock); |
| 30 | + |
| 31 | + idr_for_each_entry(&dev->rx_token, t, id) { |
| 32 | + if (t->dma_addr == le32_to_cpu(desc->buf0)) { |
| 33 | + find = 1; |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 34 | + token = id; |
developer | f3f5d9b | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 35 | + |
| 36 | + /* Write correct id back to DMA*/ |
developer | f8871e8 | 2023-03-08 17:22:32 +0800 | [diff] [blame^] | 37 | + u32p_replace_bits(&buf1, id, |
| 38 | + MT_DMA_CTL_TOKEN); |
| 39 | + WRITE_ONCE(desc->buf1, cpu_to_le32(buf1)); |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 40 | + break; |
| 41 | + } |
| 42 | + } |
| 43 | + |
| 44 | + spin_unlock_bh(&dev->rx_token_lock); |
| 45 | + if (!find) |
| 46 | + return NULL; |
| 47 | + } |
developer | 21e74f6 | 2023-01-30 14:02:51 +0800 | [diff] [blame] | 48 | |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 49 | + t = mt76_rx_token_release(dev, token); |
| 50 | if (!t) |
| 51 | return NULL; |
| 52 | |
| 53 | -- |
developer | 79a21a2 | 2023-01-09 13:57:39 +0800 | [diff] [blame] | 54 | 2.18.0 |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 55 | |