| developer | f131310 | 2022-10-11 11:02:55 +0800 | [diff] [blame^] | 1 | From 1a023afd7dd2ff4820f056de4d60ac019b1f72e7 Mon Sep 17 00:00:00 2001 |
| developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 2 | From: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 3 | Date: Thu, 4 Aug 2022 14:08:11 +0800 |
| developer | 33907d4 | 2022-09-19 14:33:58 +0800 | [diff] [blame] | 4 | Subject: [PATCH 1115/1124] mt76: mt7915: reduce TWT SP sent to FW for cert |
| developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 5 | |
| 6 | Set TWT SP duration to 88 percent to prevent HW sends PPDU over TWT SP. |
| 7 | |
| 8 | Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 9 | --- |
| 10 | mt7915/mcu.c | 2 +- |
| 11 | 1 file changed, 1 insertion(+), 1 deletion(-) |
| 12 | |
| 13 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
| developer | f131310 | 2022-10-11 11:02:55 +0800 | [diff] [blame^] | 14 | index 34ce7d6..b6733b1 100644 |
| developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 15 | --- a/mt7915/mcu.c |
| 16 | +++ b/mt7915/mcu.c |
| developer | 33907d4 | 2022-09-19 14:33:58 +0800 | [diff] [blame] | 17 | @@ -3558,7 +3558,7 @@ int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev, |
| developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 18 | .own_mac_idx = mvif->mt76.omac_idx, |
| 19 | .flowid = flow->id, |
| 20 | .peer_id = cpu_to_le16(flow->wcid), |
| 21 | - .duration = flow->duration, |
| 22 | + .duration = (flow->duration * 7) >> 3, |
| 23 | .bss_idx = mvif->mt76.idx, |
| 24 | .start_tsf = cpu_to_le64(flow->tsf), |
| 25 | .mantissa = flow->mantissa, |
| 26 | -- |
| developer | f131310 | 2022-10-11 11:02:55 +0800 | [diff] [blame^] | 27 | 2.18.0 |
| developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 28 | |