blob: c84c60edce1905b7bbec7b4a8493e68ffaf1e751 [file] [log] [blame]
developerec4ebe42022-04-12 11:17:45 +08001From d0a61bbe57616c1a87a3bb4676f141ed54110add Mon Sep 17 00:00:00 2001
2From: Shayne Chen <shayne.chen@mediatek.com>
3Date: Wed, 19 Jan 2022 15:51:01 +0800
4Subject: [PATCH 4/6] mt76: mt7915: fix tx descriptor
5
6---
7 mt7915/mac.c | 1 +
8 1 file changed, 1 insertion(+)
9
10diff --git a/mt7915/mac.c b/mt7915/mac.c
11index 47d5a993..887292da 100644
12--- a/mt7915/mac.c
13+++ b/mt7915/mac.c
14@@ -1001,6 +1001,7 @@ mt7915_mac_write_txwi_tm(struct mt7915_phy *phy, __le32 *txwi,
15 if (td->tx_rate_ldpc || (bw > 0 && mode >= MT_PHY_TYPE_HE_SU))
16 val |= MT_TXD6_LDPC;
17
18+ txwi[1] &= ~cpu_to_le32(MT_TXD1_VTA);
19 txwi[3] &= ~cpu_to_le32(MT_TXD3_SN_VALID);
20 txwi[6] |= cpu_to_le32(val);
21 txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX,
22--
232.18.0
24