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developer43a264f2024-03-26 14:09:54 +08001From b159ab04d85f593ca0785404469f2ea23eababef Mon Sep 17 00:00:00 2001
developerd243af02023-12-21 14:49:33 +08002From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
3Date: Mon, 11 Sep 2023 14:43:07 +0800
developer8935fc12024-01-11 14:08:37 +08004Subject: [PATCH 1036/1044] mtk: wifi: mt76: testmode: add channel 68 & 96
developerd243af02023-12-21 14:49:33 +08005
6Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
7
8Add all the channel between 68 & 96 since ibf 5g channel group 3 will use channel 84.
9Also, "mtk: wifi: mt76: testmode: add channel 68 & 96" can be
10merged into to "mtk: wifi: mt76: testmode: add basic testmode support"
11
12Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
13
14Fix 5g channel list size
15
16Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
17---
18 mac80211.c | 9 +++++++++
19 mt7996/eeprom.c | 49 +++++++++++++++++++++++++++++++++++++++++++++--
20 mt7996/eeprom.h | 2 ++
21 mt7996/mcu.c | 10 +++++++++-
22 mt7996/testmode.c | 15 ++++++++++++---
23 mt7996/testmode.h | 6 +++---
24 6 files changed, 82 insertions(+), 9 deletions(-)
25
26diff --git a/mac80211.c b/mac80211.c
developerebda9012024-02-22 13:42:45 +080027index ae040ec4..f7cd47f9 100644
developerd243af02023-12-21 14:49:33 +080028--- a/mac80211.c
29+++ b/mac80211.c
30@@ -35,6 +35,15 @@ static const struct ieee80211_channel mt76_channels_5ghz[] = {
31 CHAN5G(60, 5300),
32 CHAN5G(64, 5320),
33
34+ CHAN5G(68, 5340),
35+ CHAN5G(72, 5360),
36+ CHAN5G(76, 5380),
37+ CHAN5G(80, 5400),
38+ CHAN5G(84, 5420),
39+ CHAN5G(88, 5440),
40+ CHAN5G(92, 5460),
41+ CHAN5G(96, 5480),
42+
43 CHAN5G(100, 5500),
44 CHAN5G(104, 5520),
45 CHAN5G(108, 5540),
46diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c
developer8935fc12024-01-11 14:08:37 +080047index d93b1558..1eb292c0 100644
developerd243af02023-12-21 14:49:33 +080048--- a/mt7996/eeprom.c
49+++ b/mt7996/eeprom.c
50@@ -18,6 +18,17 @@ const struct ieee80211_channel dpd_2g_ch_list_bw20[] = {
51 CHAN2G(11, 2462)
52 };
53
54+const struct ieee80211_channel dpd_5g_skip_ch_list[] = {
55+ CHAN5G(68, 5340),
56+ CHAN5G(72, 5360),
57+ CHAN5G(76, 5380),
58+ CHAN5G(80, 5400),
59+ CHAN5G(84, 5420),
60+ CHAN5G(88, 5440),
61+ CHAN5G(92, 5460),
62+ CHAN5G(96, 5480)
63+};
64+
65 const struct ieee80211_channel dpd_5g_ch_list_bw160[] = {
66 CHAN5G(50, 5250),
67 CHAN5G(114, 5570),
68@@ -44,6 +55,7 @@ const struct ieee80211_channel dpd_6g_ch_list_bw320[] = {
69 };
70
71 const u32 dpd_2g_bw20_ch_num = ARRAY_SIZE(dpd_2g_ch_list_bw20);
72+const u32 dpd_5g_skip_ch_num = ARRAY_SIZE(dpd_5g_skip_ch_list);
73 const u32 dpd_5g_bw160_ch_num = ARRAY_SIZE(dpd_5g_ch_list_bw160);
74 const u32 dpd_6g_bw160_ch_num = ARRAY_SIZE(dpd_6g_ch_list_bw160);
75 const u32 dpd_6g_bw320_ch_num = ARRAY_SIZE(dpd_6g_ch_list_bw320);
developer8935fc12024-01-11 14:08:37 +080076@@ -138,8 +150,8 @@ mt7996_get_dpd_per_band_size(struct mt7996_dev *dev, enum nl80211_band band)
developerd243af02023-12-21 14:49:33 +080077 if (band == NL80211_BAND_2GHZ)
78 dpd_size = dpd_2g_bw20_ch_num * DPD_PER_CH_BW20_SIZE;
79 else if (band == NL80211_BAND_5GHZ)
80- dpd_size = mphy->sband_5g.sband.n_channels * DPD_PER_CH_BW20_SIZE +
81- dpd_5g_bw160_ch_num * DPD_PER_CH_GT_BW20_SIZE;
82+ dpd_size = (mphy->sband_5g.sband.n_channels - dpd_5g_skip_ch_num) *
83+ DPD_PER_CH_BW20_SIZE + dpd_5g_bw160_ch_num * DPD_PER_CH_GT_BW20_SIZE;
84 else
85 dpd_size = mphy->sband_6g.sband.n_channels * DPD_PER_CH_BW20_SIZE +
86 (dpd_6g_bw160_ch_num + dpd_6g_bw320_ch_num) * DPD_PER_CH_GT_BW20_SIZE;
developer8935fc12024-01-11 14:08:37 +080087@@ -399,6 +411,39 @@ out:
developerd243af02023-12-21 14:49:33 +080088 return ret;
89 }
90
91+static void mt7996_eeprom_init_precal(struct mt7996_dev *dev)
92+{
93+#define MT76_CHANNELS_5GHZ_SIZE 36 /* ARRAY_SIZE(mt76_channels_5ghz) */
94+#define MT76_CHANNELS_6GHZ_SIZE 59 /* ARRAY_SIZE(mt76_channels_6ghz) */
95+
96+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW20_2G] = ARRAY_SIZE(dpd_2g_ch_list_bw20);
97+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW20_5G_SKIP] = ARRAY_SIZE(dpd_5g_skip_ch_list);
98+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW20_5G] = MT76_CHANNELS_5GHZ_SIZE -
99+ DPD_CH_NUM(BW20_5G_SKIP);
100+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW160_5G] = ARRAY_SIZE(dpd_5g_ch_list_bw160);
101+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW20_6G] = MT76_CHANNELS_6GHZ_SIZE;
102+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW160_6G] = ARRAY_SIZE(dpd_6g_ch_list_bw160);
103+
104+ switch (mt76_chip(&dev->mt76)) {
105+ case 0x7990:
106+ dev->prek.rev = mt7996_prek_rev;
107+ /* 5g & 6g bw 80 dpd channel list is not used */
108+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW320_6G] = ARRAY_SIZE(dpd_6g_ch_list_bw320);
109+ break;
110+ case 0x7992:
111+ dev->prek.rev = mt7992_prek_rev;
112+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW80_5G] = ARRAY_SIZE(dpd_5g_ch_list_bw80);
113+ /* 6g is not used in current sku */
114+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW20_6G] = 0;
115+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW80_6G] = 0;
116+ dev->prek.dpd_ch_num[DPD_CH_NUM_BW160_6G] = 0;
117+ break;
118+ default:
119+ dev->prek.rev = mt7996_prek_rev;
120+ break;
121+ }
122+}
123+
124 static int mt7996_eeprom_load_precal(struct mt7996_dev *dev)
125 {
126 struct mt76_dev *mdev = &dev->mt76;
127diff --git a/mt7996/eeprom.h b/mt7996/eeprom.h
128index 8f0f87b6..3e9992a3 100644
129--- a/mt7996/eeprom.h
130+++ b/mt7996/eeprom.h
131@@ -67,6 +67,8 @@ enum mt7996_eeprom_field {
132
133 extern const struct ieee80211_channel dpd_2g_ch_list_bw20[];
134 extern const u32 dpd_2g_bw20_ch_num;
135+extern const struct ieee80211_channel dpd_5g_skip_ch_list[];
136+extern const u32 dpd_5g_skip_ch_num;
137 extern const struct ieee80211_channel dpd_5g_ch_list_bw160[];
138 extern const u32 dpd_5g_bw160_ch_num;
139 extern const struct ieee80211_channel dpd_6g_ch_list_bw160[];
140diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developer43a264f2024-03-26 14:09:54 +0800141index ded28e9a..cf46fee4 100644
developerd243af02023-12-21 14:49:33 +0800142--- a/mt7996/mcu.c
143+++ b/mt7996/mcu.c
developer43a264f2024-03-26 14:09:54 +0800144@@ -3780,7 +3780,8 @@ int mt7996_mcu_apply_tx_dpd(struct mt7996_phy *phy)
developerd243af02023-12-21 14:49:33 +0800145 chan_list_size = mphy->sband_5g.sband.n_channels;
146 base_offset += dpd_size_2g;
147 if (bw == NL80211_CHAN_WIDTH_160) {
148- base_offset += mphy->sband_5g.sband.n_channels * DPD_PER_CH_BW20_SIZE;
149+ base_offset += (mphy->sband_5g.sband.n_channels - dpd_5g_skip_ch_num) *
150+ DPD_PER_CH_BW20_SIZE;
151 per_chan_size = DPD_PER_CH_GT_BW20_SIZE;
152 cal_id = RF_DPD_FLAT_5G_MEM_CAL;
153 chan_list = dpd_5g_ch_list_bw160;
developer43a264f2024-03-26 14:09:54 +0800154@@ -3789,6 +3790,9 @@ int mt7996_mcu_apply_tx_dpd(struct mt7996_phy *phy)
developerd243af02023-12-21 14:49:33 +0800155 /* apply (center channel - 2)'s dpd cal data for bw 40/80 channels */
156 channel -= 2;
157 }
158+ if (channel >= dpd_5g_skip_ch_list[0].hw_value &&
159+ channel <= dpd_5g_skip_ch_list[dpd_5g_skip_ch_num - 1].hw_value)
160+ return 0;
161 break;
162 case NL80211_BAND_6GHZ:
163 dpd_mask = MT_EE_WIFI_CAL_DPD_6G;
developer43a264f2024-03-26 14:09:54 +0800164@@ -3828,6 +3832,10 @@ int mt7996_mcu_apply_tx_dpd(struct mt7996_phy *phy)
developerd243af02023-12-21 14:49:33 +0800165 if (idx == chan_list_size)
166 return -EINVAL;
167
168+ if (band == NL80211_BAND_5GHZ && bw != NL80211_CHAN_WIDTH_160 &&
169+ channel > dpd_5g_skip_ch_list[dpd_5g_skip_ch_num - 1].hw_value)
170+ idx -= dpd_5g_skip_ch_num;
171+
172 cal += MT_EE_CAL_GROUP_SIZE + base_offset + idx * per_chan_size;
173
174 for (i = 0; i < per_chan_size / MT_EE_CAL_UNIT; i++) {
175diff --git a/mt7996/testmode.c b/mt7996/testmode.c
176index 2fb36a97..0dc6629d 100644
177--- a/mt7996/testmode.c
178+++ b/mt7996/testmode.c
179@@ -531,6 +531,11 @@ mt7996_tm_dpd_prek_send_req(struct mt7996_phy *phy, struct mt7996_tm_req *req,
180 memcpy(&chandef_backup, chandef, sizeof(struct cfg80211_chan_def));
181
182 for (i = 0; i < channel_size; i++) {
183+ if (chan_list[i].band == NL80211_BAND_5GHZ &&
184+ chan_list[i].hw_value >= dpd_5g_skip_ch_list[0].hw_value &&
185+ chan_list[i].hw_value <= dpd_5g_skip_ch_list[dpd_5g_skip_ch_num - 1].hw_value)
186+ continue;
187+
188 memcpy(chandef->chan, &chan_list[i], sizeof(struct ieee80211_channel));
189 chandef->width = width;
190
191@@ -612,7 +617,8 @@ mt7996_tm_dpd_prek(struct mt7996_phy *phy, enum mt76_testmode_state state)
192 NL80211_CHAN_WIDTH_20, RF_DPD_FLAT_5G_CAL);
193 if (ret)
194 return ret;
195- wait_on_prek_offset += mphy->sband_5g.sband.n_channels * DPD_PER_CH_BW20_SIZE;
196+ wait_on_prek_offset += (mphy->sband_5g.sband.n_channels - dpd_5g_skip_ch_num) *
197+ DPD_PER_CH_BW20_SIZE;
198 wait_event_timeout(mdev->mcu.wait,
199 dev->cur_prek_offset == wait_on_prek_offset, 30 * HZ);
200
201@@ -868,6 +874,7 @@ mt7996_tm_get_center_chan(struct mt7996_phy *phy, struct cfg80211_chan_def *chan
202 const struct ieee80211_channel *chan = mphy->sband_5g.sband.channels;
203 u32 bitmap, i, offset, width_mhz, size = mphy->sband_5g.sband.n_channels;
204 u16 first_control = 0, control_chan = chandef->chan->hw_value;
205+ bool not_first;
206
207 bitmap = mt7996_tm_bw_mapping(chandef->width, BW_MAP_NL_TO_CONTROL_BITMAP_5G);
208 if (!bitmap)
209@@ -877,7 +884,9 @@ mt7996_tm_get_center_chan(struct mt7996_phy *phy, struct cfg80211_chan_def *chan
210 offset = width_mhz / 10 - 2;
211
212 for (i = 0; i < size; i++) {
213- if (!((1 << i) & bitmap))
214+ not_first = (chandef->width != NL80211_CHAN_WIDTH_160) ?
215+ (i % bitmap) : (i >= 32) || !((1 << i) & bitmap);
216+ if (not_first)
217 continue;
218
219 if (control_chan >= chan[i].hw_value)
220@@ -886,7 +895,7 @@ mt7996_tm_get_center_chan(struct mt7996_phy *phy, struct cfg80211_chan_def *chan
221 break;
222 }
223
224- if (i == size || first_control == 0)
225+ if (first_control == 0)
226 return control_chan;
227
228 return first_control + offset;
229diff --git a/mt7996/testmode.h b/mt7996/testmode.h
230index f97ccb26..ba1767ae 100644
231--- a/mt7996/testmode.h
232+++ b/mt7996/testmode.h
233@@ -38,9 +38,9 @@ enum {
234 BF_CDBW_8080MHZ,
235 };
236
237-#define FIRST_CONTROL_CHAN_BITMAP_BW40 0x5555555
238-#define FIRST_CONTROL_CHAN_BITMAP_BW80 0x111111
239-#define FIRST_CONTROL_CHAN_BITMAP_BW160 0x100101
240+#define FIRST_CONTROL_CHAN_BITMAP_BW40 2
241+#define FIRST_CONTROL_CHAN_BITMAP_BW80 4
242+#define FIRST_CONTROL_CHAN_BITMAP_BW160 0x10010101
243
244 enum bw_mapping_method {
245 BW_MAP_NL_TO_FW,
246--
2472.18.0
248