developer | 43a264f | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 1 | From fcf4d59b7cbd6c298ca90b0eae6aec63544b14d9 Mon Sep 17 00:00:00 2001 |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 2 | From: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| 3 | Date: Fri, 21 Jul 2023 10:41:28 +0800 |
developer | 43a264f | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 4 | Subject: [PATCH 11/17] mtk: wifi: mt76: mt7996: add kite fw & default bin for |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 5 | different sku variants |
| 6 | |
| 7 | Add fem type (2i5i, 2i5e, 2e5e, ...) |
| 8 | Add Kite default bin for each fem type since loading wrong default bin |
| 9 | will fail to setup interface |
| 10 | Add eeprom fem type check |
| 11 | |
| 12 | Add adie 7976c efuse check |
| 13 | Efuse offset 0x470 will be set to 0xc after final test if 7976c adie is used |
| 14 | Chip manufactoring factories may transfer, which leads to different adie chip versions, |
| 15 | so we add this efuse check to avoid 7976c recognition failure. |
| 16 | |
| 17 | Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 18 | |
| 19 | GPIO ADie Combination of BE5040 should be considered as don't care |
| 20 | instead of 0 |
| 21 | |
| 22 | Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| 23 | |
| 24 | Only check eeprom chip id when fem type (= MT7996_FEM_UNSET) is not determined yet |
| 25 | Without this fix, mt7996_check_eeprom will return EINVAL in mt7996_eeprom_check_fw_mode |
| 26 | |
| 27 | Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 28 | --- |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 29 | mt7996/eeprom.c | 38 +++++++++++++++++++++++++++++-- |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 30 | mt7996/eeprom.h | 1 + |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 31 | mt7996/init.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++ |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 32 | mt7996/mcu.c | 7 +++++- |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 33 | mt7996/mt7996.h | 49 +++++++++++++++++++++++++--------------- |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 34 | mt7996/regs.h | 7 ++++++ |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 35 | 6 files changed, 140 insertions(+), 21 deletions(-) |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 36 | |
| 37 | diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 38 | index 7505a8b7..3260d1fe 100644 |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 39 | --- a/mt7996/eeprom.c |
| 40 | +++ b/mt7996/eeprom.c |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 41 | @@ -9,14 +9,33 @@ |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 42 | |
| 43 | static int mt7996_check_eeprom(struct mt7996_dev *dev) |
| 44 | { |
| 45 | +#define FEM_INT 0 |
| 46 | +#define FEM_EXT 3 |
| 47 | u8 *eeprom = dev->mt76.eeprom.data; |
| 48 | + u8 i, fem[__MT_MAX_BAND], fem_type; |
| 49 | u16 val = get_unaligned_le16(eeprom); |
| 50 | |
| 51 | + for (i = 0; i < __MT_MAX_BAND; i++) |
| 52 | + fem[i] = eeprom[MT_EE_WIFI_CONF + 6 + i] & MT_EE_WIFI_PA_LNA_CONFIG; |
| 53 | + |
| 54 | switch (val) { |
| 55 | case 0x7990: |
| 56 | return is_mt7996(&dev->mt76) ? 0 : -EINVAL; |
| 57 | case 0x7992: |
| 58 | - return is_mt7992(&dev->mt76) ? 0 : -EINVAL; |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 59 | + if (dev->fem_type == MT7996_FEM_UNSET) |
| 60 | + return is_mt7992(&dev->mt76) ? 0 : -EINVAL; |
| 61 | + |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 62 | + if (fem[0] == FEM_EXT && fem[1] == FEM_EXT) |
| 63 | + fem_type = MT7996_FEM_EXT; |
| 64 | + else if (fem[0] == FEM_INT && fem[1] == FEM_INT) |
| 65 | + fem_type = MT7996_FEM_INT; |
| 66 | + else if (fem[0] == FEM_INT && fem[1] == FEM_EXT) |
| 67 | + fem_type = MT7996_FEM_MIX; |
| 68 | + else |
| 69 | + return -EINVAL; |
| 70 | + |
| 71 | + return (is_mt7992(&dev->mt76) ? 0 : -EINVAL) | |
| 72 | + (dev->fem_type == fem_type ? 0 : -EINVAL); |
| 73 | default: |
| 74 | return -EINVAL; |
| 75 | } |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 76 | @@ -30,7 +49,18 @@ static char *mt7996_eeprom_name(struct mt7996_dev *dev) |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 77 | return MT7996_EEPROM_DEFAULT_404; |
| 78 | return MT7996_EEPROM_DEFAULT; |
| 79 | case 0x7992: |
| 80 | - return MT7992_EEPROM_DEFAULT; |
| 81 | + if (dev->chip_sku == MT7992_SKU_23) { |
| 82 | + if (dev->fem_type == MT7996_FEM_INT) |
| 83 | + return MT7992_EEPROM_DEFAULT_23; |
| 84 | + return MT7992_EEPROM_DEFAULT_23_EXT; |
| 85 | + } else if (dev->chip_sku == MT7992_SKU_44) { |
| 86 | + if (dev->fem_type == MT7996_FEM_INT) |
| 87 | + return MT7992_EEPROM_DEFAULT; |
| 88 | + else if (dev->fem_type == MT7996_FEM_MIX) |
| 89 | + return MT7992_EEPROM_DEFAULT_MIX; |
| 90 | + return MT7992_EEPROM_DEFAULT_EXT; |
| 91 | + } |
| 92 | + return MT7992_EEPROM_DEFAULT_24; |
| 93 | default: |
| 94 | return MT7996_EEPROM_DEFAULT; |
| 95 | } |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 96 | @@ -221,6 +251,10 @@ int mt7996_eeprom_init(struct mt7996_dev *dev) |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 97 | { |
| 98 | int ret; |
| 99 | |
| 100 | + ret = mt7996_get_chip_sku(dev); |
| 101 | + if (ret) |
| 102 | + return ret; |
| 103 | + |
| 104 | ret = mt7996_eeprom_load(dev); |
| 105 | if (ret < 0) { |
| 106 | if (ret != -EINVAL) |
| 107 | diff --git a/mt7996/eeprom.h b/mt7996/eeprom.h |
| 108 | index 412d6e2f..72c38ad3 100644 |
| 109 | --- a/mt7996/eeprom.h |
| 110 | +++ b/mt7996/eeprom.h |
| 111 | @@ -29,6 +29,7 @@ enum mt7996_eeprom_field { |
| 112 | #define MT_EE_WIFI_CONF0_BAND_SEL GENMASK(2, 0) |
| 113 | #define MT_EE_WIFI_CONF1_BAND_SEL GENMASK(5, 3) |
| 114 | #define MT_EE_WIFI_CONF2_BAND_SEL GENMASK(2, 0) |
| 115 | +#define MT_EE_WIFI_PA_LNA_CONFIG GENMASK(1, 0) |
| 116 | |
| 117 | #define MT_EE_WIFI_CONF1_TX_PATH_BAND0 GENMASK(5, 3) |
| 118 | #define MT_EE_WIFI_CONF2_TX_PATH_BAND1 GENMASK(2, 0) |
| 119 | diff --git a/mt7996/init.c b/mt7996/init.c |
developer | ebda901 | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 120 | index 274863dc..0e3cdc05 100644 |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 121 | --- a/mt7996/init.c |
| 122 | +++ b/mt7996/init.c |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 123 | @@ -882,6 +882,65 @@ out: |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 124 | #endif |
| 125 | } |
| 126 | |
| 127 | +int mt7996_get_chip_sku(struct mt7996_dev *dev) |
| 128 | +{ |
| 129 | +#define MT7976C_CHIP_VER 0x8a10 |
| 130 | +#define MT7976C_HL_CHIP_VER 0x8b00 |
| 131 | +#define MT7976C_PS_CHIP_VER 0x8c10 |
| 132 | +#define MT7976C_EFUSE_OFFSET 0x470 |
| 133 | +#define MT7976C_EFUSE_VALUE 0xc |
| 134 | + u32 regval, val = mt76_rr(dev, MT_PAD_GPIO); |
| 135 | + u16 adie_chip_id, adie_chip_ver; |
| 136 | + u8 adie_comb, adie_num, adie_idx = 0; |
| 137 | + |
| 138 | + switch (mt76_chip(&dev->mt76)) { |
| 139 | + case 0x7990: |
| 140 | + adie_comb = FIELD_GET(MT_PAD_GPIO_ADIE_COMB, val); |
| 141 | + if (adie_comb <= 1) |
| 142 | + dev->chip_sku = MT7996_SKU_444; |
| 143 | + else |
| 144 | + dev->chip_sku = MT7996_SKU_404; |
| 145 | + break; |
| 146 | + case 0x7992: |
| 147 | + adie_comb = FIELD_GET(MT_PAD_GPIO_ADIE_COMB_7992, val); |
| 148 | + adie_num = FIELD_GET(MT_PAD_GPIO_ADIE_NUM_7992, val); |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 149 | + adie_idx = !adie_num; |
| 150 | + if (adie_num) |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 151 | + dev->chip_sku = MT7992_SKU_23; |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 152 | + else if (adie_comb) |
| 153 | + dev->chip_sku = MT7992_SKU_44; |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 154 | + else |
| 155 | + dev->chip_sku = MT7992_SKU_24; |
| 156 | + break; |
| 157 | + default: |
| 158 | + return -EINVAL; |
| 159 | + } |
| 160 | + |
| 161 | + if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) { |
| 162 | + u8 buf[MT7996_EEPROM_BLOCK_SIZE]; |
| 163 | + u8 idx = MT7976C_EFUSE_OFFSET % MT7996_EEPROM_BLOCK_SIZE; |
| 164 | + bool is_7976c; |
| 165 | + |
| 166 | + mt7996_mcu_rf_regval(dev, MT_ADIE_CHIP_ID(adie_idx), ®val, false); |
| 167 | + adie_chip_id = FIELD_GET(MT_ADIE_CHIP_ID_MASK, regval); |
| 168 | + adie_chip_ver = FIELD_GET(MT_ADIE_VERSION_MASK, regval); |
| 169 | + mt7996_mcu_get_eeprom(dev, MT7976C_EFUSE_OFFSET, buf); |
| 170 | + is_7976c = (adie_chip_ver == MT7976C_CHIP_VER) || |
| 171 | + (adie_chip_ver == MT7976C_HL_CHIP_VER) || |
| 172 | + (adie_chip_ver == MT7976C_PS_CHIP_VER) || |
| 173 | + (buf[idx] == MT7976C_EFUSE_VALUE); |
developer | 8935fc1 | 2024-01-11 14:08:37 +0800 | [diff] [blame] | 174 | + if (adie_chip_id == 0x7975 || (adie_chip_id == 0x7976 && is_7976c) || |
| 175 | + adie_chip_id == 0x7979) |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 176 | + dev->fem_type = MT7996_FEM_INT; |
| 177 | + else if (adie_chip_id == 0x7977 && adie_comb == 1) |
| 178 | + dev->fem_type = MT7996_FEM_MIX; |
| 179 | + else |
| 180 | + dev->fem_type = MT7996_FEM_EXT; |
| 181 | + } |
| 182 | + |
| 183 | + return 0; |
| 184 | +} |
| 185 | + |
| 186 | static int mt7996_init_hardware(struct mt7996_dev *dev) |
| 187 | { |
| 188 | int ret, idx; |
| 189 | diff --git a/mt7996/mcu.c b/mt7996/mcu.c |
developer | 43a264f | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 190 | index 0981f592..5aefecb0 100644 |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 191 | --- a/mt7996/mcu.c |
| 192 | +++ b/mt7996/mcu.c |
| 193 | @@ -14,7 +14,12 @@ |
| 194 | char *_fw; \ |
| 195 | switch (mt76_chip(&(_dev)->mt76)) { \ |
| 196 | case 0x7992: \ |
| 197 | - _fw = MT7992_##name; \ |
| 198 | + if ((_dev)->chip_sku == MT7992_SKU_23) \ |
| 199 | + _fw = MT7992_##name##_23; \ |
| 200 | + else if ((_dev)->chip_sku == MT7992_SKU_24) \ |
| 201 | + _fw = MT7992_##name##_24; \ |
| 202 | + else \ |
| 203 | + _fw = MT7992_##name; \ |
| 204 | break; \ |
| 205 | case 0x7990: \ |
| 206 | default: \ |
| 207 | diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
developer | ebda901 | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 208 | index b6df2167..7e5ec212 100644 |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 209 | --- a/mt7996/mt7996.h |
| 210 | +++ b/mt7996/mt7996.h |
| 211 | @@ -39,9 +39,24 @@ |
| 212 | #define MT7992_FIRMWARE_DSP "mediatek/mt7996/mt7992_dsp.bin" |
| 213 | #define MT7992_ROM_PATCH "mediatek/mt7996/mt7992_rom_patch.bin" |
| 214 | |
| 215 | +#define MT7992_FIRMWARE_WA_24 "mediatek/mt7996/mt7992_wa_24.bin" |
| 216 | +#define MT7992_FIRMWARE_WM_24 "mediatek/mt7996/mt7992_wm_24.bin" |
| 217 | +#define MT7992_FIRMWARE_DSP_24 "mediatek/mt7996/mt7992_dsp_24.bin" |
| 218 | +#define MT7992_ROM_PATCH_24 "mediatek/mt7996/mt7992_rom_patch_24.bin" |
| 219 | + |
| 220 | +#define MT7992_FIRMWARE_WA_23 "mediatek/mt7996/mt7992_wa_23.bin" |
| 221 | +#define MT7992_FIRMWARE_WM_23 "mediatek/mt7996/mt7992_wm_23.bin" |
| 222 | +#define MT7992_FIRMWARE_DSP_23 "mediatek/mt7996/mt7992_dsp_23.bin" |
| 223 | +#define MT7992_ROM_PATCH_23 "mediatek/mt7996/mt7992_rom_patch_23.bin" |
| 224 | + |
| 225 | #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin" |
| 226 | #define MT7996_EEPROM_DEFAULT_404 "mediatek/mt7996/mt7996_eeprom_dual_404.bin" |
| 227 | -#define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom.bin" |
| 228 | +#define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom_2i5i.bin" |
| 229 | +#define MT7992_EEPROM_DEFAULT_EXT "mediatek/mt7996/mt7992_eeprom_2e5e.bin" |
| 230 | +#define MT7992_EEPROM_DEFAULT_MIX "mediatek/mt7996/mt7992_eeprom_2i5e.bin" |
| 231 | +#define MT7992_EEPROM_DEFAULT_24 "mediatek/mt7996/mt7992_eeprom_24_2i5i.bin" |
| 232 | +#define MT7992_EEPROM_DEFAULT_23 "mediatek/mt7996/mt7992_eeprom_23_2i5i.bin" |
| 233 | +#define MT7992_EEPROM_DEFAULT_23_EXT "mediatek/mt7996/mt7992_eeprom_23_2e5e.bin" |
| 234 | #define MT7996_EEPROM_SIZE 7680 |
| 235 | #define MT7996_EEPROM_BLOCK_SIZE 16 |
| 236 | #define MT7996_TOKEN_SIZE 16384 |
| 237 | @@ -89,11 +104,24 @@ struct mt7996_sta; |
| 238 | struct mt7996_dfs_pulse; |
| 239 | struct mt7996_dfs_pattern; |
| 240 | |
| 241 | +enum mt7996_fem_type { |
| 242 | + MT7996_FEM_UNSET, |
| 243 | + MT7996_FEM_EXT, |
| 244 | + MT7996_FEM_INT, |
| 245 | + MT7996_FEM_MIX, |
| 246 | +}; |
| 247 | + |
| 248 | enum mt7996_sku_type { |
| 249 | MT7996_SKU_404, |
| 250 | MT7996_SKU_444, |
| 251 | }; |
| 252 | |
| 253 | +enum mt7992_sku_type { |
| 254 | + MT7992_SKU_23, |
| 255 | + MT7992_SKU_24, |
| 256 | + MT7992_SKU_44, |
| 257 | +}; |
| 258 | + |
| 259 | enum mt7996_ram_type { |
| 260 | MT7996_RAM_TYPE_WM, |
| 261 | MT7996_RAM_TYPE_WA, |
| 262 | @@ -264,6 +292,7 @@ struct mt7996_dev { |
| 263 | struct mt7996_phy *rdd2_phy; |
| 264 | |
| 265 | u8 chip_sku; |
| 266 | + u8 fem_type; |
| 267 | |
| 268 | u16 chainmask; |
| 269 | u8 chainshift[__MT_MAX_BAND]; |
developer | ebda901 | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 270 | @@ -406,23 +435,6 @@ mt7996_phy3(struct mt7996_dev *dev) |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 271 | return __mt7996_phy(dev, MT_BAND2); |
| 272 | } |
| 273 | |
| 274 | -static inline int |
| 275 | -mt7996_get_chip_sku(struct mt7996_dev *dev) |
| 276 | -{ |
| 277 | - u32 val = mt76_rr(dev, MT_PAD_GPIO); |
| 278 | - |
| 279 | - /* reserve for future variants */ |
| 280 | - switch (mt76_chip(&dev->mt76)) { |
| 281 | - case 0x7990: |
| 282 | - dev->chip_sku = FIELD_GET(MT_PAD_GPIO_ADIE_COMB, val) <= 1; |
| 283 | - break; |
| 284 | - default: |
| 285 | - return -EINVAL; |
| 286 | - } |
| 287 | - |
| 288 | - return 0; |
| 289 | -} |
| 290 | - |
| 291 | static inline bool |
| 292 | mt7996_band_valid(struct mt7996_dev *dev, u8 band) |
| 293 | { |
developer | ebda901 | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 294 | @@ -461,6 +473,7 @@ int mt7996_init_tx_queues(struct mt7996_phy *phy, int idx, |
developer | d243af0 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 295 | int n_desc, int ring_base, struct mtk_wed_device *wed); |
| 296 | void mt7996_init_txpower(struct mt7996_phy *phy); |
| 297 | int mt7996_txbf_init(struct mt7996_dev *dev); |
| 298 | +int mt7996_get_chip_sku(struct mt7996_dev *dev); |
| 299 | void mt7996_reset(struct mt7996_dev *dev); |
| 300 | int mt7996_run(struct ieee80211_hw *hw); |
| 301 | int mt7996_mcu_init(struct mt7996_dev *dev); |
| 302 | diff --git a/mt7996/regs.h b/mt7996/regs.h |
| 303 | index 47b429d8..cf12c5e0 100644 |
| 304 | --- a/mt7996/regs.h |
| 305 | +++ b/mt7996/regs.h |
| 306 | @@ -662,6 +662,13 @@ enum offs_rev { |
| 307 | |
| 308 | #define MT_PAD_GPIO 0x700056f0 |
| 309 | #define MT_PAD_GPIO_ADIE_COMB GENMASK(16, 15) |
| 310 | +#define MT_PAD_GPIO_ADIE_COMB_7992 GENMASK(17, 16) |
| 311 | +#define MT_PAD_GPIO_ADIE_NUM_7992 BIT(15) |
| 312 | + |
| 313 | +/* ADIE */ |
| 314 | +#define MT_ADIE_CHIP_ID(_idx) (0x0f00002c + ((_idx) << 28)) |
| 315 | +#define MT_ADIE_VERSION_MASK GENMASK(15, 0) |
| 316 | +#define MT_ADIE_CHIP_ID_MASK GENMASK(31, 16) |
| 317 | |
| 318 | #define MT_HW_REV 0x70010204 |
| 319 | #define MT_HW_REV1 0x8a00 |
| 320 | -- |
| 321 | 2.18.0 |
| 322 | |