blob: 3f327fc42109ff962b31f11a4e7d2eae6ac41f8d [file] [log] [blame]
developer7af62e72022-12-26 16:10:38 +08001From c7c415e89ab0e47caa0d0a8d6b62bc179a16c35a Mon Sep 17 00:00:00 2001
2From: Evelyn Tsai <evelyn.tsai@mediatek.com>
3Date: Fri, 23 Dec 2022 17:28:03 +0800
4Subject: [PATCH 4001/4003] mt76: mt7996: for build pass
5
6---
7 debugfs.c | 3 +++
8 dma.c | 4 ++--
9 mt7996/dma.c | 4 ++--
10 3 files changed, 7 insertions(+), 4 deletions(-)
11
12diff --git a/debugfs.c b/debugfs.c
13index 79064a4..e10d4cb 100644
14--- a/debugfs.c
15+++ b/debugfs.c
16@@ -33,8 +33,11 @@ mt76_napi_threaded_set(void *data, u64 val)
17 if (!mt76_is_mmio(dev))
18 return -EOPNOTSUPP;
19
20+#if 0
21+ /* need to backport patch from networking stack */
22 if (dev->napi_dev.threaded != val)
23 return dev_set_threaded(&dev->napi_dev, val);
24+#endif
25
26 return 0;
27 }
28diff --git a/dma.c b/dma.c
29index fc24b35..beb03cd 100644
30--- a/dma.c
31+++ b/dma.c
32@@ -627,7 +627,7 @@ mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q)
33
34 switch (type) {
35 case MT76_WED_Q_TX:
36- ret = mtk_wed_device_tx_ring_setup(wed, ring, q->regs);
37+ ret = mtk_wed_device_tx_ring_setup(wed, ring, q->regs, 0);
38 if (!ret)
39 q->wed_regs = wed->tx_ring[ring].reg_base;
40 break;
41@@ -643,7 +643,7 @@ mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q)
42 q->wed_regs = wed->txfree_ring.reg_base;
43 break;
44 case MT76_WED_Q_RX:
45- ret = mtk_wed_device_rx_ring_setup(wed, ring, q->regs);
46+ ret = mtk_wed_device_rx_ring_setup(wed, ring, q->regs, 0);
47 if (!ret)
48 q->wed_regs = wed->rx_ring[ring].reg_base;
49 break;
50diff --git a/mt7996/dma.c b/mt7996/dma.c
51index c09fe42..8c2e060 100644
52--- a/mt7996/dma.c
53+++ b/mt7996/dma.c
54@@ -343,8 +343,8 @@ int mt7996_dma_init(struct mt7996_dev *dev)
55 if (ret < 0)
56 return ret;
57
58- netif_napi_add_tx(&dev->mt76.tx_napi_dev, &dev->mt76.tx_napi,
59- mt7996_poll_tx);
60+ netif_tx_napi_add(&dev->mt76.tx_napi_dev, &dev->mt76.tx_napi,
61+ mt7996_poll_tx, NAPI_POLL_WEIGHT);
62 napi_enable(&dev->mt76.tx_napi);
63
64 mt7996_dma_enable(dev);
65--
662.36.1
67