blob: c83e758ecf4ee68342a664682ca8b2fd373094c1 [file] [log] [blame]
developerd243af02023-12-21 14:49:33 +08001From a873e1dc3b0de28f1ef61e96b46a55ee7c4294bf Mon Sep 17 00:00:00 2001
developer99c20a72023-08-18 17:03:34 +08002From: "Allen.Ye" <allen.ye@mediatek.com>
3Date: Fri, 11 Aug 2023 16:46:53 +0800
developerd243af02023-12-21 14:49:33 +08004Subject: [PATCH 48/76] wifi: mt76: mt7915: Disable RegDB when enable single
5 sku
developer99c20a72023-08-18 17:03:34 +08006
7---
developere35b8e42023-10-16 11:04:00 +08008 mt7915/debugfs.c | 49 +++++++++++++++++++++++++++++++++++++++++++-----
developerbf0f2d62023-11-14 17:01:47 +08009 mt7915/init.c | 11 +++++++++--
developere35b8e42023-10-16 11:04:00 +080010 mt7915/regs.h | 8 ++++----
developerd243af02023-12-21 14:49:33 +080011 3 files changed, 57 insertions(+), 11 deletions(-)
developer99c20a72023-08-18 17:03:34 +080012
developer99c20a72023-08-18 17:03:34 +080013diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c
developere35b8e42023-10-16 11:04:00 +080014index 2bf907c..6dcee10 100644
developer99c20a72023-08-18 17:03:34 +080015--- a/mt7915/debugfs.c
16+++ b/mt7915/debugfs.c
17@@ -1019,10 +1019,16 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf,
18 {
19 struct mt7915_phy *phy = file->private_data;
20 struct mt7915_dev *dev = phy->dev;
21+ struct ieee80211_channel *chan = phy->mt76->chandef.chan;
22+ struct ieee80211_supported_band sband;
23 s8 txpwr[MT7915_SKU_RATE_NUM];
24- static const size_t sz = 2048;
25+ static const size_t sz = 4096;
26 u8 band = phy->mt76->band_idx;
27 int i, offs = 0, len = 0;
28+ u32 target_power = 0;
29+ int n_chains = hweight16(phy->mt76->chainmask);
30+ int nss_delta = mt76_tx_power_nss_delta(n_chains);
31+ int pwr_delta;
32 ssize_t ret;
33 char *buf;
34 u32 reg;
developere35b8e42023-10-16 11:04:00 +080035@@ -1081,11 +1087,38 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf,
36 len += scnprintf(buf + len, sz - len, "BW160/");
37 mt7915_txpower_puts(HE_RU2x996, 17);
38
39- reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_TPC_CTRL_STAT(band) :
40- MT_WF_PHY_TPC_CTRL_STAT_MT7916(band);
41+ reg = is_mt7915(&dev->mt76) ? MT_WF_IRPI_TPC_CTRL_STAT(band) :
42+ MT_WF_IRPI_TPC_CTRL_STAT_MT7916(band);
developer99c20a72023-08-18 17:03:34 +080043
44- len += scnprintf(buf + len, sz - len, "\nTx power (bbp) : %6ld\n",
developere35b8e42023-10-16 11:04:00 +080045- mt76_get_field(dev, reg, MT_WF_PHY_TPC_POWER));
developer99c20a72023-08-18 17:03:34 +080046+ len += scnprintf(buf + len, sz - len, "\nTx power (bbp) : %6ld [0.5 dBm]\n",
developere35b8e42023-10-16 11:04:00 +080047+ mt76_get_field(dev, reg, MT_WF_IRPI_TPC_POWER));
48+
developer99c20a72023-08-18 17:03:34 +080049+ len += scnprintf(buf + len, sz - len, "RegDB maximum power:\t%d [dBm]\n",
50+ chan->max_reg_power);
51+
52+ if (chan->band == NL80211_BAND_2GHZ)
53+ sband = phy->mt76->sband_2g.sband;
54+ else if (chan->band == NL80211_BAND_5GHZ)
55+ sband = phy->mt76->sband_5g.sband;
56+ else if (chan->band == NL80211_BAND_6GHZ)
57+ sband = phy->mt76->sband_6g.sband;
58+
59+ pwr_delta = mt7915_eeprom_get_power_delta(dev, sband.band);
60+
61+ for (i = 0; i < n_chains; i++) {
62+ u32 val;
63+
64+ val = mt7915_eeprom_get_target_power(dev, chan, i);
65+ target_power = max(target_power, val);
66+ }
67+
68+ target_power += pwr_delta + nss_delta;
69+ target_power = DIV_ROUND_UP(target_power, 2);
70+ len += scnprintf(buf + len, sz - len, "eeprom maximum power:\t%d [dBm]\n",
71+ target_power);
72+
73+ len += scnprintf(buf + len, sz - len, "nss_delta:\t%d [0.5 dBm]\n",
74+ nss_delta);
developere35b8e42023-10-16 11:04:00 +080075
developer99c20a72023-08-18 17:03:34 +080076 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
77
developer99c20a72023-08-18 17:03:34 +080078@@ -1262,6 +1295,8 @@ static int
79 mt7915_txpower_info_show(struct seq_file *file, void *data)
80 {
81 struct mt7915_phy *phy = file->private;
82+ struct mt76_phy *mphy = phy->mt76;
83+ struct mt76_dev *dev = mphy->dev;
84 struct {
85 u8 category;
86 u8 rsv1;
87@@ -1303,6 +1338,7 @@ mt7915_txpower_info_show(struct seq_file *file, void *data)
88 s8 mu_tx_power_manual;
89 u8 rsv3;
90 } __packed basic_info = {};
91+ struct device_node *np;
92 int ret;
93
94 ret = mt7915_mcu_get_txpower_sku(phy, (s8 *)&basic_info, sizeof(basic_info),
95@@ -1337,6 +1373,9 @@ mt7915_txpower_info_show(struct seq_file *file, void *data)
96 seq_printf(file, " Theraml Compensation Value: %d\n",
97 basic_info.thermal_compensate_value);
98
99+ np = mt76_find_power_limits_node(dev);
100+ seq_printf(file, " RegDB: %s\n", !np ? "enable" : "disable");
101+
102 out:
103 return ret;
104 }
105diff --git a/mt7915/init.c b/mt7915/init.c
developerd243af02023-12-21 14:49:33 +0800106index a44d3fa..2b002df 100644
developer99c20a72023-08-18 17:03:34 +0800107--- a/mt7915/init.c
108+++ b/mt7915/init.c
developerd243af02023-12-21 14:49:33 +0800109@@ -283,9 +283,11 @@ static void __mt7915_init_txpower(struct mt7915_phy *phy,
developer99c20a72023-08-18 17:03:34 +0800110 int nss_delta = mt76_tx_power_nss_delta(n_chains);
111 int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
112 struct mt76_power_limits limits;
113+ struct device_node *np;
114
developerbf0f2d62023-11-14 17:01:47 +0800115 phy->sku_limit_en = true;
116 phy->sku_path_en = true;
developer99c20a72023-08-18 17:03:34 +0800117+ np = mt76_find_power_limits_node(&dev->mt76);
118 for (i = 0; i < sband->n_channels; i++) {
119 struct ieee80211_channel *chan = &sband->channels[i];
120 u32 target_power = 0;
developerd243af02023-12-21 14:49:33 +0800121@@ -309,8 +311,13 @@ static void __mt7915_init_txpower(struct mt7915_phy *phy,
developerbf0f2d62023-11-14 17:01:47 +0800122
developer99c20a72023-08-18 17:03:34 +0800123 target_power += nss_delta;
124 target_power = DIV_ROUND_UP(target_power, 2);
125- chan->max_power = min_t(int, chan->max_reg_power,
developerbf0f2d62023-11-14 17:01:47 +0800126- target_power);
developer99c20a72023-08-18 17:03:34 +0800127+
128+ /* can NOT find country node in dts */
129+ if (!np)
130+ chan->max_power = min_t(int, chan->max_reg_power,
developerbf0f2d62023-11-14 17:01:47 +0800131+ target_power);
developer99c20a72023-08-18 17:03:34 +0800132+ else
133+ chan->max_power = target_power;
134 chan->orig_mpwr = target_power;
135 }
136 }
developere35b8e42023-10-16 11:04:00 +0800137diff --git a/mt7915/regs.h b/mt7915/regs.h
138index 1f1f8b9..3c2fd2d 100644
139--- a/mt7915/regs.h
140+++ b/mt7915/regs.h
141@@ -1213,6 +1213,10 @@ enum offs_rev {
142 #define MT_WF_IRPI_NSS(phy, nss) MT_WF_IRPI(0x6000 + ((phy) << 20) + ((nss) << 16))
143 #define MT_WF_IRPI_NSS_MT7916(phy, nss) MT_WF_IRPI(0x1000 + ((phy) << 20) + ((nss) << 16))
144
145+#define MT_WF_IRPI_TPC_CTRL_STAT(_phy) MT_WF_IRPI(0xc794 + ((_phy) << 16))
146+#define MT_WF_IRPI_TPC_CTRL_STAT_MT7916(_phy) MT_WF_IRPI(0xc794 + ((_phy) << 20))
147+#define MT_WF_IRPI_TPC_POWER GENMASK(31, 24)
148+
149 #define MT_WF_IPI_RESET 0x831a3008
150
151 /* PHY */
152@@ -1229,10 +1233,6 @@ enum offs_rev {
153 #define MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY BIT(18)
154 #define MT_WF_PHY_RXTD12_IRPI_SW_CLR BIT(29)
155
156-#define MT_WF_PHY_TPC_CTRL_STAT(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 16))
157-#define MT_WF_PHY_TPC_CTRL_STAT_MT7916(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 20))
158-#define MT_WF_PHY_TPC_POWER GENMASK(15, 8)
159-
160 #define MT_MCU_WM_CIRQ_BASE 0x89010000
161 #define MT_MCU_WM_CIRQ(ofs) (MT_MCU_WM_CIRQ_BASE + (ofs))
162 #define MT_MCU_WM_CIRQ_IRQ_MASK_CLR_ADDR MT_MCU_WM_CIRQ(0x80)
developer99c20a72023-08-18 17:03:34 +0800163--
1642.18.0
165