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developerd0c89452024-10-11 16:53:27 +08001From 261d876ae90ba658963a1aae901a4f513e56684e Mon Sep 17 00:00:00 2001
developer05f3b2b2024-08-19 19:17:34 +08002From: Peter Chiu <chui-hao.chiu@mediatek.com>
3Date: Mon, 15 Jul 2024 11:42:47 +0800
developerd0c89452024-10-11 16:53:27 +08004Subject: [PATCH 167/223] mtk: mt76: mt7996: fill in sn into txd for MLD
developer05f3b2b2024-08-19 19:17:34 +08005 multicast packet
6
developerd0c89452024-10-11 16:53:27 +08007Change-Id: I09d3dd71aee227f7b8ef06756064b0d4079e7d54
developer05f3b2b2024-08-19 19:17:34 +08008Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
9---
10 mt7996/mac.c | 9 +++++++--
11 1 file changed, 7 insertions(+), 2 deletions(-)
12
13diff --git a/mt7996/mac.c b/mt7996/mac.c
developerd0c89452024-10-11 16:53:27 +080014index 8c68e08e..1952cb0c 100644
developer05f3b2b2024-08-19 19:17:34 +080015--- a/mt7996/mac.c
16+++ b/mt7996/mac.c
developerd0c89452024-10-11 16:53:27 +080017@@ -693,6 +693,7 @@ mt7996_mac_write_txwi_80211(struct mt7996_dev *dev, __le32 *txwi,
developer05f3b2b2024-08-19 19:17:34 +080018 bool multicast = is_multicast_ether_addr(hdr->addr1);
19 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
20 __le16 fc = hdr->frame_control, sc = hdr->seq_ctrl;
21+ u16 seqno = le16_to_cpu(sc);
22 u8 fc_type, fc_stype;
23 u32 val;
24
developerd0c89452024-10-11 16:53:27 +080025@@ -751,9 +752,13 @@ mt7996_mac_write_txwi_80211(struct mt7996_dev *dev, __le32 *txwi,
developer05f3b2b2024-08-19 19:17:34 +080026 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT);
27 }
28
29- if (info->flags & IEEE80211_TX_CTL_INJECTED) {
30- u16 seqno = le16_to_cpu(sc);
31+ if (ieee80211_vif_is_mld(info->control.vif) && multicast) {
32+ val = MT_TXD3_SN_VALID |
33+ FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));
34+ txwi[3] |= cpu_to_le32(val);
35+ }
36
37+ if (info->flags & IEEE80211_TX_CTL_INJECTED) {
38 if (ieee80211_is_back_req(hdr->frame_control)) {
39 struct ieee80211_bar *bar;
40
41--
developerd0c89452024-10-11 16:53:27 +0800422.45.2
developer05f3b2b2024-08-19 19:17:34 +080043