developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 1 | From eafc607f276a54844224670c0fff6b92ebe5af09 Mon Sep 17 00:00:00 2001 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 2 | From: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| 3 | Date: Tue, 5 Dec 2023 16:48:33 +0800 |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 4 | Subject: [PATCH 052/116] mtk: wifi: mt7996: add Eagle 2adie TBTC (BE14000) |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 5 | support |
| 6 | |
| 7 | Add fwdl/default eeprom load support for Eagle 2 adie TBTC |
| 8 | |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 9 | Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| 10 | |
| 11 | Add Eagle 2adie TBTC efuse merge |
| 12 | Add Eagle 2adie TBTC group prek size |
| 13 | |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 14 | Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| 15 | --- |
| 16 | mt7996/eeprom.c | 8 ++++++-- |
| 17 | mt7996/eeprom.h | 12 ++++++++++++ |
| 18 | mt7996/init.c | 6 ++++++ |
| 19 | mt7996/mcu.c | 5 +++++ |
| 20 | mt7996/mt7996.h | 8 ++++++++ |
| 21 | mt7996/regs.h | 1 + |
| 22 | 6 files changed, 38 insertions(+), 2 deletions(-) |
| 23 | |
| 24 | diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 25 | index 3cdd585..5eb8629 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 26 | --- a/mt7996/eeprom.c |
| 27 | +++ b/mt7996/eeprom.c |
| 28 | @@ -158,6 +158,8 @@ const char *mt7996_eeprom_name(struct mt7996_dev *dev) |
| 29 | case 0x7990: |
| 30 | if (dev->chip_sku == MT7996_SKU_404) |
| 31 | return MT7996_EEPROM_DEFAULT_404; |
| 32 | + else if (dev->chip_sku == MT7996_SKU_233) |
| 33 | + return MT7996_EEPROM_DEFAULT_233; |
| 34 | |
| 35 | if (dev->fem_type == MT7996_FEM_INT) |
| 36 | return MT7996_EEPROM_DEFAULT_INT; |
| 37 | @@ -450,6 +452,8 @@ static void mt7996_eeprom_init_precal(struct mt7996_dev *dev) |
| 38 | switch (mt76_chip(&dev->mt76)) { |
| 39 | case 0x7990: |
| 40 | dev->prek.rev = mt7996_prek_rev; |
| 41 | + if (dev->chip_sku == MT7996_SKU_233) |
| 42 | + dev->prek.rev = mt7996_prek_rev_233; |
| 43 | /* 5g & 6g bw 80 dpd channel list is not used */ |
| 44 | dev->prek.dpd_ch_num[DPD_CH_NUM_BW320_6G] = ARRAY_SIZE(dpd_6g_ch_list_bw320); |
| 45 | break; |
| 46 | @@ -553,7 +557,7 @@ static int mt7996_apply_cal_free_data(struct mt7996_dev *dev) |
| 47 | case 0x7990: |
| 48 | adie_base = adie_base_7996; |
| 49 | /* adie 0 */ |
| 50 | - if (dev->fem_type == MT7996_FEM_INT) |
| 51 | + if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_SKU_233) |
| 52 | adie_id = ADIE_7975; |
| 53 | else |
| 54 | adie_id = ADIE_7976; |
| 55 | @@ -561,7 +565,7 @@ static int mt7996_apply_cal_free_data(struct mt7996_dev *dev) |
| 56 | eep_offs[0] = eep_offs_list[adie_id]; |
| 57 | |
| 58 | /* adie 1 */ |
| 59 | - if (dev->chip_sku != MT7996_SKU_404) { |
| 60 | + if (dev->chip_sku == MT7996_SKU_444) { |
| 61 | adie_offs[1] = adie_offs_list[ADIE_7977]; |
| 62 | eep_offs[1] = eep_offs_list[ADIE_7977]; |
| 63 | } |
| 64 | diff --git a/mt7996/eeprom.h b/mt7996/eeprom.h |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 65 | index fa9c31e..43c9783 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 66 | --- a/mt7996/eeprom.h |
| 67 | +++ b/mt7996/eeprom.h |
| 68 | @@ -70,6 +70,18 @@ static const u32 mt7996_prek_rev[] = { |
| 69 | [DPD_OTFG0_SIZE] = 2 * MT_EE_CAL_UNIT, |
| 70 | }; |
| 71 | |
| 72 | +static const u32 mt7996_prek_rev_233[] = { |
| 73 | + [GROUP_SIZE_2G] = 4 * MT_EE_CAL_UNIT, |
| 74 | + [GROUP_SIZE_5G] = 44 * MT_EE_CAL_UNIT, |
| 75 | + [GROUP_SIZE_6G] = 100 * MT_EE_CAL_UNIT, |
| 76 | + [ADCDCOC_SIZE_2G] = 4 * 4, |
| 77 | + [ADCDCOC_SIZE_5G] = 4 * 4, |
| 78 | + [ADCDCOC_SIZE_6G] = 4 * 5, |
| 79 | + [DPD_LEGACY_SIZE] = 4 * MT_EE_CAL_UNIT, |
| 80 | + [DPD_MEM_SIZE] = 13 * MT_EE_CAL_UNIT, |
| 81 | + [DPD_OTFG0_SIZE] = 2 * MT_EE_CAL_UNIT, |
| 82 | +}; |
| 83 | + |
| 84 | /* kite 2/5g config */ |
| 85 | static const u32 mt7992_prek_rev[] = { |
| 86 | [GROUP_SIZE_2G] = 4 * MT_EE_CAL_UNIT, |
| 87 | diff --git a/mt7996/init.c b/mt7996/init.c |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 88 | index d4b0a72..cb00322 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 89 | --- a/mt7996/init.c |
| 90 | +++ b/mt7996/init.c |
| 91 | @@ -916,6 +916,12 @@ int mt7996_get_chip_sku(struct mt7996_dev *dev) |
| 92 | |
| 93 | switch (mt76_chip(&dev->mt76)) { |
| 94 | case 0x7990: |
| 95 | + if (FIELD_GET(MT_PAD_GPIO_2ADIE_TBTC, val)) { |
| 96 | + dev->chip_sku = MT7996_SKU_233; |
| 97 | + dev->fem_type = MT7996_FEM_INT; |
| 98 | + return 0; |
| 99 | + } |
| 100 | + |
| 101 | adie_comb = FIELD_GET(MT_PAD_GPIO_ADIE_COMB, val); |
| 102 | if (adie_comb <= 1) |
| 103 | dev->chip_sku = MT7996_SKU_444; |
| 104 | diff --git a/mt7996/mcu.c b/mt7996/mcu.c |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 105 | index 1a904e4..686cdda 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 106 | --- a/mt7996/mcu.c |
| 107 | +++ b/mt7996/mcu.c |
| 108 | @@ -23,6 +23,11 @@ |
| 109 | _fw = MT7992_##name; \ |
| 110 | break; \ |
| 111 | case 0x7990: \ |
| 112 | + if ((_dev)->chip_sku == MT7996_SKU_233) \ |
| 113 | + _fw = MT7996_##name##_233; \ |
| 114 | + else \ |
| 115 | + _fw = MT7996_##name; \ |
| 116 | + break; \ |
| 117 | default: \ |
| 118 | _fw = MT7996_##name; \ |
| 119 | break; \ |
| 120 | diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 121 | index 1bba545..72865c8 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 122 | --- a/mt7996/mt7996.h |
| 123 | +++ b/mt7996/mt7996.h |
| 124 | @@ -35,6 +35,12 @@ |
| 125 | #define MT7996_FIRMWARE_WM_TM "mediatek/mt7996/mt7996_wm_tm.bin" |
| 126 | #define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin" |
| 127 | |
| 128 | +#define MT7996_FIRMWARE_WA_233 "mediatek/mt7996/mt7996_wa_233.bin" |
| 129 | +#define MT7996_FIRMWARE_WM_233 "mediatek/mt7996/mt7996_wm_233.bin" |
| 130 | +#define MT7996_FIRMWARE_DSP_233 MT7996_FIRMWARE_DSP |
| 131 | +#define MT7996_FIRMWARE_WM_TM_233 "mediatek/mt7996/mt7996_wm_tm_233.bin" |
| 132 | +#define MT7996_ROM_PATCH_233 "mediatek/mt7996/mt7996_rom_patch_233.bin" |
| 133 | + |
| 134 | #define MT7992_FIRMWARE_WA "mediatek/mt7996/mt7992_wa.bin" |
| 135 | #define MT7992_FIRMWARE_WM "mediatek/mt7996/mt7992_wm.bin" |
| 136 | #define MT7992_FIRMWARE_DSP "mediatek/mt7996/mt7992_dsp.bin" |
| 137 | @@ -55,6 +61,7 @@ |
| 138 | |
| 139 | #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin" |
| 140 | #define MT7996_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7996_eeprom_2i5i6i.bin" |
| 141 | +#define MT7996_EEPROM_DEFAULT_233 "mediatek/mt7996/mt7996_eeprom_233.bin" |
| 142 | #define MT7996_EEPROM_DEFAULT_404 "mediatek/mt7996/mt7996_eeprom_dual_404.bin" |
| 143 | #define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom_2i5i.bin" |
| 144 | #define MT7992_EEPROM_DEFAULT_EXT "mediatek/mt7996/mt7992_eeprom_2e5e.bin" |
| 145 | @@ -122,6 +129,7 @@ enum mt7996_fem_type { |
| 146 | enum mt7996_sku_type { |
| 147 | MT7996_SKU_404, |
| 148 | MT7996_SKU_444, |
| 149 | + MT7996_SKU_233, |
| 150 | }; |
| 151 | |
| 152 | enum mt7992_sku_type { |
| 153 | diff --git a/mt7996/regs.h b/mt7996/regs.h |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 154 | index 263737c..91159c6 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 155 | --- a/mt7996/regs.h |
| 156 | +++ b/mt7996/regs.h |
| 157 | @@ -666,6 +666,7 @@ enum offs_rev { |
| 158 | |
| 159 | #define MT_PAD_GPIO 0x700056f0 |
| 160 | #define MT_PAD_GPIO_ADIE_COMB GENMASK(16, 15) |
| 161 | +#define MT_PAD_GPIO_2ADIE_TBTC BIT(19) |
| 162 | #define MT_PAD_GPIO_ADIE_COMB_7992 GENMASK(17, 16) |
| 163 | #define MT_PAD_GPIO_ADIE_NUM_7992 BIT(15) |
| 164 | |
| 165 | -- |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 166 | 2.18.0 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 167 | |