developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 1 | From 786203d2878c468d179ec324c9d91b331e09e16a Mon Sep 17 00:00:00 2001 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 2 | From: Howard Hsu <howard-yh.hsu@mediatek.com> |
| 3 | Date: Tue, 13 Jun 2023 14:49:02 +0800 |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 4 | Subject: [PATCH 043/116] mtk: wifi: mt76: mt7996: add build the following MURU |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 5 | mcu command tlvs |
| 6 | |
| 7 | It includes the following tlvs: |
| 8 | 1. MURU tlv id 0x10, 0x33, 0xC8, 0xC9, 0xCA, 0xCC, 0xCD |
| 9 | 2. BF tlv id 0x1c |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 10 | --- |
| 11 | mt7996/mcu.h | 1 + |
| 12 | mt7996/mt7996.h | 3 ++ |
| 13 | mt7996/mtk_debugfs.c | 12 +++++++ |
| 14 | mt7996/mtk_mcu.c | 78 ++++++++++++++++++++++++++++++++++++++++++++ |
| 15 | mt7996/mtk_mcu.h | 14 ++++++++ |
| 16 | 5 files changed, 108 insertions(+) |
| 17 | |
| 18 | diff --git a/mt7996/mcu.h b/mt7996/mcu.h |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 19 | index 29bd7a5..848c85d 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 20 | --- a/mt7996/mcu.h |
| 21 | +++ b/mt7996/mcu.h |
| 22 | @@ -776,6 +776,7 @@ enum { |
| 23 | BF_MOD_EN_CTRL = 20, |
| 24 | BF_FBRPT_DBG_INFO_READ = 23, |
| 25 | BF_TXSND_INFO = 24, |
| 26 | + BF_CFG_PHY = 28, |
| 27 | }; |
| 28 | |
| 29 | enum { |
| 30 | diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 31 | index 4602b4e..205a3c7 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 32 | --- a/mt7996/mt7996.h |
| 33 | +++ b/mt7996/mt7996.h |
| 34 | @@ -821,6 +821,9 @@ void mt7996_mcu_rx_bf_event(struct mt7996_dev *dev, struct sk_buff *skb); |
| 35 | int mt7996_mcu_set_muru_fixed_rate_enable(struct mt7996_dev *dev, u8 action, int val); |
| 36 | int mt7996_mcu_set_muru_fixed_rate_parameter(struct mt7996_dev *dev, u8 action, void *para); |
| 37 | int mt7996_mcu_set_txbf_snd_info(struct mt7996_phy *phy, void *para); |
| 38 | +int mt7996_mcu_set_muru_cmd(struct mt7996_dev *dev, u16 action, int val); |
| 39 | +int mt7996_mcu_muru_set_prot_frame_thr(struct mt7996_dev *dev, u32 val); |
| 40 | +int mt7996_mcu_set_bypass_smthint(struct mt7996_phy *phy, u8 val); |
| 41 | #endif |
| 42 | |
| 43 | #ifdef CONFIG_NET_MEDIATEK_SOC_WED |
| 44 | diff --git a/mt7996/mtk_debugfs.c b/mt7996/mtk_debugfs.c |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 45 | index 0851d65..b7fef1b 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 46 | --- a/mt7996/mtk_debugfs.c |
| 47 | +++ b/mt7996/mtk_debugfs.c |
| 48 | @@ -3064,6 +3064,16 @@ static const struct file_operations fops_muru_fixed_group_rate = { |
| 49 | .llseek = default_llseek, |
| 50 | }; |
| 51 | |
| 52 | +static int mt7996_muru_prot_thr_set(void *data, u64 val) |
| 53 | +{ |
| 54 | + struct mt7996_phy *phy = data; |
| 55 | + |
| 56 | + return mt7996_mcu_muru_set_prot_frame_thr(phy->dev, (u32)val); |
| 57 | +} |
| 58 | + |
| 59 | +DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_prot_thr, NULL, |
| 60 | + mt7996_muru_prot_thr_set, "%lld\n"); |
| 61 | + |
| 62 | int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir) |
| 63 | { |
| 64 | struct mt7996_dev *dev = phy->dev; |
| 65 | @@ -3159,6 +3169,8 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir) |
| 66 | debugfs_create_file("bf_fbk_rpt", 0600, dir, phy, &fops_bf_fbk_rpt); |
| 67 | debugfs_create_file("pfmu_tag_read", 0600, dir, phy, &fops_bf_pfmu_tag_read); |
| 68 | |
| 69 | + debugfs_create_file("muru_prot_thr", 0200, dir, phy, &fops_muru_prot_thr); |
| 70 | + |
| 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | diff --git a/mt7996/mtk_mcu.c b/mt7996/mtk_mcu.c |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 75 | index 6b2cdad..6865062 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 76 | --- a/mt7996/mtk_mcu.c |
| 77 | +++ b/mt7996/mtk_mcu.c |
| 78 | @@ -904,4 +904,82 @@ error: |
| 79 | return -EINVAL; |
| 80 | } |
| 81 | |
| 82 | +/** |
| 83 | + * This function can be used to build the following commands |
| 84 | + * MURU_SUTX_CTRL (0x10) |
| 85 | + * SET_FORCE_MU (0x33) |
| 86 | + * SET_MUDL_ACK_POLICY (0xC8) |
| 87 | + * SET_TRIG_TYPE (0xC9) |
| 88 | + * SET_20M_DYN_ALGO (0xCA) |
| 89 | + * SET_CERT_MU_EDCA_OVERRIDE (0xCD) |
| 90 | + */ |
| 91 | +int mt7996_mcu_set_muru_cmd(struct mt7996_dev *dev, u16 action, int val) |
| 92 | +{ |
| 93 | + struct { |
| 94 | + u8 _rsv[4]; |
| 95 | + |
| 96 | + __le16 tag; |
| 97 | + __le16 len; |
| 98 | + |
| 99 | + u8 config; |
| 100 | + u8 rsv[3]; |
| 101 | + } __packed data = { |
| 102 | + .tag = cpu_to_le16(action), |
| 103 | + .len = cpu_to_le16(sizeof(data) - 4), |
| 104 | + .config = (u8) val, |
| 105 | + }; |
| 106 | + |
| 107 | + return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(MURU), &data, sizeof(data), |
| 108 | + false); |
| 109 | +} |
| 110 | + |
| 111 | +int mt7996_mcu_muru_set_prot_frame_thr(struct mt7996_dev *dev, u32 val) |
| 112 | +{ |
| 113 | + struct { |
| 114 | + u8 _rsv[4]; |
| 115 | + |
| 116 | + __le16 tag; |
| 117 | + __le16 len; |
| 118 | + |
| 119 | + __le32 prot_frame_thr; |
| 120 | + } __packed data = { |
| 121 | + .tag = cpu_to_le16(UNI_CMD_MURU_PROT_FRAME_THR), |
| 122 | + .len = cpu_to_le16(sizeof(data) - 4), |
| 123 | + .prot_frame_thr = cpu_to_le32(val), |
| 124 | + }; |
| 125 | + |
| 126 | + return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(MURU), &data, sizeof(data), |
| 127 | + false); |
| 128 | +} |
| 129 | + |
| 130 | +int mt7996_mcu_set_bypass_smthint(struct mt7996_phy *phy, u8 val) |
| 131 | +{ |
| 132 | +#define BF_PHY_SMTH_INT_BYPASS 0 |
| 133 | +#define BYPASS_VAL 1 |
| 134 | + struct mt7996_dev *dev = phy->dev; |
| 135 | + struct { |
| 136 | + u8 _rsv[4]; |
| 137 | + |
| 138 | + u16 tag; |
| 139 | + u16 len; |
| 140 | + |
| 141 | + u8 action; |
| 142 | + u8 band_idx; |
| 143 | + u8 smthintbypass; |
| 144 | + u8 __rsv2[5]; |
| 145 | + } __packed data = { |
| 146 | + .tag = cpu_to_le16(BF_CFG_PHY), |
| 147 | + .len = cpu_to_le16(sizeof(data) - 4), |
| 148 | + .action = BF_PHY_SMTH_INT_BYPASS, |
| 149 | + .band_idx = phy->mt76->band_idx, |
| 150 | + .smthintbypass = val, |
| 151 | + }; |
| 152 | + |
| 153 | + if (val != BYPASS_VAL) |
| 154 | + return -EINVAL; |
| 155 | + |
| 156 | + return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(BF), &data, sizeof(data), |
| 157 | + true); |
| 158 | +} |
| 159 | + |
| 160 | #endif |
| 161 | diff --git a/mt7996/mtk_mcu.h b/mt7996/mtk_mcu.h |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 162 | index 27d6a05..d9686eb 100644 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 163 | --- a/mt7996/mtk_mcu.h |
| 164 | +++ b/mt7996/mtk_mcu.h |
| 165 | @@ -119,6 +119,20 @@ enum { |
| 166 | EDCCA_FCC = 1, |
| 167 | EDCCA_ETSI = 2, |
| 168 | EDCCA_JAPAN = 3 |
| 169 | +}; |
| 170 | + |
| 171 | +enum { |
| 172 | + UNI_CMD_MURU_SUTX_CTRL = 0x10, |
| 173 | + UNI_CMD_MURU_FIXED_RATE_CTRL, |
| 174 | + UNI_CMD_MURU_FIXED_GROUP_RATE_CTRL, |
| 175 | + UNI_CMD_MURU_SET_FORCE_MU = 0x33, |
| 176 | + UNI_CMD_MURU_MUNUAL_CONFIG = 0x64, |
| 177 | + UNI_CMD_MURU_SET_MUDL_ACK_POLICY = 0xC9, |
| 178 | + UNI_CMD_MURU_SET_TRIG_TYPE, |
| 179 | + UNI_CMD_MURU_SET_20M_DYN_ALGO, |
| 180 | + UNI_CMD_MURU_PROT_FRAME_THR = 0xCC, |
| 181 | + UNI_CMD_MURU_SET_CERT_MU_EDCA_OVERRIDE, |
| 182 | +}; |
| 183 | |
| 184 | struct bf_pfmu_tag { |
| 185 | __le16 tag; |
| 186 | -- |
developer | 9237f44 | 2024-06-14 17:13:04 +0800 | [diff] [blame] | 187 | 2.18.0 |
developer | 66e89bc | 2024-04-23 14:50:01 +0800 | [diff] [blame] | 188 | |