developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 1 | From 369397e8762832dc633ade7407852acb235fd4aa Mon Sep 17 00:00:00 2001 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 2 | From: Yi-Chia Hsieh <Yi-Chia.Hsieh@mediatek.com> |
| 3 | Date: Thu, 21 Jul 2022 10:56:09 -0700 |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 4 | Subject: [PATCH 3005/3006] mt76: mt7915: add statistic for H/W Tx Path |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 5 | |
| 6 | Set PPDU_TXS2H_EN_B0/B1 to get PPDU txs. |
| 7 | Add MT_PACKET_ID_WED for PPDU txs, and change MT_PACKET_ID_FIRST to 3 |
| 8 | to differentiate. We also need do byte cnt and pkt cnt for S/W path since |
| 9 | we report it directly from mt7915_sta_statistics. |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 10 | --- |
| 11 | mt76.h | 49 ++++++++++++++++------------- |
| 12 | mt76_connac.h | 5 +-- |
| 13 | mt76_connac2_mac.h | 14 +++++++++ |
| 14 | mt76_connac_mac.c | 77 +++++++++++++++++++++++++++++----------------- |
| 15 | mt7915/mac.c | 12 ++++---- |
| 16 | mt7915/main.c | 16 +++++++++- |
| 17 | mt7915/mmio.c | 22 +++++++++++++ |
| 18 | mt7915/mt7915.h | 2 -- |
| 19 | mt7915/regs.h | 4 +++ |
| 20 | mt7921/mt7921.h | 1 - |
| 21 | 10 files changed, 141 insertions(+), 61 deletions(-) |
| 22 | |
| 23 | diff --git a/mt76.h b/mt76.h |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 24 | index 2ad3900..c6f3ef7 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 25 | --- a/mt76.h |
| 26 | +++ b/mt76.h |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 27 | @@ -275,6 +275,30 @@ DECLARE_EWMA(signal, 10, 8); |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 28 | #define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18) |
| 29 | #define MT_WCID_TX_INFO_SET BIT(31) |
| 30 | |
| 31 | +enum mt76_phy_type { |
| 32 | + MT_PHY_TYPE_CCK, |
| 33 | + MT_PHY_TYPE_OFDM, |
| 34 | + MT_PHY_TYPE_HT, |
| 35 | + MT_PHY_TYPE_HT_GF, |
| 36 | + MT_PHY_TYPE_VHT, |
| 37 | + MT_PHY_TYPE_HE_SU = 8, |
| 38 | + MT_PHY_TYPE_HE_EXT_SU, |
| 39 | + MT_PHY_TYPE_HE_TB, |
| 40 | + MT_PHY_TYPE_HE_MU, |
| 41 | + __MT_PHY_TYPE_HE_MAX, |
| 42 | +}; |
| 43 | + |
| 44 | +struct mt76_sta_stats { |
| 45 | + u64 tx_mode[__MT_PHY_TYPE_HE_MAX]; |
| 46 | + u64 tx_bw[4]; /* 20, 40, 80, 160 */ |
| 47 | + u64 tx_nss[4]; /* 1, 2, 3, 4 */ |
| 48 | + u64 tx_mcs[16]; /* mcs idx */ |
| 49 | + u64 tx_bytes; |
| 50 | + u32 tx_packets; |
| 51 | + u32 tx_retries; |
| 52 | + u32 tx_failed; |
| 53 | +}; |
| 54 | + |
| 55 | struct mt76_wcid { |
| 56 | struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS]; |
| 57 | |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 58 | @@ -303,6 +327,8 @@ struct mt76_wcid { |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 59 | |
| 60 | struct list_head list; |
| 61 | struct idr pktid; |
| 62 | + |
| 63 | + struct mt76_sta_stats stats; |
| 64 | }; |
| 65 | |
| 66 | struct mt76_txq { |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 67 | @@ -349,7 +375,8 @@ struct mt76_rx_tid { |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 68 | #define MT_PACKET_ID_MASK GENMASK(6, 0) |
| 69 | #define MT_PACKET_ID_NO_ACK 0 |
| 70 | #define MT_PACKET_ID_NO_SKB 1 |
| 71 | -#define MT_PACKET_ID_FIRST 2 |
| 72 | +#define MT_PACKET_ID_WED 2 |
| 73 | +#define MT_PACKET_ID_FIRST 3 |
| 74 | #define MT_PACKET_ID_HAS_RATE BIT(7) |
| 75 | /* This is timer for when to give up when waiting for TXS callback, |
| 76 | * with starting time being the time at which the DMA_DONE callback |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 77 | @@ -875,26 +902,6 @@ struct mt76_power_limits { |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 78 | s8 ru[7][12]; |
| 79 | }; |
| 80 | |
| 81 | -enum mt76_phy_type { |
| 82 | - MT_PHY_TYPE_CCK, |
| 83 | - MT_PHY_TYPE_OFDM, |
| 84 | - MT_PHY_TYPE_HT, |
| 85 | - MT_PHY_TYPE_HT_GF, |
| 86 | - MT_PHY_TYPE_VHT, |
| 87 | - MT_PHY_TYPE_HE_SU = 8, |
| 88 | - MT_PHY_TYPE_HE_EXT_SU, |
| 89 | - MT_PHY_TYPE_HE_TB, |
| 90 | - MT_PHY_TYPE_HE_MU, |
| 91 | - __MT_PHY_TYPE_HE_MAX, |
| 92 | -}; |
| 93 | - |
| 94 | -struct mt76_sta_stats { |
| 95 | - u64 tx_mode[__MT_PHY_TYPE_HE_MAX]; |
| 96 | - u64 tx_bw[4]; /* 20, 40, 80, 160 */ |
| 97 | - u64 tx_nss[4]; /* 1, 2, 3, 4 */ |
| 98 | - u64 tx_mcs[16]; /* mcs idx */ |
| 99 | -}; |
| 100 | - |
| 101 | struct mt76_ethtool_worker_info { |
| 102 | u64 *data; |
| 103 | int idx; |
| 104 | diff --git a/mt76_connac.h b/mt76_connac.h |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 105 | index f71ded8..4a43838 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 106 | --- a/mt76_connac.h |
| 107 | +++ b/mt76_connac.h |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 108 | @@ -366,9 +366,10 @@ void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 109 | struct sk_buff *skb, struct mt76_wcid *wcid, |
| 110 | struct ieee80211_key_conf *key, int pid, |
| 111 | enum mt76_txq_id qid, u32 changed); |
| 112 | +bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, |
| 113 | + __le32 *txs_data, struct mt76_sta_stats *stats); |
| 114 | bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, |
| 115 | - int pid, __le32 *txs_data, |
| 116 | - struct mt76_sta_stats *stats); |
| 117 | + int pid, __le32 *txs_data); |
| 118 | void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev, |
| 119 | struct sk_buff *skb, |
| 120 | __le32 *rxv, u32 mode); |
| 121 | diff --git a/mt76_connac2_mac.h b/mt76_connac2_mac.h |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 122 | index 67ce216..c7064ba 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 123 | --- a/mt76_connac2_mac.h |
| 124 | +++ b/mt76_connac2_mac.h |
| 125 | @@ -123,6 +123,12 @@ enum { |
| 126 | /* VHT/HE only use bits 0-3 */ |
| 127 | #define MT_TX_RATE_IDX GENMASK(5, 0) |
| 128 | |
| 129 | +enum { |
| 130 | + MT_TXS_MPDU_FM0, |
| 131 | + MT_TXS_MPDU_FM1, |
| 132 | + MT_TXS_PPDU_FM |
| 133 | +}; |
| 134 | + |
| 135 | #define MT_TXS0_FIXED_RATE BIT(31) |
| 136 | #define MT_TXS0_BW GENMASK(30, 29) |
| 137 | #define MT_TXS0_TID GENMASK(28, 26) |
| 138 | @@ -158,6 +164,14 @@ enum { |
| 139 | |
| 140 | #define MT_TXS4_TIMESTAMP GENMASK(31, 0) |
| 141 | |
| 142 | +/* PPDU based */ |
| 143 | +#define MT_TXS5_MPDU_TX_BYTE GENMASK(22, 0) |
| 144 | +#define MT_TXS5_MPDU_TX_CNT GENMASK(31, 23) |
| 145 | + |
| 146 | +#define MT_TXS6_MPDU_FAIL_CNT GENMASK(31, 23) |
| 147 | + |
| 148 | +#define MT_TXS7_MPDU_RETRY_CNT GENMASK(31, 23) |
| 149 | + |
| 150 | /* RXD DW1 */ |
| 151 | #define MT_RXD1_NORMAL_WLAN_IDX GENMASK(9, 0) |
| 152 | #define MT_RXD1_NORMAL_GROUP_1 BIT(11) |
| 153 | diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 154 | index a9e58cf..af265d9 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 155 | --- a/mt76_connac_mac.c |
| 156 | +++ b/mt76_connac_mac.c |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 157 | @@ -487,6 +487,9 @@ void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 158 | p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; |
| 159 | q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS + |
| 160 | mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); |
| 161 | + |
| 162 | + wcid->stats.tx_bytes += skb->len; |
| 163 | + wcid->stats.tx_packets++; |
| 164 | } |
| 165 | |
| 166 | val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 167 | @@ -555,35 +558,26 @@ void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 168 | } |
| 169 | EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi); |
| 170 | |
| 171 | -bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, |
| 172 | - int pid, __le32 *txs_data, |
| 173 | - struct mt76_sta_stats *stats) |
| 174 | +bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, |
| 175 | + __le32 *txs_data, struct mt76_sta_stats *stats) |
| 176 | { |
| 177 | struct ieee80211_supported_band *sband; |
| 178 | struct mt76_phy *mphy; |
| 179 | - struct ieee80211_tx_info *info; |
| 180 | - struct sk_buff_head list; |
| 181 | struct rate_info rate = {}; |
| 182 | - struct sk_buff *skb; |
| 183 | bool cck = false; |
| 184 | u32 txrate, txs, mode; |
| 185 | |
| 186 | - mt76_tx_status_lock(dev, &list); |
| 187 | - skb = mt76_tx_status_skb_get(dev, wcid, pid, &list); |
| 188 | - if (!skb) |
| 189 | - goto out; |
| 190 | - |
| 191 | txs = le32_to_cpu(txs_data[0]); |
| 192 | - |
| 193 | - info = IEEE80211_SKB_CB(skb); |
| 194 | - if (!(txs & MT_TXS0_ACK_ERROR_MASK)) |
| 195 | - info->flags |= IEEE80211_TX_STAT_ACK; |
| 196 | - |
| 197 | - info->status.ampdu_len = 1; |
| 198 | - info->status.ampdu_ack_len = !!(info->flags & |
| 199 | - IEEE80211_TX_STAT_ACK); |
| 200 | - |
| 201 | - info->status.rates[0].idx = -1; |
| 202 | + if (FIELD_GET(MT_TXS0_TXS_FORMAT, txs) == MT_TXS_PPDU_FM) { |
| 203 | + stats->tx_bytes += |
| 204 | + le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE); |
| 205 | + stats->tx_packets += |
| 206 | + le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_CNT); |
| 207 | + stats->tx_failed += |
| 208 | + le32_get_bits(txs_data[6], MT_TXS6_MPDU_FAIL_CNT); |
| 209 | + stats->tx_retries += |
| 210 | + le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_CNT); |
| 211 | + } |
| 212 | |
| 213 | txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); |
| 214 | |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 215 | @@ -618,7 +612,7 @@ bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 216 | case MT_PHY_TYPE_HT: |
| 217 | case MT_PHY_TYPE_HT_GF: |
| 218 | if (rate.mcs > 31) |
| 219 | - goto out; |
| 220 | + return false; |
| 221 | |
| 222 | rate.flags = RATE_INFO_FLAGS_MCS; |
| 223 | if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 224 | @@ -626,7 +620,7 @@ bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 225 | break; |
| 226 | case MT_PHY_TYPE_VHT: |
| 227 | if (rate.mcs > 9) |
| 228 | - goto out; |
| 229 | + return false; |
| 230 | |
| 231 | rate.flags = RATE_INFO_FLAGS_VHT_MCS; |
| 232 | break; |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 233 | @@ -635,14 +629,14 @@ bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 234 | case MT_PHY_TYPE_HE_TB: |
| 235 | case MT_PHY_TYPE_HE_MU: |
| 236 | if (rate.mcs > 11) |
| 237 | - goto out; |
| 238 | + return false; |
| 239 | |
| 240 | rate.he_gi = wcid->rate.he_gi; |
| 241 | rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); |
| 242 | rate.flags = RATE_INFO_FLAGS_HE_MCS; |
| 243 | break; |
| 244 | default: |
| 245 | - goto out; |
| 246 | + return false; |
| 247 | } |
| 248 | |
| 249 | stats->tx_mode[mode]++; |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 250 | @@ -667,10 +661,37 @@ bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 251 | } |
| 252 | wcid->rate = rate; |
| 253 | |
| 254 | -out: |
| 255 | - if (skb) |
| 256 | - mt76_tx_status_skb_done(dev, skb, &list); |
| 257 | + return true; |
| 258 | +} |
| 259 | +EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_txs); |
| 260 | + |
| 261 | +bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, |
| 262 | + int pid, __le32 *txs_data) |
| 263 | +{ |
| 264 | + struct mt76_sta_stats *stats = &wcid->stats; |
| 265 | + struct sk_buff_head list; |
| 266 | + struct sk_buff *skb; |
| 267 | + |
| 268 | + if (pid < MT_PACKET_ID_FIRST) |
| 269 | + return false; |
| 270 | |
| 271 | + mt76_tx_status_lock(dev, &list); |
| 272 | + skb = mt76_tx_status_skb_get(dev, wcid, pid, &list); |
| 273 | + if (skb) { |
| 274 | + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
| 275 | + |
| 276 | + if (!(le32_to_cpu(txs_data[0]) & MT_TXS0_ACK_ERROR_MASK)) |
| 277 | + info->flags |= IEEE80211_TX_STAT_ACK; |
| 278 | + |
| 279 | + info->status.rates[0].idx = -1; |
| 280 | + info->status.ampdu_len = 1; |
| 281 | + info->status.ampdu_ack_len = !!(info->flags & |
| 282 | + IEEE80211_TX_STAT_ACK); |
| 283 | + stats->tx_failed += !(info->flags & IEEE80211_TX_STAT_ACK); |
| 284 | + |
| 285 | + mt76_connac2_mac_fill_txs(dev, wcid, txs_data, stats); |
| 286 | + mt76_tx_status_skb_done(dev, skb, &list); |
| 287 | + } |
| 288 | mt76_tx_status_unlock(dev, &list); |
| 289 | |
| 290 | return !!skb; |
| 291 | diff --git a/mt7915/mac.c b/mt7915/mac.c |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 292 | index 5b68492..63c702e 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 293 | --- a/mt7915/mac.c |
| 294 | +++ b/mt7915/mac.c |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 295 | @@ -1153,13 +1153,10 @@ static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data) |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 296 | u16 wcidx; |
| 297 | u8 pid; |
| 298 | |
| 299 | - if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) |
| 300 | - return; |
| 301 | - |
| 302 | wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); |
| 303 | pid = le32_get_bits(txs_data[3], MT_TXS3_PID); |
| 304 | |
| 305 | - if (pid < MT_PACKET_ID_FIRST) |
| 306 | + if (pid < MT_PACKET_ID_WED) |
| 307 | return; |
| 308 | |
| 309 | if (wcidx >= mt7915_wtbl_size(dev)) |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 310 | @@ -1173,8 +1170,11 @@ static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data) |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 311 | |
| 312 | msta = container_of(wcid, struct mt7915_sta, wcid); |
| 313 | |
| 314 | - mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data, |
| 315 | - &msta->stats); |
| 316 | + if (pid == MT_PACKET_ID_WED) |
| 317 | + mt76_connac2_mac_fill_txs(&dev->mt76, wcid, txs_data, |
| 318 | + &msta->wcid.stats); |
| 319 | + else |
| 320 | + mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data); |
| 321 | if (!wcid->sta) |
| 322 | goto out; |
| 323 | |
| 324 | diff --git a/mt7915/main.c b/mt7915/main.c |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 325 | index 0f872f5..b7c6cf6 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 326 | --- a/mt7915/main.c |
| 327 | +++ b/mt7915/main.c |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 328 | @@ -1049,6 +1049,20 @@ static void mt7915_sta_statistics(struct ieee80211_hw *hw, |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 329 | } |
| 330 | sinfo->txrate.flags = txrate->flags; |
| 331 | sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); |
| 332 | + |
| 333 | + if (mtk_wed_device_active(&phy->dev->mt76.mmio.wed)) { |
| 334 | + sinfo->tx_bytes = msta->wcid.stats.tx_bytes; |
| 335 | + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BYTES64); |
| 336 | + |
| 337 | + sinfo->tx_packets = msta->wcid.stats.tx_packets; |
| 338 | + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_PACKETS); |
| 339 | + |
| 340 | + sinfo->tx_failed = msta->wcid.stats.tx_failed; |
| 341 | + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED); |
| 342 | + |
| 343 | + sinfo->tx_retries = msta->wcid.stats.tx_retries; |
| 344 | + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_RETRIES); |
| 345 | + } |
| 346 | } |
| 347 | |
| 348 | static void mt7915_sta_rc_work(void *data, struct ieee80211_sta *sta) |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 349 | @@ -1271,7 +1285,7 @@ static void mt7915_ethtool_worker(void *wi_data, struct ieee80211_sta *sta) |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 350 | if (msta->vif->mt76.idx != wi->idx) |
| 351 | return; |
| 352 | |
| 353 | - mt76_ethtool_worker(wi, &msta->stats); |
| 354 | + mt76_ethtool_worker(wi, &msta->wcid.stats); |
| 355 | } |
| 356 | |
| 357 | static |
| 358 | diff --git a/mt7915/mmio.c b/mt7915/mmio.c |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 359 | index 1ccec14..bb2d1c4 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 360 | --- a/mt7915/mmio.c |
| 361 | +++ b/mt7915/mmio.c |
| 362 | @@ -92,6 +92,7 @@ static const u32 mt7915_offs[] = { |
| 363 | [AGG_AWSCR0] = 0x05c, |
| 364 | [AGG_PCR0] = 0x06c, |
| 365 | [AGG_ACR0] = 0x084, |
| 366 | + [AGG_ACR4] = 0x08C, |
| 367 | [AGG_MRCR] = 0x098, |
| 368 | [AGG_ATCR1] = 0x0f0, |
| 369 | [AGG_ATCR3] = 0x0f4, |
| 370 | @@ -167,6 +168,7 @@ static const u32 mt7916_offs[] = { |
| 371 | [AGG_AWSCR0] = 0x030, |
| 372 | [AGG_PCR0] = 0x040, |
| 373 | [AGG_ACR0] = 0x054, |
| 374 | + [AGG_ACR4] = 0x05C, |
| 375 | [AGG_MRCR] = 0x068, |
| 376 | [AGG_ATCR1] = 0x1a8, |
| 377 | [AGG_ATCR3] = 0x080, |
| 378 | @@ -668,9 +670,12 @@ irqreturn_t mt7915_irq_handler(int irq, void *dev_instance) |
| 379 | static int mt7915_wed_offload_enable(struct mtk_wed_device *wed) |
| 380 | { |
| 381 | struct mt7915_dev *dev; |
| 382 | + struct mt7915_phy *phy; |
| 383 | int ret; |
| 384 | |
| 385 | dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed); |
| 386 | + if (!dev) |
| 387 | + return -EINVAL; |
| 388 | |
| 389 | spin_lock_bh(&dev->mt76.token_lock); |
| 390 | dev->mt76.token_size = wed->wlan.token_start; |
| 391 | @@ -681,18 +686,35 @@ static int mt7915_wed_offload_enable(struct mtk_wed_device *wed) |
| 392 | if (!ret) |
| 393 | return -EAGAIN; |
| 394 | |
| 395 | + phy = &dev->phy; |
| 396 | + mt76_set(dev, MT_AGG_ACR4(phy->band_idx), MT_AGG_ACR_PPDU_TXS2H); |
| 397 | + |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 398 | + phy = dev->mt76.phys[MT_BAND1] ? dev->mt76.phys[MT_BAND1]->priv : NULL; |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 399 | + if (phy) |
| 400 | + mt76_set(dev, MT_AGG_ACR4(phy->band_idx), MT_AGG_ACR_PPDU_TXS2H); |
| 401 | + |
| 402 | return 0; |
| 403 | } |
| 404 | |
| 405 | static void mt7915_wed_offload_disable(struct mtk_wed_device *wed) |
| 406 | { |
| 407 | struct mt7915_dev *dev; |
| 408 | + struct mt7915_phy *phy; |
| 409 | |
| 410 | dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed); |
| 411 | + if (!dev) |
| 412 | + return; |
| 413 | |
| 414 | spin_lock_bh(&dev->mt76.token_lock); |
| 415 | dev->mt76.token_size = wed->wlan.token_start;//MT7915_TOKEN_SIZE; |
| 416 | spin_unlock_bh(&dev->mt76.token_lock); |
| 417 | + |
| 418 | + phy = &dev->phy; |
| 419 | + mt76_clear(dev, MT_AGG_ACR4(phy->band_idx), MT_AGG_ACR_PPDU_TXS2H); |
| 420 | + |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 421 | + phy = dev->mt76.phys[MT_BAND1] ? dev->mt76.phys[MT_BAND1]->priv : NULL; |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 422 | + if (phy) |
| 423 | + mt76_clear(dev, MT_AGG_ACR4(phy->band_idx), MT_AGG_ACR_PPDU_TXS2H); |
| 424 | } |
| 425 | #endif |
| 426 | |
| 427 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 428 | index b4c8cdf..a1ce516 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 429 | --- a/mt7915/mt7915.h |
| 430 | +++ b/mt7915/mt7915.h |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 431 | @@ -142,8 +142,6 @@ struct mt7915_sta { |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 432 | unsigned long jiffies; |
| 433 | unsigned long ampdu_state; |
| 434 | |
| 435 | - struct mt76_sta_stats stats; |
| 436 | - |
| 437 | struct mt76_connac_sta_key_conf bip; |
| 438 | |
| 439 | struct { |
| 440 | diff --git a/mt7915/regs.h b/mt7915/regs.h |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 441 | index 36ef8a9..dcb4018 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 442 | --- a/mt7915/regs.h |
| 443 | +++ b/mt7915/regs.h |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 444 | @@ -52,6 +52,7 @@ enum offs_rev { |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 445 | AGG_AWSCR0, |
| 446 | AGG_PCR0, |
| 447 | AGG_ACR0, |
| 448 | + AGG_ACR4, |
| 449 | AGG_MRCR, |
| 450 | AGG_ATCR1, |
| 451 | AGG_ATCR3, |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 452 | @@ -489,6 +490,9 @@ enum offs_rev { |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 453 | #define MT_AGG_ACR_CFEND_RATE GENMASK(13, 0) |
| 454 | #define MT_AGG_ACR_BAR_RATE GENMASK(29, 16) |
| 455 | |
| 456 | +#define MT_AGG_ACR4(_band) MT_WF_AGG(_band, __OFFS(AGG_ACR4)) |
| 457 | +#define MT_AGG_ACR_PPDU_TXS2H BIT(1) |
| 458 | + |
| 459 | #define MT_AGG_MRCR(_band) MT_WF_AGG(_band, __OFFS(AGG_MRCR)) |
| 460 | #define MT_AGG_MRCR_BAR_CNT_LIMIT GENMASK(15, 12) |
| 461 | #define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6) |
| 462 | diff --git a/mt7921/mt7921.h b/mt7921/mt7921.h |
developer | 27b5525 | 2022-09-05 19:09:45 +0800 | [diff] [blame] | 463 | index 0a1f035..96267d5 100644 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 464 | --- a/mt7921/mt7921.h |
| 465 | +++ b/mt7921/mt7921.h |
| 466 | @@ -100,7 +100,6 @@ struct mt7921_sta { |
| 467 | |
| 468 | unsigned long last_txs; |
| 469 | unsigned long ampdu_state; |
| 470 | - struct mt76_sta_stats stats; |
| 471 | |
| 472 | struct mt76_connac_sta_key_conf bip; |
| 473 | }; |
| 474 | -- |
developer | 4df64ba | 2022-09-01 14:44:55 +0800 | [diff] [blame] | 475 | 2.18.0 |
developer | 8ec491f | 2022-08-22 19:48:44 +0800 | [diff] [blame] | 476 | |