developer | e35b8e4 | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 1 | From f322c87d1e0634ec86acb5b254220918842132c6 Mon Sep 17 00:00:00 2001 |
| 2 | From: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 3 | Date: Wed, 26 Jul 2023 16:33:43 +0800 |
| 4 | Subject: [PATCH 73/98] wifi: mt76: drop packet based on ind_reason |
| 5 | |
| 6 | Driver should drop packet which ind_reason is REPEAT and OLDPKT. |
| 7 | |
| 8 | Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 9 | Signed-off-by: sujuan.chen <sujuan.chen@mediatek.com> |
| 10 | --- |
| 11 | dma.c | 15 +++++++++++++-- |
| 12 | dma.h | 9 +++++++++ |
| 13 | 2 files changed, 22 insertions(+), 2 deletions(-) |
| 14 | |
| 15 | diff --git a/dma.c b/dma.c |
| 16 | index 3983ebb..69e314a 100644 |
| 17 | --- a/dma.c |
| 18 | +++ b/dma.c |
| 19 | @@ -435,8 +435,19 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
| 20 | |
| 21 | if (drop) { |
| 22 | *drop = !!(ctrl & (MT_DMA_CTL_TO_HOST_A | MT_DMA_CTL_DROP)); |
| 23 | - if (ctrl & MT_DMA_CTL_VER_MASK) |
| 24 | - *drop = !!(ctrl & MT_DMA_CTL_PN_CHK_FAIL); |
| 25 | + if (ctrl & MT_DMA_CTL_VER_MASK) { |
| 26 | + switch (le32_get_bits(desc->buf1, MT_DMA_IND_REASON)) { |
| 27 | + case IND_REASON_REPEAT: |
| 28 | + *drop = true; |
| 29 | + break; |
| 30 | + case IND_REASON_OLDPKT: |
| 31 | + *drop = !le32_get_bits(desc->info, MT_DMA_INFO_DMA_FRAG); |
| 32 | + break; |
| 33 | + default: |
| 34 | + *drop = !!(ctrl & MT_DMA_CTL_PN_CHK_FAIL); |
| 35 | + break; |
| 36 | + } |
| 37 | + } |
| 38 | } |
| 39 | |
| 40 | if (mt76_queue_is_wed_rx(q)) { |
| 41 | diff --git a/dma.h b/dma.h |
| 42 | index 22b79d5..afcbcdd 100644 |
| 43 | --- a/dma.h |
| 44 | +++ b/dma.h |
| 45 | @@ -23,6 +23,7 @@ |
| 46 | |
| 47 | #define MT_DMA_PPE_CPU_REASON GENMASK(15, 11) |
| 48 | #define MT_DMA_PPE_ENTRY GENMASK(30, 16) |
| 49 | +#define MT_DMA_INFO_DMA_FRAG BIT(9) |
| 50 | #define MT_DMA_INFO_PPE_VLD BIT(31) |
| 51 | |
| 52 | #define MT_DMA_CTL_PN_CHK_FAIL BIT(13) |
| 53 | @@ -31,6 +32,7 @@ |
| 54 | #define MT_DMA_RRO_EN BIT(13) |
| 55 | |
| 56 | #define MT_DMA_WED_IND_CMD_CNT 8 |
| 57 | +#define MT_DMA_IND_REASON GENMASK(15, 12) |
| 58 | |
| 59 | #define MT_DMA_HDR_LEN 4 |
| 60 | #define MT_RX_INFO_LEN 4 |
| 61 | @@ -66,6 +68,13 @@ enum mt76_mcu_evt_type { |
| 62 | EVT_EVENT_DFS_DETECT_RSP, |
| 63 | }; |
| 64 | |
| 65 | +enum ind_reason { |
| 66 | + IND_REASON_NORMAL, |
| 67 | + IND_REASON_REPEAT, |
| 68 | + IND_REASON_OLDPKT, |
| 69 | + IND_REASON_MAX |
| 70 | +}; |
| 71 | + |
| 72 | int mt76_dma_rx_poll(struct napi_struct *napi, int budget); |
| 73 | void mt76_dma_attach(struct mt76_dev *dev); |
| 74 | void mt76_dma_cleanup(struct mt76_dev *dev); |
| 75 | -- |
| 76 | 2.18.0 |
| 77 | |