developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 1 | From 0ed439e39989e3bd470c2aac9e07ab23853d76ed Mon Sep 17 00:00:00 2001 |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 2 | From: Sujuan Chen <sujuan.chen@mediatek.com> |
| 3 | Date: Fri, 6 Jan 2023 18:18:50 +0800 |
| 4 | Subject: [PATCH 3011/3014] mt76: mt7915: wed: add rxwi for further in chip rro |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 5 | |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 6 | Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com> |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 7 | --- |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 8 | dma.c | 115 ++++++++++++++++++++++++------------------------ |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 9 | mac80211.c | 2 +- |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 10 | mt76.h | 24 ++++++---- |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 11 | mt7915/dma.c | 2 - |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 12 | mt7915/mmio.c | 21 ++++----- |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 13 | mt7915/mt7915.h | 1 + |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 14 | tx.c | 16 +++---- |
| 15 | 7 files changed, 94 insertions(+), 87 deletions(-) |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 16 | |
| 17 | diff --git a/dma.c b/dma.c |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 18 | index f898cef0..d4fc091e 100644 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 19 | --- a/dma.c |
| 20 | +++ b/dma.c |
| 21 | @@ -59,17 +59,17 @@ mt76_alloc_txwi(struct mt76_dev *dev) |
| 22 | return t; |
| 23 | } |
| 24 | |
| 25 | -static struct mt76_txwi_cache * |
| 26 | +static struct mt76_rxwi_cache * |
| 27 | mt76_alloc_rxwi(struct mt76_dev *dev) |
| 28 | { |
| 29 | - struct mt76_txwi_cache *t; |
| 30 | + struct mt76_rxwi_cache *r; |
| 31 | |
| 32 | - t = kzalloc(L1_CACHE_ALIGN(sizeof(*t)), GFP_ATOMIC); |
| 33 | - if (!t) |
| 34 | + r = kzalloc(L1_CACHE_ALIGN(sizeof(*r)), GFP_ATOMIC); |
| 35 | + if (!r) |
| 36 | return NULL; |
| 37 | |
| 38 | - t->ptr = NULL; |
| 39 | - return t; |
| 40 | + r->ptr = NULL; |
| 41 | + return r; |
| 42 | } |
| 43 | |
| 44 | static struct mt76_txwi_cache * |
| 45 | @@ -88,20 +88,20 @@ __mt76_get_txwi(struct mt76_dev *dev) |
| 46 | return t; |
| 47 | } |
| 48 | |
| 49 | -static struct mt76_txwi_cache * |
| 50 | +static struct mt76_rxwi_cache * |
| 51 | __mt76_get_rxwi(struct mt76_dev *dev) |
| 52 | { |
| 53 | - struct mt76_txwi_cache *t = NULL; |
| 54 | + struct mt76_rxwi_cache *r = NULL; |
| 55 | |
| 56 | - spin_lock(&dev->wed_lock); |
| 57 | + spin_lock(&dev->lock); |
| 58 | if (!list_empty(&dev->rxwi_cache)) { |
| 59 | - t = list_first_entry(&dev->rxwi_cache, struct mt76_txwi_cache, |
| 60 | + r = list_first_entry(&dev->rxwi_cache, struct mt76_rxwi_cache, |
| 61 | list); |
| 62 | - list_del(&t->list); |
| 63 | + list_del(&r->list); |
| 64 | } |
| 65 | - spin_unlock(&dev->wed_lock); |
| 66 | + spin_unlock(&dev->lock); |
| 67 | |
| 68 | - return t; |
| 69 | + return r; |
| 70 | } |
| 71 | |
| 72 | static struct mt76_txwi_cache * |
| 73 | @@ -115,13 +115,13 @@ mt76_get_txwi(struct mt76_dev *dev) |
| 74 | return mt76_alloc_txwi(dev); |
| 75 | } |
| 76 | |
| 77 | -struct mt76_txwi_cache * |
| 78 | +struct mt76_rxwi_cache * |
| 79 | mt76_get_rxwi(struct mt76_dev *dev) |
| 80 | { |
| 81 | - struct mt76_txwi_cache *t = __mt76_get_rxwi(dev); |
| 82 | + struct mt76_rxwi_cache *r = __mt76_get_rxwi(dev); |
| 83 | |
| 84 | - if (t) |
| 85 | - return t; |
| 86 | + if (r) |
| 87 | + return r; |
| 88 | |
| 89 | return mt76_alloc_rxwi(dev); |
| 90 | } |
| 91 | @@ -140,14 +140,14 @@ mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t) |
| 92 | EXPORT_SYMBOL_GPL(mt76_put_txwi); |
| 93 | |
| 94 | void |
| 95 | -mt76_put_rxwi(struct mt76_dev *dev, struct mt76_txwi_cache *t) |
| 96 | +mt76_put_rxwi(struct mt76_dev *dev, struct mt76_rxwi_cache *r) |
| 97 | { |
| 98 | - if (!t) |
| 99 | + if (!r) |
| 100 | return; |
| 101 | |
| 102 | - spin_lock(&dev->wed_lock); |
| 103 | - list_add(&t->list, &dev->rxwi_cache); |
| 104 | - spin_unlock(&dev->wed_lock); |
| 105 | + spin_lock(&dev->lock); |
| 106 | + list_add(&r->list, &dev->rxwi_cache); |
| 107 | + spin_unlock(&dev->lock); |
| 108 | } |
| 109 | EXPORT_SYMBOL_GPL(mt76_put_rxwi); |
| 110 | |
| 111 | @@ -168,13 +168,13 @@ mt76_free_pending_txwi(struct mt76_dev *dev) |
| 112 | void |
| 113 | mt76_free_pending_rxwi(struct mt76_dev *dev) |
| 114 | { |
| 115 | - struct mt76_txwi_cache *t; |
| 116 | + struct mt76_rxwi_cache *r; |
| 117 | |
| 118 | local_bh_disable(); |
| 119 | - while ((t = __mt76_get_rxwi(dev)) != NULL) { |
| 120 | - if (t->ptr) |
| 121 | - skb_free_frag(t->ptr); |
| 122 | - kfree(t); |
| 123 | + while ((r = __mt76_get_rxwi(dev)) != NULL) { |
| 124 | + if (r->ptr) |
| 125 | + skb_free_frag(r->ptr); |
| 126 | + kfree(r); |
| 127 | } |
| 128 | local_bh_enable(); |
| 129 | } |
| 130 | @@ -209,7 +209,7 @@ mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q) |
| 131 | static int |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 132 | mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
| 133 | struct mt76_queue_buf *buf, void *data, |
| 134 | - struct mt76_txwi_cache *txwi) |
| 135 | + struct mt76_rxwi_cache *rxwi) |
| 136 | { |
| 137 | struct mt76_desc *desc = &q->desc[q->head]; |
| 138 | struct mt76_queue_entry *entry = &q->entry[q->head]; |
| 139 | @@ -221,15 +221,15 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
| 140 | |
| 141 | if ((q->flags & MT_QFLAG_WED) && |
| 142 | FIELD_GET(MT_QFLAG_WED_TYPE, q->flags) == MT76_WED_Q_RX) { |
| 143 | - if(!txwi) { |
| 144 | - txwi = mt76_get_rxwi(dev); |
| 145 | - if (!txwi) |
| 146 | + if(!rxwi) { |
| 147 | + rxwi = mt76_get_rxwi(dev); |
| 148 | + if (!rxwi) |
| 149 | return -ENOMEM; |
| 150 | } |
| 151 | |
| 152 | - rx_token = mt76_rx_token_consume(dev, data, txwi, buf->addr); |
| 153 | + rx_token = mt76_rx_token_consume(dev, data, rxwi, buf->addr); |
| 154 | if (rx_token < 0) { |
| 155 | - mt76_put_rxwi(dev, txwi); |
| 156 | + mt76_put_rxwi(dev, rxwi); |
| 157 | return -ENOMEM; |
| 158 | } |
| 159 | |
| 160 | @@ -244,7 +244,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
| 161 | |
| 162 | entry->dma_addr[0] = buf->addr; |
| 163 | entry->dma_len[0] = buf->len; |
| 164 | - entry->txwi = txwi; |
| 165 | + entry->rxwi = rxwi; |
| 166 | entry->buf = data; |
| 167 | entry->wcid = 0xffff; |
| 168 | entry->skip_buf1 = true; |
| 169 | @@ -257,7 +257,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q, |
| 170 | static int |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 171 | mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q, |
| 172 | struct mt76_queue_buf *buf, int nbufs, u32 info, |
| 173 | - struct sk_buff *skb, void *txwi) |
| 174 | + struct sk_buff *skb, void *txwi, void *rxwi) |
| 175 | { |
| 176 | struct mt76_queue_entry *entry; |
| 177 | struct mt76_desc *desc; |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 178 | @@ -310,6 +310,7 @@ mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 179 | } |
| 180 | |
| 181 | q->entry[idx].txwi = txwi; |
| 182 | + q->entry[idx].rxwi = rxwi; |
| 183 | q->entry[idx].skb = skb; |
| 184 | q->entry[idx].wcid = 0xffff; |
| 185 | |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 186 | @@ -409,13 +410,13 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 187 | u32 id, find = 0; |
| 188 | u32 token = FIELD_GET(MT_DMA_CTL_TOKEN, |
| 189 | le32_to_cpu(desc->buf1)); |
| 190 | - struct mt76_txwi_cache *t; |
| 191 | + struct mt76_rxwi_cache *r; |
| 192 | |
| 193 | if (*more) { |
| 194 | spin_lock_bh(&dev->rx_token_lock); |
| 195 | |
| 196 | - idr_for_each_entry(&dev->rx_token, t, id) { |
| 197 | - if (t->dma_addr == le32_to_cpu(desc->buf0)) { |
| 198 | + idr_for_each_entry(&dev->rx_token, r, id) { |
| 199 | + if (r->dma_addr == le32_to_cpu(desc->buf0)) { |
| 200 | find = 1; |
| 201 | desc->buf1 = FIELD_PREP(MT_DMA_CTL_TOKEN, id); |
| 202 | token = id; |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 203 | @@ -428,19 +429,19 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 204 | return NULL; |
| 205 | } |
| 206 | |
| 207 | - t = mt76_rx_token_release(dev, token); |
| 208 | - if (!t) |
| 209 | + r = mt76_rx_token_release(dev, token); |
| 210 | + if (!r) |
| 211 | return NULL; |
| 212 | |
| 213 | - dma_unmap_single(dev->dma_dev, t->dma_addr, |
| 214 | + dma_unmap_single(dev->dma_dev, r->dma_addr, |
| 215 | SKB_WITH_OVERHEAD(q->buf_size), |
| 216 | DMA_FROM_DEVICE); |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 217 | if (flush) { |
| 218 | - buf = t->ptr; |
| 219 | - t->dma_addr = 0; |
| 220 | - t->ptr = NULL; |
| 221 | + buf = r->ptr; |
| 222 | + r->dma_addr = 0; |
| 223 | + r->ptr = NULL; |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 224 | |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 225 | - mt76_put_rxwi(dev, t); |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 226 | + mt76_put_rxwi(dev, r); |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 227 | } else { |
| 228 | struct mt76_queue_buf qbuf; |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 229 | |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 230 | @@ -448,27 +449,27 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
| 231 | if (!buf) |
| 232 | return NULL; |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 233 | |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 234 | - memcpy(buf, t->ptr, SKB_WITH_OVERHEAD(q->buf_size)); |
| 235 | + memcpy(buf, r->ptr, SKB_WITH_OVERHEAD(q->buf_size)); |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 236 | |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 237 | - t->dma_addr = dma_map_single(dev->dma_dev, t->ptr, |
| 238 | + r->dma_addr = dma_map_single(dev->dma_dev, r->ptr, |
| 239 | SKB_WITH_OVERHEAD(q->buf_size), |
| 240 | DMA_FROM_DEVICE); |
| 241 | - if (unlikely(dma_mapping_error(dev->dma_dev, t->dma_addr))) { |
| 242 | - skb_free_frag(t->ptr); |
| 243 | - mt76_put_rxwi(dev, t); |
| 244 | + if (unlikely(dma_mapping_error(dev->dma_dev, r->dma_addr))) { |
| 245 | + skb_free_frag(r->ptr); |
| 246 | + mt76_put_rxwi(dev, r); |
| 247 | return NULL; |
| 248 | } |
| 249 | |
| 250 | - qbuf.addr = t->dma_addr; |
| 251 | + qbuf.addr = r->dma_addr; |
| 252 | qbuf.len = SKB_WITH_OVERHEAD(q->buf_size); |
| 253 | qbuf.skip_unmap = false; |
| 254 | |
| 255 | - if (mt76_dma_add_rx_buf(dev, q, &qbuf, t->ptr, t) < 0) { |
| 256 | - dma_unmap_single(dev->dma_dev, t->dma_addr, |
| 257 | + if (mt76_dma_add_rx_buf(dev, q, &qbuf, r->ptr, r) < 0) { |
| 258 | + dma_unmap_single(dev->dma_dev, r->dma_addr, |
| 259 | SKB_WITH_OVERHEAD(q->buf_size), |
| 260 | DMA_FROM_DEVICE); |
| 261 | - skb_free_frag(t->ptr); |
| 262 | - mt76_put_rxwi(dev, t); |
| 263 | + skb_free_frag(r->ptr); |
| 264 | + mt76_put_rxwi(dev, r); |
| 265 | return NULL; |
| 266 | } |
| 267 | } |
| 268 | @@ -539,7 +540,7 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 269 | buf.len = skb->len; |
| 270 | |
| 271 | spin_lock_bh(&q->lock); |
| 272 | - mt76_dma_add_buf(dev, q, &buf, 1, tx_info, skb, NULL); |
| 273 | + mt76_dma_add_buf(dev, q, &buf, 1, tx_info, skb, NULL, NULL); |
| 274 | mt76_dma_kick_queue(dev, q); |
| 275 | spin_unlock_bh(&q->lock); |
| 276 | |
developer | 765f189 | 2023-01-30 14:02:51 +0800 | [diff] [blame^] | 277 | @@ -616,7 +617,7 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 278 | goto unmap; |
| 279 | |
| 280 | return mt76_dma_add_buf(dev, q, tx_info.buf, tx_info.nbuf, |
| 281 | - tx_info.info, tx_info.skb, t); |
| 282 | + tx_info.info, tx_info.skb, t, NULL); |
| 283 | |
| 284 | unmap: |
| 285 | for (n--; n > 0; n--) |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 286 | diff --git a/mac80211.c b/mac80211.c |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 287 | index de9ef237..818f4f0c 100644 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 288 | --- a/mac80211.c |
| 289 | +++ b/mac80211.c |
| 290 | @@ -597,7 +597,6 @@ mt76_alloc_device(struct device *pdev, unsigned int size, |
| 291 | spin_lock_init(&dev->lock); |
| 292 | spin_lock_init(&dev->cc_lock); |
| 293 | spin_lock_init(&dev->status_lock); |
| 294 | - spin_lock_init(&dev->wed_lock); |
| 295 | mutex_init(&dev->mutex); |
| 296 | init_waitqueue_head(&dev->tx_wait); |
| 297 | |
| 298 | @@ -628,6 +627,7 @@ mt76_alloc_device(struct device *pdev, unsigned int size, |
| 299 | INIT_LIST_HEAD(&dev->txwi_cache); |
| 300 | INIT_LIST_HEAD(&dev->rxwi_cache); |
| 301 | dev->token_size = dev->drv->token_size; |
| 302 | + dev->rx_token_size = dev->drv->rx_token_size; |
| 303 | |
| 304 | for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) |
| 305 | skb_queue_head_init(&dev->rx_skb[i]); |
| 306 | diff --git a/mt76.h b/mt76.h |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 307 | index b10a16f8..631c4ccd 100644 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 308 | --- a/mt76.h |
| 309 | +++ b/mt76.h |
| 310 | @@ -166,6 +166,7 @@ struct mt76_queue_entry { |
| 311 | }; |
| 312 | union { |
| 313 | struct mt76_txwi_cache *txwi; |
| 314 | + struct mt76_rxwi_cache *rxwi; |
| 315 | struct urb *urb; |
| 316 | int buf_sz; |
| 317 | }; |
| 318 | @@ -354,10 +355,15 @@ struct mt76_txwi_cache { |
| 319 | struct list_head list; |
| 320 | dma_addr_t dma_addr; |
| 321 | |
| 322 | - union { |
| 323 | - struct sk_buff *skb; |
| 324 | - void *ptr; |
| 325 | - }; |
| 326 | + struct sk_buff *skb; |
| 327 | +}; |
| 328 | + |
| 329 | +struct mt76_rxwi_cache { |
| 330 | + struct list_head list; |
| 331 | + dma_addr_t dma_addr; |
| 332 | + |
| 333 | + void *ptr; |
| 334 | + u32 token; |
| 335 | }; |
| 336 | |
| 337 | struct mt76_rx_tid { |
| 338 | @@ -441,6 +447,7 @@ struct mt76_driver_ops { |
| 339 | u16 txwi_size; |
| 340 | u16 token_size; |
| 341 | u8 mcs_rates; |
| 342 | + u16 rx_token_size; |
| 343 | |
| 344 | void (*update_survey)(struct mt76_phy *phy); |
| 345 | |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 346 | @@ -809,7 +816,6 @@ struct mt76_dev { |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 347 | |
| 348 | struct ieee80211_hw *hw; |
| 349 | |
| 350 | - spinlock_t wed_lock; |
| 351 | spinlock_t lock; |
| 352 | spinlock_t cc_lock; |
| 353 | |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 354 | @@ -1400,8 +1406,8 @@ mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb) |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 355 | } |
| 356 | |
| 357 | void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); |
| 358 | -void mt76_put_rxwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); |
| 359 | -struct mt76_txwi_cache *mt76_get_rxwi(struct mt76_dev *dev); |
| 360 | +void mt76_put_rxwi(struct mt76_dev *dev, struct mt76_rxwi_cache *r); |
| 361 | +struct mt76_rxwi_cache *mt76_get_rxwi(struct mt76_dev *dev); |
| 362 | void mt76_free_pending_rxwi(struct mt76_dev *dev); |
| 363 | void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, |
| 364 | struct napi_struct *napi); |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 365 | @@ -1547,9 +1553,9 @@ struct mt76_txwi_cache * |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 366 | mt76_token_release(struct mt76_dev *dev, int token, bool *wake); |
| 367 | int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi); |
| 368 | void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked); |
| 369 | -struct mt76_txwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token); |
| 370 | +struct mt76_rxwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token); |
| 371 | int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr, |
| 372 | - struct mt76_txwi_cache *r, dma_addr_t phys); |
| 373 | + struct mt76_rxwi_cache *r, dma_addr_t phys); |
| 374 | |
| 375 | static inline void mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked) |
| 376 | { |
| 377 | diff --git a/mt7915/dma.c b/mt7915/dma.c |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 378 | index 36260085..9cbd3625 100644 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 379 | --- a/mt7915/dma.c |
| 380 | +++ b/mt7915/dma.c |
| 381 | @@ -492,7 +492,6 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2) |
| 382 | mtk_wed_get_rx_capa(&mdev->mmio.wed)) { |
| 383 | dev->mt76.q_rx[MT_RXQ_MAIN].flags = |
| 384 | MT_WED_Q_RX(MT7915_RXQ_BAND0); |
| 385 | - dev->mt76.rx_token_size += MT7915_RX_RING_SIZE; |
| 386 | } |
| 387 | |
| 388 | ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], |
| 389 | @@ -529,7 +528,6 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2) |
| 390 | mtk_wed_get_rx_capa(&mdev->mmio.wed)) { |
| 391 | dev->mt76.q_rx[MT_RXQ_BAND1].flags = |
| 392 | MT_WED_Q_RX(MT7915_RXQ_BAND1); |
| 393 | - dev->mt76.rx_token_size += MT7915_RX_RING_SIZE; |
| 394 | } |
| 395 | |
| 396 | /* rx data queue for band1 */ |
| 397 | diff --git a/mt7915/mmio.c b/mt7915/mmio.c |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 398 | index 4bc8e8cd..09b39730 100644 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 399 | --- a/mt7915/mmio.c |
| 400 | +++ b/mt7915/mmio.c |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 401 | @@ -605,18 +605,18 @@ static void mt7915_mmio_wed_release_rx_buf(struct mtk_wed_device *wed) |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 402 | |
| 403 | dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed); |
| 404 | for (i = 0; i < dev->mt76.rx_token_size; i++) { |
| 405 | - struct mt76_txwi_cache *t; |
| 406 | + struct mt76_rxwi_cache *r; |
| 407 | |
| 408 | - t = mt76_rx_token_release(&dev->mt76, i); |
| 409 | - if (!t || !t->ptr) |
| 410 | + r = mt76_rx_token_release(&dev->mt76, i); |
| 411 | + if (!r || !r->ptr) |
| 412 | continue; |
| 413 | |
| 414 | - dma_unmap_single(dev->mt76.dma_dev, t->dma_addr, |
| 415 | + dma_unmap_single(dev->mt76.dma_dev, r->dma_addr, |
| 416 | wed->wlan.rx_size, DMA_FROM_DEVICE); |
| 417 | - skb_free_frag(t->ptr); |
| 418 | - t->ptr = NULL; |
| 419 | + skb_free_frag(r->ptr); |
| 420 | + r->ptr = NULL; |
| 421 | |
| 422 | - mt76_put_rxwi(&dev->mt76, t); |
| 423 | + mt76_put_rxwi(&dev->mt76, r); |
| 424 | } |
| 425 | |
| 426 | mt76_free_pending_rxwi(&dev->mt76); |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 427 | @@ -641,7 +641,7 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 428 | sizeof(struct skb_shared_info)); |
| 429 | |
| 430 | for (i = 0; i < size; i++) { |
| 431 | - struct mt76_txwi_cache *t = mt76_get_rxwi(&dev->mt76); |
| 432 | + struct mt76_rxwi_cache *r = mt76_get_rxwi(&dev->mt76); |
| 433 | dma_addr_t phy_addr; |
| 434 | int token; |
| 435 | void *ptr; |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 436 | @@ -660,7 +660,7 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | desc->buf0 = cpu_to_le32(phy_addr); |
| 440 | - token = mt76_rx_token_consume(&dev->mt76, ptr, t, phy_addr); |
| 441 | + token = mt76_rx_token_consume(&dev->mt76, ptr, r, phy_addr); |
| 442 | if (token < 0) { |
| 443 | dma_unmap_single(dev->mt76.dma_dev, phy_addr, |
| 444 | wed->wlan.rx_size, DMA_TO_DEVICE); |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 445 | @@ -788,7 +788,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 446 | wed->wlan.update_wo_rx_stats = mt7915_mmio_wed_update_rx_stats; |
| 447 | wed->wlan.ser_trigger = mt7915_wed_trigger_ser; |
| 448 | |
| 449 | - dev->mt76.rx_token_size = wed->wlan.rx_npkt; |
| 450 | + dev->mt76.rx_token_size += wed->wlan.rx_npkt; |
| 451 | |
| 452 | if (mtk_wed_device_attach(wed)) |
| 453 | return 0; |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 454 | @@ -994,6 +994,7 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 455 | SURVEY_INFO_TIME_RX | |
| 456 | SURVEY_INFO_TIME_BSS_RX, |
| 457 | .token_size = MT7915_TOKEN_SIZE, |
| 458 | + .rx_token_size = MT7915_RX_TOKEN_SIZE, |
| 459 | .tx_prepare_skb = mt7915_tx_prepare_skb, |
| 460 | .tx_complete_skb = mt76_connac_tx_complete_skb, |
| 461 | .rx_skb = mt7915_queue_rx_skb, |
| 462 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 463 | index c3a0b326..91b98ede 100644 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 464 | --- a/mt7915/mt7915.h |
| 465 | +++ b/mt7915/mt7915.h |
developer | c5ce750 | 2022-12-19 11:33:22 +0800 | [diff] [blame] | 466 | @@ -57,6 +57,7 @@ |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 467 | #define MT7915_EEPROM_BLOCK_SIZE 16 |
| 468 | #define MT7915_TOKEN_SIZE 8192 |
developer | b5cec01 | 2022-12-21 18:05:47 +0800 | [diff] [blame] | 469 | #define MT7915_HW_TOKEN_SIZE 7168 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 470 | +#define MT7915_RX_TOKEN_SIZE 4096 |
| 471 | |
| 472 | #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ |
| 473 | #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ |
| 474 | diff --git a/tx.c b/tx.c |
developer | 13655da | 2023-01-10 19:53:25 +0800 | [diff] [blame] | 475 | index 6d55566f..a72b7779 100644 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 476 | --- a/tx.c |
| 477 | +++ b/tx.c |
| 478 | @@ -756,16 +756,16 @@ int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi) |
| 479 | EXPORT_SYMBOL_GPL(mt76_token_consume); |
| 480 | |
| 481 | int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr, |
| 482 | - struct mt76_txwi_cache *t, dma_addr_t phys) |
| 483 | + struct mt76_rxwi_cache *r, dma_addr_t phys) |
| 484 | { |
| 485 | int token; |
| 486 | |
| 487 | spin_lock_bh(&dev->rx_token_lock); |
| 488 | - token = idr_alloc(&dev->rx_token, t, 0, dev->rx_token_size, |
| 489 | + token = idr_alloc(&dev->rx_token, r, 0, dev->rx_token_size, |
| 490 | GFP_ATOMIC); |
| 491 | if (token >= 0) { |
| 492 | - t->ptr = ptr; |
| 493 | - t->dma_addr = phys; |
| 494 | + r->ptr = ptr; |
| 495 | + r->dma_addr = phys; |
| 496 | } |
| 497 | spin_unlock_bh(&dev->rx_token_lock); |
| 498 | |
| 499 | @@ -802,15 +802,15 @@ mt76_token_release(struct mt76_dev *dev, int token, bool *wake) |
| 500 | } |
| 501 | EXPORT_SYMBOL_GPL(mt76_token_release); |
| 502 | |
| 503 | -struct mt76_txwi_cache * |
| 504 | +struct mt76_rxwi_cache * |
| 505 | mt76_rx_token_release(struct mt76_dev *dev, int token) |
| 506 | { |
| 507 | - struct mt76_txwi_cache *t; |
| 508 | + struct mt76_rxwi_cache *r; |
| 509 | |
| 510 | spin_lock_bh(&dev->rx_token_lock); |
| 511 | - t = idr_remove(&dev->rx_token, token); |
| 512 | + r = idr_remove(&dev->rx_token, token); |
| 513 | spin_unlock_bh(&dev->rx_token_lock); |
| 514 | |
| 515 | - return t; |
| 516 | + return r; |
| 517 | } |
| 518 | EXPORT_SYMBOL_GPL(mt76_rx_token_release); |
| 519 | -- |
developer | 23c2234 | 2023-01-09 13:57:39 +0800 | [diff] [blame] | 520 | 2.18.0 |
developer | 57c8f1a | 2022-12-15 14:09:45 +0800 | [diff] [blame] | 521 | |