developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 1 | From 7f1319357888271ea4aeeda81723b19a8f5ef2c0 Mon Sep 17 00:00:00 2001 |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 2 | From: Sujuan Chen <sujuan.chen@mediatek.com> |
developer | 740bee8 | 2023-10-16 10:58:43 +0800 | [diff] [blame] | 3 | Date: Mon, 18 Sep 2023 11:05:45 +0800 |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 4 | Subject: [PATCH] add-wed-ser-support |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 5 | |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 6 | --- |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 7 | drivers/net/ethernet/mediatek/mtk_eth_soc.c | 8 + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 8 | drivers/net/ethernet/mediatek/mtk_wed.c | 391 ++++++++++++++----- |
| 9 | drivers/net/ethernet/mediatek/mtk_wed.h | 10 + |
| 10 | drivers/net/ethernet/mediatek/mtk_wed_regs.h | 9 + |
| 11 | include/linux/soc/mediatek/mtk_wed.h | 25 +- |
| 12 | 5 files changed, 342 insertions(+), 101 deletions(-) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 13 | |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 14 | diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 15 | index 268c9e7..a24b223 100644 |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 16 | --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c |
| 17 | +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 18 | @@ -4619,6 +4619,9 @@ static void mtk_pending_work(struct work_struct *work) |
developer | 1721ef6 | 2022-11-24 14:42:19 +0800 | [diff] [blame] | 19 | for (i = 0; i < MTK_MAC_COUNT; i++) { |
| 20 | if (!eth->netdev[i]) |
| 21 | continue; |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 22 | +#ifdef CONFIG_NET_MEDIATEK_SOC_WED |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 23 | + mtk_wed_fe_reset(); |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 24 | +#else |
developer | afda357 | 2022-12-28 16:28:30 +0800 | [diff] [blame] | 25 | if (mtk_reset_flag == MTK_FE_STOP_TRAFFIC) { |
| 26 | pr_info("send MTK_FE_STOP_TRAFFIC event\n"); |
| 27 | call_netdevice_notifiers(MTK_FE_STOP_TRAFFIC, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 28 | @@ -4644,6 +4647,7 @@ static void mtk_pending_work(struct work_struct *work) |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 29 | pr_warn("wait for MTK_FE_START_RESET\n"); |
developer | 740bee8 | 2023-10-16 10:58:43 +0800 | [diff] [blame] | 30 | } |
developer | 1721ef6 | 2022-11-24 14:42:19 +0800 | [diff] [blame] | 31 | rtnl_lock(); |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 32 | +#endif |
developer | 1721ef6 | 2022-11-24 14:42:19 +0800 | [diff] [blame] | 33 | break; |
| 34 | } |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 35 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 36 | @@ -4682,6 +4686,9 @@ static void mtk_pending_work(struct work_struct *work) |
developer | afda357 | 2022-12-28 16:28:30 +0800 | [diff] [blame] | 37 | for (i = 0; i < MTK_MAC_COUNT; i++) { |
| 38 | if (!eth->netdev[i]) |
developer | 1721ef6 | 2022-11-24 14:42:19 +0800 | [diff] [blame] | 39 | continue; |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 40 | +#ifdef CONFIG_NET_MEDIATEK_SOC_WED |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 41 | + mtk_wed_fe_reset_complete(); |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 42 | +#else |
developer | afda357 | 2022-12-28 16:28:30 +0800 | [diff] [blame] | 43 | if (mtk_reset_flag == MTK_FE_STOP_TRAFFIC) { |
| 44 | pr_info("send MTK_FE_START_TRAFFIC event\n"); |
| 45 | call_netdevice_notifiers(MTK_FE_START_TRAFFIC, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 46 | @@ -4691,6 +4698,7 @@ static void mtk_pending_work(struct work_struct *work) |
developer | afda357 | 2022-12-28 16:28:30 +0800 | [diff] [blame] | 47 | call_netdevice_notifiers(MTK_FE_RESET_DONE, |
| 48 | eth->netdev[i]); |
| 49 | } |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 50 | +#endif |
developer | afda357 | 2022-12-28 16:28:30 +0800 | [diff] [blame] | 51 | call_netdevice_notifiers(MTK_FE_RESET_NAT_DONE, |
| 52 | eth->netdev[i]); |
developer | 1721ef6 | 2022-11-24 14:42:19 +0800 | [diff] [blame] | 53 | break; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 54 | diff --git a/drivers/net/ethernet/mediatek/mtk_wed.c b/drivers/net/ethernet/mediatek/mtk_wed.c |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 55 | index ad9f3d5..b993f0e 100644 |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 56 | --- a/drivers/net/ethernet/mediatek/mtk_wed.c |
| 57 | +++ b/drivers/net/ethernet/mediatek/mtk_wed.c |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 58 | @@ -13,8 +13,10 @@ |
| 59 | #include <linux/debugfs.h> |
| 60 | #include <linux/iopoll.h> |
| 61 | #include <linux/soc/mediatek/mtk_wed.h> |
| 62 | +#include <net/rtnetlink.h> |
| 63 | |
| 64 | #include "mtk_eth_soc.h" |
| 65 | +#include "mtk_eth_reset.h" |
| 66 | #include "mtk_wed_regs.h" |
| 67 | #include "mtk_wed.h" |
| 68 | #include "mtk_ppe.h" |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 69 | @@ -80,10 +82,13 @@ mtk_wdma_rx_reset(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 70 | |
| 71 | wdma_clr(dev, MTK_WDMA_GLO_CFG, MTK_WDMA_GLO_CFG_RX_DMA_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 72 | ret = readx_poll_timeout(mtk_wdma_read_reset, dev, status, |
| 73 | - !(status & mask), 0, 1000) |
| 74 | + !(status & mask), 0, 10000); |
| 75 | if (ret) |
| 76 | dev_err(dev->hw->dev, "rx reset failed \n"); |
| 77 | |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 78 | + wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX); |
| 79 | + wdma_w32(dev, MTK_WDMA_RESET_IDX, 0); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 80 | + |
| 81 | for (i = 0; i < ARRAY_SIZE(dev->rx_wdma); i++) { |
| 82 | if (!dev->rx_wdma[i].desc) |
| 83 | continue; |
| 84 | @@ -91,6 +96,8 @@ mtk_wdma_rx_reset(struct mtk_wed_device *dev) |
| 85 | wdma_w32(dev, |
| 86 | MTK_WDMA_RING_RX(i) + MTK_WED_RING_OFS_CPU_IDX, 0); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 87 | } |
| 88 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 89 | + return ret; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 90 | } |
| 91 | |
| 92 | static void |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 93 | @@ -101,16 +108,15 @@ mtk_wdma_tx_reset(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 94 | |
| 95 | wdma_clr(dev, MTK_WDMA_GLO_CFG, MTK_WDMA_GLO_CFG_TX_DMA_EN); |
| 96 | if (readx_poll_timeout(mtk_wdma_read_reset, dev, status, |
| 97 | - !(status & mask), 0, 1000)) |
| 98 | + !(status & mask), 0, 10000)) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 99 | dev_err(dev->hw->dev, "tx reset failed \n"); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 100 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 101 | - for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++) { |
| 102 | - if (!dev->tx_wdma[i].desc) |
| 103 | - continue; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 104 | + wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_TX); |
| 105 | + wdma_w32(dev, MTK_WDMA_RESET_IDX, 0); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 106 | |
| 107 | + for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++) |
| 108 | wdma_w32(dev, |
| 109 | MTK_WDMA_RING_TX(i) + MTK_WED_RING_OFS_CPU_IDX, 0); |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 110 | - } |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 111 | } |
| 112 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 113 | static void |
| 114 | @@ -176,6 +182,59 @@ mtk_wed_wo_reset(struct mtk_wed_device *dev) |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 115 | iounmap((void *)reg); |
| 116 | } |
| 117 | |
| 118 | +void mtk_wed_fe_reset(void) |
| 119 | +{ |
| 120 | + int i; |
| 121 | + |
| 122 | + mutex_lock(&hw_lock); |
| 123 | + |
| 124 | + for (i = 0; i < ARRAY_SIZE(hw_list); i++) { |
| 125 | + struct mtk_wed_hw *hw = hw_list[i]; |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 126 | + struct mtk_wed_device *dev; |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 127 | + int err; |
| 128 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 129 | + if (!hw) |
| 130 | + break; |
| 131 | + |
| 132 | + dev = hw->wed_dev; |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 133 | + if (!dev || !dev->wlan.reset) |
| 134 | + continue; |
| 135 | + |
| 136 | + pr_info("%s: receive fe reset start event, trigger SER\n", __func__); |
| 137 | + |
| 138 | + /* reset callback blocks until WLAN reset is completed */ |
| 139 | + err = dev->wlan.reset(dev); |
| 140 | + if (err) |
| 141 | + dev_err(dev->dev, "wlan reset failed: %d\n", err); |
| 142 | + } |
| 143 | + |
| 144 | + mutex_unlock(&hw_lock); |
| 145 | +} |
| 146 | + |
| 147 | +void mtk_wed_fe_reset_complete(void) |
| 148 | +{ |
| 149 | + int i; |
| 150 | + |
| 151 | + mutex_lock(&hw_lock); |
| 152 | + |
| 153 | + for (i = 0; i < ARRAY_SIZE(hw_list); i++) { |
| 154 | + struct mtk_wed_hw *hw = hw_list[i]; |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 155 | + struct mtk_wed_device *dev; |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 156 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 157 | + if (!hw) |
| 158 | + break; |
| 159 | + |
| 160 | + dev = hw->wed_dev; |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 161 | + if (!dev || !dev->wlan.reset_complete) |
| 162 | + continue; |
| 163 | + |
| 164 | + pr_info("%s: receive fe reset done event, continue SER\n", __func__); |
| 165 | + dev->wlan.reset_complete(dev); |
| 166 | + } |
| 167 | + |
| 168 | + mutex_unlock(&hw_lock); |
| 169 | +} |
| 170 | + |
| 171 | static struct mtk_wed_hw * |
| 172 | mtk_wed_assign(struct mtk_wed_device *dev) |
| 173 | { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 174 | @@ -473,8 +532,8 @@ mtk_wed_check_wfdma_rx_fill(struct mtk_wed_device *dev, int idx) |
| 175 | } |
| 176 | |
| 177 | if (i == 3) { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 178 | - dev_err(dev->hw->dev, "mtk_wed%d: rx dma enable failed!\n", |
| 179 | - dev->hw->index); |
| 180 | + dev_err(dev->hw->dev, "mtk_wed%d: rx(%d) dma enable failed!\n", |
| 181 | + dev->hw->index, idx); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 182 | return; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 183 | } |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 184 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 185 | @@ -522,16 +581,8 @@ mtk_wed_dma_disable(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 186 | static void |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 187 | mtk_wed_stop(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 188 | { |
| 189 | - mtk_wed_dma_disable(dev); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 190 | - |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 191 | mtk_wed_set_ext_int(dev, false); |
| 192 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 193 | - wed_clr(dev, MTK_WED_CTRL, |
| 194 | - MTK_WED_CTRL_WDMA_INT_AGENT_EN | |
| 195 | - MTK_WED_CTRL_WPDMA_INT_AGENT_EN | |
| 196 | - MTK_WED_CTRL_WED_TX_BM_EN | |
| 197 | - MTK_WED_CTRL_WED_TX_FREE_AGENT_EN); |
| 198 | - |
| 199 | wed_w32(dev, MTK_WED_WPDMA_INT_TRIGGER, 0); |
| 200 | wed_w32(dev, MTK_WED_WDMA_INT_TRIGGER, 0); |
| 201 | wdma_w32(dev, MTK_WDMA_INT_MASK, 0); |
| 202 | @@ -543,39 +594,49 @@ mtk_wed_stop(struct mtk_wed_device *dev) |
| 203 | |
| 204 | wed_w32(dev, MTK_WED_EXT_INT_MASK1, 0); |
| 205 | wed_w32(dev, MTK_WED_EXT_INT_MASK2, 0); |
| 206 | - wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_RX_BM_EN); |
| 207 | - |
| 208 | } |
| 209 | |
| 210 | static void |
| 211 | -mtk_wed_detach(struct mtk_wed_device *dev) |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 212 | +mtk_wed_deinit(struct mtk_wed_device *dev) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 213 | { |
| 214 | - struct device_node *wlan_node; |
| 215 | - struct mtk_wed_hw *hw = dev->hw; |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 216 | + mtk_wed_stop(dev); |
| 217 | + mtk_wed_dma_disable(dev); |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 218 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 219 | - mutex_lock(&hw_lock); |
| 220 | + wed_clr(dev, MTK_WED_CTRL, |
| 221 | + MTK_WED_CTRL_WDMA_INT_AGENT_EN | |
| 222 | + MTK_WED_CTRL_WPDMA_INT_AGENT_EN | |
| 223 | + MTK_WED_CTRL_WED_TX_BM_EN | |
| 224 | + MTK_WED_CTRL_WED_TX_FREE_AGENT_EN); |
| 225 | |
| 226 | - mtk_wed_stop(dev); |
| 227 | + if (dev->hw->version == 1) |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 228 | + return; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 229 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 230 | - wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX); |
| 231 | - wdma_w32(dev, MTK_WDMA_RESET_IDX, 0); |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 232 | + wed_clr(dev, MTK_WED_CTRL, |
| 233 | + MTK_WED_CTRL_RX_ROUTE_QM_EN | |
| 234 | + MTK_WED_CTRL_WED_RX_BM_EN | |
| 235 | + MTK_WED_CTRL_RX_RRO_QM_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 236 | +} |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 237 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 238 | - mtk_wed_reset(dev, MTK_WED_RESET_WED); |
| 239 | +static void |
| 240 | +__mtk_wed_detach(struct mtk_wed_device *dev) |
| 241 | +{ |
| 242 | + struct device_node *wlan_node; |
| 243 | + struct mtk_wed_hw *hw = dev->hw; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 244 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 245 | - if (mtk_wed_get_rx_capa(dev)) { |
| 246 | - wdma_clr(dev, MTK_WDMA_GLO_CFG, MTK_WDMA_GLO_CFG_TX_DMA_EN); |
| 247 | - wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_TX); |
| 248 | - wdma_w32(dev, MTK_WDMA_RESET_IDX, 0); |
| 249 | - } |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 250 | + mtk_wed_deinit(dev); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 251 | |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 252 | + mtk_wdma_rx_reset(dev); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 253 | + mtk_wed_reset(dev, MTK_WED_RESET_WED); |
| 254 | mtk_wed_free_tx_buffer(dev); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 255 | mtk_wed_free_tx_rings(dev); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 256 | |
| 257 | if (mtk_wed_get_rx_capa(dev)) { |
| 258 | - mtk_wed_wo_reset(dev); |
| 259 | + if(hw->wed_wo) |
| 260 | + mtk_wed_wo_reset(dev); |
| 261 | mtk_wed_free_rx_rings(dev); |
| 262 | - mtk_wed_wo_exit(hw); |
| 263 | - mtk_wdma_rx_reset(dev); |
| 264 | + if(hw->wed_wo) |
| 265 | + mtk_wed_wo_exit(hw); |
| 266 | + mtk_wdma_tx_reset(dev); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 267 | } |
| 268 | |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 269 | if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 270 | @@ -593,6 +654,13 @@ mtk_wed_detach(struct mtk_wed_device *dev) |
| 271 | module_put(THIS_MODULE); |
| 272 | |
| 273 | hw->wed_dev = NULL; |
| 274 | +} |
| 275 | + |
| 276 | +static void |
| 277 | +mtk_wed_detach(struct mtk_wed_device *dev) |
| 278 | +{ |
| 279 | + mutex_lock(&hw_lock); |
| 280 | + __mtk_wed_detach(dev); |
| 281 | mutex_unlock(&hw_lock); |
| 282 | } |
| 283 | |
| 284 | @@ -665,7 +733,7 @@ mtk_wed_hw_init_early(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 285 | { |
| 286 | u32 mask, set; |
| 287 | |
| 288 | - mtk_wed_stop(dev); |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 289 | + mtk_wed_deinit(dev); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 290 | mtk_wed_reset(dev, MTK_WED_RESET_WED); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 291 | mtk_wed_set_wpdma(dev); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 292 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 293 | @@ -715,7 +783,6 @@ mtk_wed_rro_ring_alloc(struct mtk_wed_device *dev, struct mtk_wed_ring *ring, |
| 294 | |
| 295 | ring->desc_size = sizeof(*ring->desc); |
| 296 | ring->size = size; |
| 297 | - memset(ring->desc, 0, size); |
| 298 | |
| 299 | return 0; |
| 300 | } |
| 301 | @@ -938,44 +1005,140 @@ mtk_wed_ring_reset(struct mtk_wed_ring *ring, int size, bool tx) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 302 | } |
| 303 | |
| 304 | static u32 |
| 305 | -mtk_wed_check_busy(struct mtk_wed_device *dev) |
| 306 | +mtk_wed_check_busy(struct mtk_wed_device *dev, u32 reg, u32 mask) |
| 307 | { |
| 308 | - if (wed_r32(dev, MTK_WED_GLO_CFG) & MTK_WED_GLO_CFG_TX_DMA_BUSY) |
| 309 | - return true; |
| 310 | - |
| 311 | - if (wed_r32(dev, MTK_WED_WPDMA_GLO_CFG) & |
| 312 | - MTK_WED_WPDMA_GLO_CFG_TX_DRV_BUSY) |
| 313 | - return true; |
| 314 | - |
| 315 | - if (wed_r32(dev, MTK_WED_CTRL) & MTK_WED_CTRL_WDMA_INT_AGENT_BUSY) |
| 316 | - return true; |
| 317 | - |
| 318 | - if (wed_r32(dev, MTK_WED_WDMA_GLO_CFG) & |
| 319 | - MTK_WED_WDMA_GLO_CFG_RX_DRV_BUSY) |
| 320 | - return true; |
| 321 | - |
| 322 | - if (wdma_r32(dev, MTK_WDMA_GLO_CFG) & |
| 323 | - MTK_WED_WDMA_GLO_CFG_RX_DRV_BUSY) |
| 324 | - return true; |
| 325 | - |
| 326 | - if (wed_r32(dev, MTK_WED_CTRL) & |
| 327 | - (MTK_WED_CTRL_WED_TX_BM_BUSY | MTK_WED_CTRL_WED_TX_FREE_AGENT_BUSY)) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 328 | + if (wed_r32(dev, reg) & mask) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 329 | return true; |
| 330 | |
| 331 | return false; |
| 332 | } |
| 333 | |
| 334 | static int |
| 335 | -mtk_wed_poll_busy(struct mtk_wed_device *dev) |
| 336 | +mtk_wed_poll_busy(struct mtk_wed_device *dev, u32 reg, u32 mask) |
| 337 | { |
| 338 | - int sleep = 15000; |
| 339 | + int sleep = 1000; |
| 340 | int timeout = 100 * sleep; |
| 341 | u32 val; |
| 342 | |
| 343 | return read_poll_timeout(mtk_wed_check_busy, val, !val, sleep, |
| 344 | - timeout, false, dev); |
| 345 | + timeout, false, dev, reg, mask); |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 346 | } |
| 347 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 348 | +static int |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 349 | +mtk_wed_rx_reset(struct mtk_wed_device *dev) |
| 350 | +{ |
| 351 | + struct mtk_wed_wo *wo = dev->hw->wed_wo; |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 352 | + u8 val = WO_STATE_SER_RESET; |
| 353 | + int i, ret; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 354 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 355 | + ret = mtk_wed_mcu_send_msg(wo, MTK_WED_MODULE_ID_WO, |
| 356 | + MTK_WED_WO_CMD_CHANGE_STATE, &val, |
| 357 | + sizeof(val), true); |
| 358 | + |
| 359 | + if (ret) |
| 360 | + return ret; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 361 | + |
| 362 | + wed_clr(dev, MTK_WED_WPDMA_RX_D_GLO_CFG, MTK_WED_WPDMA_RX_D_RX_DRV_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 363 | + ret = mtk_wed_poll_busy(dev, MTK_WED_WPDMA_RX_D_GLO_CFG, |
| 364 | + MTK_WED_WPDMA_RX_D_RX_DRV_BUSY); |
| 365 | + if (ret) { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 366 | + mtk_wed_reset(dev, MTK_WED_RESET_WPDMA_INT_AGENT); |
| 367 | + mtk_wed_reset(dev, MTK_WED_RESET_WPDMA_RX_D_DRV); |
| 368 | + } else { |
| 369 | + wed_w32(dev, MTK_WED_WPDMA_RX_D_RST_IDX, |
| 370 | + MTK_WED_WPDMA_RX_D_RST_CRX_IDX | |
| 371 | + MTK_WED_WPDMA_RX_D_RST_DRV_IDX); |
| 372 | + |
| 373 | + wed_set(dev, MTK_WED_WPDMA_RX_D_GLO_CFG, |
| 374 | + MTK_WED_WPDMA_RX_D_RST_INIT_COMPLETE | |
| 375 | + MTK_WED_WPDMA_RX_D_FSM_RETURN_IDLE); |
| 376 | + wed_clr(dev, MTK_WED_WPDMA_RX_D_GLO_CFG, |
| 377 | + MTK_WED_WPDMA_RX_D_RST_INIT_COMPLETE | |
| 378 | + MTK_WED_WPDMA_RX_D_FSM_RETURN_IDLE); |
| 379 | + |
| 380 | + wed_w32(dev, MTK_WED_WPDMA_RX_D_RST_IDX, 0); |
| 381 | + } |
| 382 | + |
| 383 | + /* reset rro qm */ |
| 384 | + wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_RX_RRO_QM_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 385 | + ret = mtk_wed_poll_busy(dev, MTK_WED_CTRL, |
| 386 | + MTK_WED_CTRL_RX_RRO_QM_BUSY); |
| 387 | + if (ret) { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 388 | + mtk_wed_reset(dev, MTK_WED_RESET_RX_RRO_QM); |
| 389 | + } else { |
| 390 | + wed_set(dev, MTK_WED_RROQM_RST_IDX, |
| 391 | + MTK_WED_RROQM_RST_IDX_MIOD | |
| 392 | + MTK_WED_RROQM_RST_IDX_FDBK); |
| 393 | + wed_w32(dev, MTK_WED_RROQM_RST_IDX, 0); |
| 394 | + } |
| 395 | + |
| 396 | + /* reset route qm */ |
| 397 | + wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_RX_ROUTE_QM_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 398 | + ret = mtk_wed_poll_busy(dev, MTK_WED_CTRL, |
| 399 | + MTK_WED_CTRL_RX_ROUTE_QM_BUSY); |
| 400 | + if (ret) { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 401 | + mtk_wed_reset(dev, MTK_WED_RESET_RX_ROUTE_QM); |
| 402 | + } else { |
| 403 | + wed_set(dev, MTK_WED_RTQM_GLO_CFG, |
| 404 | + MTK_WED_RTQM_Q_RST); |
| 405 | + } |
| 406 | + |
| 407 | + /* reset tx wdma */ |
| 408 | + mtk_wdma_tx_reset(dev); |
| 409 | + |
| 410 | + /* reset tx wdma drv */ |
| 411 | + wed_clr(dev, MTK_WED_WDMA_GLO_CFG, MTK_WED_WDMA_GLO_CFG_TX_DRV_EN); |
| 412 | + mtk_wed_poll_busy(dev, MTK_WED_CTRL, |
| 413 | + MTK_WED_CTRL_WDMA_INT_AGENT_BUSY); |
| 414 | + mtk_wed_reset(dev, MTK_WED_RESET_WDMA_TX_DRV); |
| 415 | + |
| 416 | + /* reset wed rx dma */ |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 417 | + ret = mtk_wed_poll_busy(dev, MTK_WED_GLO_CFG, |
| 418 | + MTK_WED_GLO_CFG_RX_DMA_BUSY); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 419 | + wed_clr(dev, MTK_WED_GLO_CFG, MTK_WED_GLO_CFG_RX_DMA_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 420 | + if (ret) { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 421 | + mtk_wed_reset(dev, MTK_WED_RESET_WED_RX_DMA); |
| 422 | + } else { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 423 | + struct mtk_eth *eth = dev->hw->eth; |
| 424 | + |
| 425 | + if(MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) |
| 426 | + wed_set(dev, MTK_WED_RESET_IDX, |
| 427 | + MTK_WED_RESET_IDX_RX_V2); |
| 428 | + else |
| 429 | + wed_set(dev, MTK_WED_RESET_IDX, MTK_WED_RESET_IDX_RX); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 430 | + wed_w32(dev, MTK_WED_RESET_IDX, 0); |
| 431 | + } |
| 432 | + |
| 433 | + /* reset rx bm */ |
| 434 | + wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_RX_BM_EN); |
| 435 | + mtk_wed_poll_busy(dev, MTK_WED_CTRL, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 436 | + MTK_WED_CTRL_WED_RX_BM_BUSY); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 437 | + mtk_wed_reset(dev, MTK_WED_RESET_RX_BM); |
| 438 | + |
| 439 | + /* wo change to enable state */ |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 440 | + val = WO_STATE_ENABLE; |
| 441 | + ret = mtk_wed_mcu_send_msg(wo, MTK_WED_MODULE_ID_WO, |
| 442 | + MTK_WED_WO_CMD_CHANGE_STATE, &val, |
| 443 | + sizeof(val), true); |
| 444 | + |
| 445 | + if (ret) |
| 446 | + return ret; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 447 | + |
| 448 | + /* wed_rx_ring_reset */ |
| 449 | + for (i = 0; i < ARRAY_SIZE(dev->rx_ring); i++) { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 450 | + if (!dev->rx_ring[i].desc) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 451 | + continue; |
| 452 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 453 | + mtk_wed_ring_reset(&dev->rx_ring[i], MTK_WED_RX_RING_SIZE, |
| 454 | + false); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 455 | + } |
| 456 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 457 | + mtk_wed_free_rx_buffer(dev); |
| 458 | + |
| 459 | + return 0; |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 460 | +} |
| 461 | + |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 462 | + |
| 463 | static void |
| 464 | mtk_wed_reset_dma(struct mtk_wed_device *dev) |
| 465 | { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 466 | @@ -991,22 +1154,25 @@ mtk_wed_reset_dma(struct mtk_wed_device *dev) |
| 467 | true); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 468 | } |
| 469 | |
| 470 | - if (mtk_wed_poll_busy(dev)) |
| 471 | - busy = mtk_wed_check_busy(dev); |
| 472 | + /* 1.Reset WED Tx DMA */ |
| 473 | + wed_clr(dev, MTK_WED_GLO_CFG, MTK_WED_GLO_CFG_TX_DMA_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 474 | + busy = mtk_wed_poll_busy(dev, MTK_WED_GLO_CFG, |
| 475 | + MTK_WED_GLO_CFG_TX_DMA_BUSY); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 476 | |
| 477 | if (busy) { |
| 478 | mtk_wed_reset(dev, MTK_WED_RESET_WED_TX_DMA); |
| 479 | } else { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 480 | - wed_w32(dev, MTK_WED_RESET_IDX, |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 481 | - MTK_WED_RESET_IDX_TX | |
| 482 | - MTK_WED_RESET_IDX_RX); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 483 | + wed_w32(dev, MTK_WED_RESET_IDX, MTK_WED_RESET_IDX_TX); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 484 | wed_w32(dev, MTK_WED_RESET_IDX, 0); |
| 485 | } |
| 486 | |
| 487 | - wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX); |
| 488 | - wdma_w32(dev, MTK_WDMA_RESET_IDX, 0); |
| 489 | + /* 2. Reset WDMA Rx DMA/Driver_Engine */ |
| 490 | + busy = !!mtk_wdma_rx_reset(dev); |
| 491 | |
| 492 | - mtk_wdma_rx_reset(dev); |
| 493 | + wed_clr(dev, MTK_WED_WDMA_GLO_CFG, MTK_WED_WDMA_GLO_CFG_RX_DRV_EN); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 494 | + if (!busy) |
| 495 | + busy = mtk_wed_poll_busy(dev, MTK_WED_WDMA_GLO_CFG, |
| 496 | + MTK_WED_WDMA_GLO_CFG_RX_DRV_BUSY); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 497 | |
| 498 | if (busy) { |
| 499 | mtk_wed_reset(dev, MTK_WED_RESET_WDMA_INT_AGENT); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 500 | @@ -1023,6 +1189,9 @@ mtk_wed_reset_dma(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 501 | MTK_WED_WDMA_GLO_CFG_RST_INIT_COMPLETE); |
| 502 | } |
| 503 | |
| 504 | + /* 3. Reset WED WPDMA Tx Driver Engine */ |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 505 | + wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_TX_FREE_AGENT_EN); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 506 | + |
| 507 | for (i = 0; i < 100; i++) { |
| 508 | val = wed_r32(dev, MTK_WED_TX_BM_INTF); |
| 509 | if (FIELD_GET(MTK_WED_TX_BM_INTF_TKFIFO_FDEP, val) == 0x40) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 510 | @@ -1030,8 +1199,21 @@ mtk_wed_reset_dma(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 511 | } |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 512 | |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 513 | mtk_wed_reset(dev, MTK_WED_RESET_TX_FREE_AGENT); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 514 | + wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_TX_BM_EN); |
| 515 | mtk_wed_reset(dev, MTK_WED_RESET_TX_BM); |
| 516 | |
| 517 | + /* 4. Reset WED WPDMA Tx Driver Engine */ |
| 518 | + busy = mtk_wed_poll_busy(dev, MTK_WED_WPDMA_GLO_CFG, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 519 | + MTK_WED_WPDMA_GLO_CFG_TX_DRV_BUSY); |
| 520 | + |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 521 | + wed_clr(dev, MTK_WED_WPDMA_GLO_CFG, |
| 522 | + MTK_WED_WPDMA_GLO_CFG_TX_DRV_EN | |
| 523 | + MTK_WED_WPDMA_GLO_CFG_RX_DRV_EN); |
| 524 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 525 | + if(!busy) |
| 526 | + mtk_wed_poll_busy(dev, MTK_WED_WPDMA_GLO_CFG, |
| 527 | + MTK_WED_WPDMA_GLO_CFG_RX_DRV_BUSY); |
| 528 | + |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 529 | if (busy) { |
| 530 | mtk_wed_reset(dev, MTK_WED_RESET_WPDMA_INT_AGENT); |
| 531 | mtk_wed_reset(dev, MTK_WED_RESET_WPDMA_TX_DRV); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 532 | @@ -1043,6 +1225,16 @@ mtk_wed_reset_dma(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 533 | wed_w32(dev, MTK_WED_WPDMA_RESET_IDX, 0); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 534 | } |
| 535 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 536 | + dev->init_done = false; |
| 537 | + if (dev->hw->version == 1) |
| 538 | + return; |
| 539 | + |
| 540 | + if (!busy) { |
| 541 | + wed_w32(dev, MTK_WED_RESET_IDX, MTK_WED_RESET_WPDMA_IDX_RX); |
| 542 | + wed_w32(dev, MTK_WED_RESET_IDX, 0); |
| 543 | + } |
| 544 | + |
| 545 | + mtk_wed_rx_reset(dev); |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 546 | } |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 547 | |
| 548 | static int |
| 549 | @@ -1062,7 +1254,8 @@ mtk_wed_ring_alloc(struct mtk_wed_device *dev, struct mtk_wed_ring *ring, |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 550 | } |
| 551 | |
| 552 | static int |
| 553 | -mtk_wed_wdma_rx_ring_setup(struct mtk_wed_device *dev, int idx, int size) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 554 | +mtk_wed_wdma_rx_ring_setup(struct mtk_wed_device *dev, int idx, int size, |
| 555 | + bool reset) |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 556 | { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 557 | u32 desc_size = sizeof(struct mtk_wdma_desc) * dev->hw->version; |
| 558 | struct mtk_wed_ring *wdma; |
| 559 | @@ -1071,8 +1264,8 @@ mtk_wed_wdma_rx_ring_setup(struct mtk_wed_device *dev, int idx, int size) |
| 560 | return -EINVAL; |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 561 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 562 | wdma = &dev->rx_wdma[idx]; |
| 563 | - if (mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE, desc_size, |
| 564 | - true)) |
| 565 | + if (!reset && mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE, |
| 566 | + desc_size, true)) |
| 567 | return -ENOMEM; |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 568 | |
| 569 | wdma_w32(dev, MTK_WDMA_RING_RX(idx) + MTK_WED_RING_OFS_BASE, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 570 | @@ -1090,7 +1283,8 @@ mtk_wed_wdma_rx_ring_setup(struct mtk_wed_device *dev, int idx, int size) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 571 | } |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 572 | |
| 573 | static int |
| 574 | -mtk_wed_wdma_tx_ring_setup(struct mtk_wed_device *dev, int idx, int size) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 575 | +mtk_wed_wdma_tx_ring_setup(struct mtk_wed_device *dev, int idx, int size, |
| 576 | + bool reset) |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 577 | { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 578 | u32 desc_size = sizeof(struct mtk_wdma_desc) * dev->hw->version; |
| 579 | struct mtk_wed_ring *wdma; |
| 580 | @@ -1099,8 +1293,8 @@ mtk_wed_wdma_tx_ring_setup(struct mtk_wed_device *dev, int idx, int size) |
| 581 | return -EINVAL; |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 582 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 583 | wdma = &dev->tx_wdma[idx]; |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 584 | - if (mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 585 | - desc_size, true)) |
| 586 | + if (!reset && mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE, |
| 587 | + desc_size, true)) |
| 588 | return -ENOMEM; |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 589 | |
| 590 | wdma_w32(dev, MTK_WDMA_RING_TX(idx) + MTK_WED_RING_OFS_BASE, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 591 | @@ -1112,6 +1306,9 @@ mtk_wed_wdma_tx_ring_setup(struct mtk_wed_device *dev, int idx, int size) |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 592 | wdma_w32(dev, |
| 593 | MTK_WDMA_RING_TX(idx) + MTK_WED_RING_OFS_DMA_IDX, 0); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 594 | |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 595 | + if (reset) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 596 | + mtk_wed_ring_reset(wdma, MTK_WED_WDMA_RING_SIZE, true); |
| 597 | + |
| 598 | if (!idx) { |
| 599 | wed_w32(dev, MTK_WED_WDMA_RING_TX + MTK_WED_RING_OFS_BASE, |
| 600 | wdma->desc_phys); |
| 601 | @@ -1267,9 +1464,12 @@ mtk_wed_start(struct mtk_wed_device *dev, u32 irq_mask) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 602 | { |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 603 | int i; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 604 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 605 | + if (mtk_wed_get_rx_capa(dev) && mtk_wed_rx_buffer_alloc(dev)) |
| 606 | + return; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 607 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 608 | for (i = 0; i < ARRAY_SIZE(dev->rx_wdma); i++) |
| 609 | if (!dev->rx_wdma[i].desc) |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 610 | - mtk_wed_wdma_rx_ring_setup(dev, i, 16); |
| 611 | + mtk_wed_wdma_rx_ring_setup(dev, i, 16, false); |
| 612 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 613 | |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 614 | mtk_wed_hw_init(dev); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 615 | @@ -1278,10 +1478,9 @@ mtk_wed_start(struct mtk_wed_device *dev, u32 irq_mask) |
| 616 | mtk_wed_set_ext_int(dev, true); |
| 617 | |
| 618 | if (dev->hw->version == 1) { |
| 619 | - u32 val; |
| 620 | - |
| 621 | - val = dev->wlan.wpdma_phys | MTK_PCIE_MIRROR_MAP_EN | |
| 622 | - FIELD_PREP(MTK_PCIE_MIRROR_MAP_WED_ID, dev->hw->index); |
| 623 | + u32 val = dev->wlan.wpdma_phys | MTK_PCIE_MIRROR_MAP_EN | |
| 624 | + FIELD_PREP(MTK_PCIE_MIRROR_MAP_WED_ID, |
| 625 | + dev->hw->index); |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 626 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 627 | val |= BIT(0) | (BIT(1) * !!dev->hw->index); |
| 628 | regmap_write(dev->hw->mirror, dev->hw->index * 4, val); |
| 629 | @@ -1353,10 +1552,6 @@ mtk_wed_attach(struct mtk_wed_device *dev) |
| 630 | goto out; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 631 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 632 | if (mtk_wed_get_rx_capa(dev)) { |
| 633 | - ret = mtk_wed_rx_buffer_alloc(dev); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 634 | - if (ret) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 635 | - goto out; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 636 | - |
| 637 | ret = mtk_wed_rro_alloc(dev); |
| 638 | if (ret) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 639 | goto out; |
| 640 | @@ -1364,6 +1559,10 @@ mtk_wed_attach(struct mtk_wed_device *dev) |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 641 | |
| 642 | mtk_wed_hw_init_early(dev); |
| 643 | |
| 644 | + init_completion(&dev->fe_reset_done); |
| 645 | + init_completion(&dev->wlan_reset_done); |
| 646 | + atomic_set(&dev->fe_reset, 0); |
| 647 | + |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 648 | if (hw->version == 1) { |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 649 | regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP, |
| 650 | BIT(hw->index), 0); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 651 | @@ -1373,8 +1572,10 @@ mtk_wed_attach(struct mtk_wed_device *dev) |
| 652 | } |
| 653 | |
| 654 | out: |
| 655 | - if (ret) |
| 656 | - mtk_wed_detach(dev); |
| 657 | + if (ret) { |
| 658 | + dev_err(dev->hw->dev, "failed to attach wed device\n"); |
| 659 | + __mtk_wed_detach(dev); |
| 660 | + } |
| 661 | unlock: |
| 662 | mutex_unlock(&hw_lock); |
| 663 | |
| 664 | @@ -1382,7 +1583,8 @@ mtk_wed_attach(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 665 | } |
| 666 | |
| 667 | static int |
| 668 | -mtk_wed_tx_ring_setup(struct mtk_wed_device *dev, int idx, void __iomem *regs) |
| 669 | +mtk_wed_tx_ring_setup(struct mtk_wed_device *dev, int idx, |
| 670 | + void __iomem *regs, bool reset) |
| 671 | { |
| 672 | struct mtk_wed_ring *ring = &dev->tx_ring[idx]; |
| 673 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 674 | @@ -1401,11 +1603,12 @@ mtk_wed_tx_ring_setup(struct mtk_wed_device *dev, int idx, void __iomem *regs) |
| 675 | if (WARN_ON(idx >= ARRAY_SIZE(dev->tx_ring))) |
| 676 | return -EINVAL; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 677 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 678 | - if (mtk_wed_ring_alloc(dev, ring, MTK_WED_TX_RING_SIZE, |
| 679 | - sizeof(*ring->desc), true)) |
| 680 | + if (!reset && mtk_wed_ring_alloc(dev, ring, MTK_WED_TX_RING_SIZE, |
| 681 | + sizeof(*ring->desc), true)) |
| 682 | return -ENOMEM; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 683 | |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 684 | - if (mtk_wed_wdma_rx_ring_setup(dev, idx, MTK_WED_WDMA_RING_SIZE)) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 685 | + if (mtk_wed_wdma_rx_ring_setup(dev, idx, MTK_WED_WDMA_RING_SIZE, |
| 686 | + reset)) |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 687 | return -ENOMEM; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 688 | |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 689 | ring->reg_base = MTK_WED_RING_TX(idx); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 690 | @@ -1450,18 +1653,20 @@ mtk_wed_txfree_ring_setup(struct mtk_wed_device *dev, void __iomem *regs) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 691 | } |
| 692 | |
| 693 | static int |
| 694 | -mtk_wed_rx_ring_setup(struct mtk_wed_device *dev, int idx, void __iomem *regs) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 695 | +mtk_wed_rx_ring_setup(struct mtk_wed_device *dev, int idx, void __iomem *regs, |
| 696 | + bool reset) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 697 | { |
| 698 | struct mtk_wed_ring *ring = &dev->rx_ring[idx]; |
| 699 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 700 | if (WARN_ON(idx >= ARRAY_SIZE(dev->rx_ring))) |
| 701 | return -EINVAL; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 702 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 703 | - if (mtk_wed_ring_alloc(dev, ring, MTK_WED_RX_RING_SIZE, |
| 704 | - sizeof(*ring->desc), false)) |
| 705 | + if (!reset && mtk_wed_ring_alloc(dev, ring, MTK_WED_RX_RING_SIZE, |
| 706 | + sizeof(*ring->desc), false)) |
| 707 | return -ENOMEM; |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 708 | |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 709 | - if (mtk_wed_wdma_tx_ring_setup(dev, idx, MTK_WED_WDMA_RING_SIZE)) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 710 | + if (mtk_wed_wdma_tx_ring_setup(dev, idx, MTK_WED_WDMA_RING_SIZE, |
| 711 | + reset)) |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 712 | return -ENOMEM; |
| 713 | |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 714 | ring->reg_base = MTK_WED_RING_RX_DATA(idx); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 715 | diff --git a/drivers/net/ethernet/mediatek/mtk_wed.h b/drivers/net/ethernet/mediatek/mtk_wed.h |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 716 | index 1bfd96f..2ce1a5b 100644 |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 717 | --- a/drivers/net/ethernet/mediatek/mtk_wed.h |
| 718 | +++ b/drivers/net/ethernet/mediatek/mtk_wed.h |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 719 | @@ -160,6 +160,9 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth, |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 720 | void mtk_wed_exit(void); |
| 721 | int mtk_wed_flow_add(int index); |
| 722 | void mtk_wed_flow_remove(int index); |
| 723 | +void mtk_wed_fe_reset(void); |
| 724 | +void mtk_wed_fe_reset_complete(void); |
| 725 | + |
| 726 | #else |
| 727 | static inline void |
| 728 | mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 729 | @@ -178,6 +181,13 @@ static inline int mtk_wed_flow_add(int index) |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 730 | static inline void mtk_wed_flow_remove(int index) |
| 731 | { |
| 732 | } |
| 733 | +static inline void mtk_wed_fe_reset(void) |
| 734 | +{ |
| 735 | +} |
| 736 | + |
| 737 | +static inline void mtk_wed_fe_reset_complete(void) |
| 738 | +{ |
| 739 | +} |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 740 | #endif |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 741 | |
| 742 | #ifdef CONFIG_DEBUG_FS |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 743 | diff --git a/drivers/net/ethernet/mediatek/mtk_wed_regs.h b/drivers/net/ethernet/mediatek/mtk_wed_regs.h |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 744 | index a79305f..645b8b1 100644 |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 745 | --- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h |
| 746 | +++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 747 | @@ -32,11 +32,15 @@ struct mtk_wdma_desc { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 748 | |
| 749 | #define MTK_WED_RESET 0x008 |
| 750 | #define MTK_WED_RESET_TX_BM BIT(0) |
| 751 | +#define MTK_WED_RESET_RX_BM BIT(1) |
| 752 | #define MTK_WED_RESET_TX_FREE_AGENT BIT(4) |
| 753 | #define MTK_WED_RESET_WPDMA_TX_DRV BIT(8) |
| 754 | #define MTK_WED_RESET_WPDMA_RX_DRV BIT(9) |
| 755 | +#define MTK_WED_RESET_WPDMA_RX_D_DRV BIT(10) |
| 756 | #define MTK_WED_RESET_WPDMA_INT_AGENT BIT(11) |
| 757 | #define MTK_WED_RESET_WED_TX_DMA BIT(12) |
| 758 | +#define MTK_WED_RESET_WED_RX_DMA BIT(13) |
| 759 | +#define MTK_WED_RESET_WDMA_TX_DRV BIT(16) |
| 760 | #define MTK_WED_RESET_WDMA_RX_DRV BIT(17) |
| 761 | #define MTK_WED_RESET_WDMA_INT_AGENT BIT(19) |
| 762 | #define MTK_WED_RESET_RX_RRO_QM BIT(20) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 763 | @@ -174,6 +178,8 @@ struct mtk_wdma_desc { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 764 | #define MTK_WED_RESET_IDX 0x20c |
| 765 | #define MTK_WED_RESET_IDX_TX GENMASK(3, 0) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 766 | #define MTK_WED_RESET_IDX_RX GENMASK(17, 16) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 767 | +#define MTK_WED_RESET_IDX_RX_V2 GENMASK(7, 6) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 768 | +#define MTK_WED_RESET_WPDMA_IDX_RX GENMASK(31, 30) |
| 769 | |
| 770 | #define MTK_WED_TX_MIB(_n) (0x2a0 + (_n) * 4) |
| 771 | #define MTK_WED_RX_MIB(_n) (0x2e0 + (_n) * 4) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 772 | @@ -287,6 +293,9 @@ struct mtk_wdma_desc { |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 773 | |
| 774 | #define MTK_WED_WPDMA_RX_D_GLO_CFG 0x75c |
| 775 | #define MTK_WED_WPDMA_RX_D_RX_DRV_EN BIT(0) |
| 776 | +#define MTK_WED_WPDMA_RX_D_RX_DRV_BUSY BIT(1) |
| 777 | +#define MTK_WED_WPDMA_RX_D_FSM_RETURN_IDLE BIT(3) |
| 778 | +#define MTK_WED_WPDMA_RX_D_RST_INIT_COMPLETE BIT(4) |
| 779 | #define MTK_WED_WPDMA_RX_D_INIT_PHASE_RXEN_SEL GENMASK(11, 7) |
| 780 | #define MTK_WED_WPDMA_RX_D_RXD_READ_LEN GENMASK(31, 24) |
| 781 | |
| 782 | diff --git a/include/linux/soc/mediatek/mtk_wed.h b/include/linux/soc/mediatek/mtk_wed.h |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 783 | index 658f392..6772ea8 100644 |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 784 | --- a/include/linux/soc/mediatek/mtk_wed.h |
| 785 | +++ b/include/linux/soc/mediatek/mtk_wed.h |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 786 | @@ -151,16 +151,21 @@ struct mtk_wed_device { |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 787 | void (*release_rx_buf)(struct mtk_wed_device *wed); |
developer | 3d5faf2 | 2022-11-29 18:07:22 +0800 | [diff] [blame] | 788 | void (*update_wo_rx_stats)(struct mtk_wed_device *wed, |
| 789 | struct mtk_wed_wo_rx_stats *stats); |
developer | d516958 | 2023-02-17 10:32:38 +0800 | [diff] [blame] | 790 | + int (*reset)(struct mtk_wed_device *wed); |
| 791 | + void (*reset_complete)(struct mtk_wed_device *wed); |
developer | 6e3b5d1 | 2022-08-16 15:37:38 +0800 | [diff] [blame] | 792 | } wlan; |
| 793 | + struct completion fe_reset_done; |
| 794 | + struct completion wlan_reset_done; |
| 795 | + atomic_t fe_reset; |
| 796 | #endif |
| 797 | }; |
| 798 | |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 799 | struct mtk_wed_ops { |
| 800 | int (*attach)(struct mtk_wed_device *dev); |
| 801 | int (*tx_ring_setup)(struct mtk_wed_device *dev, int ring, |
| 802 | - void __iomem *regs); |
| 803 | + void __iomem *regs, bool reset); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 804 | int (*rx_ring_setup)(struct mtk_wed_device *dev, int ring, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 805 | - void __iomem *regs); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 806 | + void __iomem *regs, bool reset); |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 807 | int (*txfree_ring_setup)(struct mtk_wed_device *dev, |
| 808 | void __iomem *regs); |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 809 | int (*msg_update)(struct mtk_wed_device *dev, int cmd_id, |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 810 | @@ -216,8 +221,8 @@ mtk_wed_get_rx_capa(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 811 | #define mtk_wed_device_active(_dev) !!(_dev)->ops |
| 812 | #define mtk_wed_device_detach(_dev) (_dev)->ops->detach(_dev) |
| 813 | #define mtk_wed_device_start(_dev, _mask) (_dev)->ops->start(_dev, _mask) |
| 814 | -#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs) \ |
| 815 | - (_dev)->ops->tx_ring_setup(_dev, _ring, _regs) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 816 | +#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs, _reset) \ |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 817 | + (_dev)->ops->tx_ring_setup(_dev, _ring, _regs, _reset) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 818 | #define mtk_wed_device_txfree_ring_setup(_dev, _regs) \ |
| 819 | (_dev)->ops->txfree_ring_setup(_dev, _regs) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 820 | #define mtk_wed_device_reg_read(_dev, _reg) \ |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 821 | @@ -228,12 +233,14 @@ mtk_wed_get_rx_capa(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 822 | (_dev)->ops->irq_get(_dev, _mask) |
| 823 | #define mtk_wed_device_irq_set_mask(_dev, _mask) \ |
| 824 | (_dev)->ops->irq_set_mask(_dev, _mask) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 825 | -#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs) \ |
| 826 | - (_dev)->ops->rx_ring_setup(_dev, _ring, _regs) |
| 827 | +#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs, _reset) \ |
| 828 | + (_dev)->ops->rx_ring_setup(_dev, _ring, _regs, reset) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 829 | #define mtk_wed_device_ppe_check(_dev, _skb, _reason, _hash) \ |
| 830 | (_dev)->ops->ppe_check(_dev, _skb, _reason, _hash) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 831 | #define mtk_wed_device_update_msg(_dev, _id, _msg, _len) \ |
| 832 | (_dev)->ops->msg_update(_dev, _id, _msg, _len) |
| 833 | +#define mtk_wed_device_stop(_dev) (_dev)->ops->stop(_dev) |
| 834 | +#define mtk_wed_device_dma_reset(_dev) (_dev)->ops->reset_dma(_dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 835 | #else |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 836 | static inline bool mtk_wed_device_active(struct mtk_wed_device *dev) |
| 837 | { |
| 838 | @@ -241,15 +248,17 @@ static inline bool mtk_wed_device_active(struct mtk_wed_device *dev) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 839 | } |
| 840 | #define mtk_wed_device_detach(_dev) do {} while (0) |
| 841 | #define mtk_wed_device_start(_dev, _mask) do {} while (0) |
| 842 | -#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs) -ENODEV |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 843 | +#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs, _reset) -ENODEV |
| 844 | #define mtk_wed_device_txfree_ring_setup(_dev, _ring, _regs) -ENODEV |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 845 | #define mtk_wed_device_reg_read(_dev, _reg) 0 |
| 846 | #define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0) |
| 847 | #define mtk_wed_device_irq_get(_dev, _mask) 0 |
| 848 | #define mtk_wed_device_irq_set_mask(_dev, _mask) do {} while (0) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 849 | -#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs) -ENODEV |
| 850 | +#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs, _reset) -ENODEV |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 851 | #define mtk_wed_device_ppe_check(_dev, _hash) do {} while (0) |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 852 | #define mtk_wed_device_update_msg(_dev, _id, _msg, _len) -ENODEV |
| 853 | +#define mtk_wed_device_stop(_dev) do {} while (0) |
| 854 | +#define mtk_wed_device_dma_reset(_dev) do {} while (0) |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 855 | #endif |
| 856 | |
developer | 69bcd59 | 2024-03-25 14:26:39 +0800 | [diff] [blame^] | 857 | #endif |
developer | c89c547 | 2022-08-02 13:00:04 +0800 | [diff] [blame] | 858 | -- |
| 859 | 2.18.0 |
| 860 | |