blob: 91f689ed30ceed5e4068be4c74ffd81c684daba2 [file] [log] [blame]
developer69bcd592024-03-25 14:26:39 +08001/* FILE NAME: air_switch.c
2 * PURPOSE:
3 * Define the switch function in AIR SDK.
4 *
5 * NOTES:
6 * None
7 */
8
9/* INCLUDE FILE DECLARATIONS
10*/
11#include "air.h"
12
13/* NAMING CONSTANT DECLARATIONS
14*/
15#define AIR_SYS_RST_WAIT_TIME (100000)
16
17/* MACRO FUNCTION DECLARATIONS
18*/
19
20/* DATA TYPE DECLARATIONS
21*/
22
23/* GLOBAL VARIABLE DECLARATIONS
24*/
25
26/* LOCAL SUBPROGRAM DECLARATIONS
27*/
28
29/* STATIC VARIABLE DECLARATIONS
30*/
31
32/* LOCAL SUBPROGRAM BODIES
33*/
34
35/* EXPORTED SUBPROGRAM BODIES
36*/
37
38
39/* FUNCTION NAME: air_switch_setCpuPort
40 * PURPOSE:
41 * Set CPU port member
42 *
43 * INPUT:
44 * unit -- Device ID
45 * port -- CPU port index
46 *
47 * OUTPUT:
48 * None
49 *
50 * RETURN:
51 * AIR_E_OK
52 * AIR_E_BAD_PARAMETER
53 *
54 * NOTES:
55 * None
56 */
57AIR_ERROR_NO_T
58air_switch_setCpuPort(
59 const UI32_T unit,
60 const UI32_T port)
61{
62 UI32_T regMFC = 0;
63
64 /* Mistake proofing */
65 AIR_PARAM_CHK(port > AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
66
67 /* Read CFC */
68 aml_readReg(unit, MFC, &regMFC);
69 AIR_PRINT("PTC REG:%x. val:%x\n", MFC,regMFC);
70
71 /* Set CPU portmap */
72 regMFC &= ~BITS_RANGE(MFC_CPU_PORT_OFFSET, MFC_CPU_PORT_LENGTH);
73 regMFC |= (port << MFC_CPU_PORT_OFFSET);
74
75 /* Write CFC */
76 aml_writeReg(unit, MFC, regMFC);
77 AIR_PRINT("PTC REG:%x. val:%x\n", MFC,regMFC);
78
79 return AIR_E_OK;
80}
81
82/* FUNCTION NAME: air_switch_getCpuPort
83 * PURPOSE:
84 * Get CPU port member
85 *
86 * INPUT:
87 * unit -- Device ID
88 *
89 * OUTPUT:
90 * ptr_port -- CPU port index
91 *
92 * RETURN:
93 * AIR_E_OK
94 * AIR_E_BAD_PARAMETER
95 *
96 * NOTES:
97 * None
98 */
99AIR_ERROR_NO_T
100air_switch_getCpuPort(
101 const UI32_T unit,
102 UI32_T *ptr_port)
103{
104 UI32_T regMFC = 0;
105
106 /* Mistake proofing */
107 AIR_CHECK_PTR(ptr_port);
108
109 /* Read CFC */
110 aml_readReg(unit, MFC, &regMFC);
111
112 /* Get CPU portmap */
113 (*ptr_port) = BITS_OFF_R(regMFC, MFC_CPU_PORT_OFFSET, MFC_CPU_PORT_LENGTH);
114
115 return AIR_E_OK;
116}
117
118
119/* FUNCTION NAME: air_switch_setCpuPortEN
120 * PURPOSE:
121 * Set CPU port Enable
122 *
123 * INPUT:
124 * unit -- Device ID
125 * cpu_en -- CPU Port Enable
126 *
127 * OUTPUT:
128 * None
129 *
130 * RETURN:
131 * AIR_E_OK
132 * AIR_E_BAD_PARAMETER
133 *
134 * NOTES:
135 * None
136 */
137AIR_ERROR_NO_T
138air_switch_setCpuPortEn(
139 const UI32_T unit,
140 const BOOL_T cpu_en)
141{
142 UI32_T regMFC = 0;
143
144 /* Mistake proofing */
145 AIR_PARAM_CHK(((TRUE != cpu_en) && (FALSE != cpu_en)), AIR_E_BAD_PARAMETER);
146
147 /* Read CFC */
148 aml_readReg(unit, MFC, &regMFC);
149
150 /* Set CPU portmap */
151 regMFC &= ~BITS_RANGE(MFC_CPU_EN_OFFSET, MFC_CPU_EN_LENGTH);
152 regMFC |= cpu_en << MFC_CPU_EN_OFFSET ;
153
154 /* Write CFC */
155 aml_writeReg(unit, MFC, regMFC);
156
157 return AIR_E_OK;
158}
159
160/* FUNCTION NAME: air_switch_getCpuPortEn
161 * PURPOSE:
162 * Get CPU port member
163 *
164 * INPUT:
165 * unit -- Device ID
166 *
167 * OUTPUT:
168 * cpu_en -- CPU Port enable
169 *
170 * RETURN:
171 * AIR_E_OK
172 * AIR_E_BAD_PARAMETER
173 *
174 * NOTES:
175 * None
176 */
177AIR_ERROR_NO_T
178air_switch_getCpuPortEn(
179 const UI32_T unit,
180 BOOL_T *cpu_en)
181{
182 UI32_T regMFC = 0;
183
184 /* Mistake proofing */
185 AIR_CHECK_PTR(cpu_en);
186
187 /* Read CFC */
188 aml_readReg(unit, MFC, &regMFC);
189
190 /* Get CPU portmap */
191 (*cpu_en) = BITS_OFF_R(regMFC, MFC_CPU_EN_OFFSET, MFC_CPU_EN_LENGTH);
192
193 return AIR_E_OK;
194}
195
196/* FUNCTION NAME: air_switch_setSysIntrEn
197 * PURPOSE:
198 * Set system interrupt enable
199 *
200 * INPUT:
201 * unit -- Device ID
202 * intr -- system interrupt type
203 * enable -- system interrupt enable/disable
204 *
205 * OUTPUT:
206 * None
207 *
208 * RETURN:
209 * AIR_E_OK
210 * AIR_E_BAD_PARAMETER
211 *
212 * NOTES:
213 * None
214 */
215AIR_ERROR_NO_T
216air_switch_setSysIntrEn(
217 const UI32_T unit,
218 const AIR_SYS_INTR_TYPE_T intr,
219 const BOOL_T enable)
220{
221 UI32_T val = 0;
222
223 AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
224 AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY7_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
225 AIR_PARAM_CHK(((TRUE != enable) && (FALSE != enable)), AIR_E_BAD_PARAMETER);
226
227 aml_readReg(unit, SYS_INT_EN, &val);
228 val &= ~BIT(intr);
229 val |= (TRUE == enable) ? BIT(intr) : 0;
230 aml_writeReg(unit, SYS_INT_EN, val);
231
232 return AIR_E_OK;
233}
234
235/* FUNCTION NAME: air_switch_getSysIntrEn
236 * PURPOSE:
237 * Get system interrupt enable
238 *
239 * INPUT:
240 * unit -- Device ID
241 * intr -- system interrupt type
242 *
243 * OUTPUT:
244 * ptr_enable -- system interrupt enable/disable
245 *
246 * RETURN:
247 * AIR_E_OK
248 * AIR_E_BAD_PARAMETER
249 *
250 * NOTES:
251 * None
252 */
253AIR_ERROR_NO_T
254air_switch_getSysIntrEn(
255 const UI32_T unit,
256 const AIR_SYS_INTR_TYPE_T intr,
257 BOOL_T *ptr_enable)
258{
259 UI32_T val = 0;
260
261 AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
262 AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY7_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
263 AIR_CHECK_PTR(ptr_enable);
264
265 aml_readReg(unit, SYS_INT_EN, &val);
266 *ptr_enable = (val & BIT(intr)) ? TRUE : FALSE;
267
268 return AIR_E_OK;
269}
270
271/* FUNCTION NAME: air_switch_setSysIntrStatus
272 * PURPOSE:
273 * Set system interrupt status
274 *
275 * INPUT:
276 * unit -- Device ID
277 * intr -- system interrupt type
278 * enable -- write TRUE to clear interrupt status
279 *
280 * OUTPUT:
281 * None
282 *
283 * RETURN:
284 * AIR_E_OK
285 * AIR_E_BAD_PARAMETER
286 *
287 * NOTES:
288 * None
289 */
290AIR_ERROR_NO_T
291air_switch_setSysIntrStatus(
292 const UI32_T unit,
293 const AIR_SYS_INTR_TYPE_T intr,
294 const BOOL_T enable)
295{
296 UI32_T val = 0;
297
298 AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
299 AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY6_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
300 AIR_PARAM_CHK((TRUE != enable), AIR_E_BAD_PARAMETER);
301
302 aml_writeReg(unit, SYS_INT_STS, BIT(intr));
303
304 return AIR_E_OK;
305}
306
307/* FUNCTION NAME: air_switch_getSysIntrStatus
308 * PURPOSE:
309 * Get system interrupt status
310 *
311 * INPUT:
312 * unit -- Device ID
313 * intr -- system interrupt type
314 *
315 * OUTPUT:
316 * ptr_enable -- system interrupt status
317 *
318 * RETURN:
319 * AIR_E_OK
320 * AIR_E_BAD_PARAMETER
321 *
322 * NOTES:
323 * None
324 */
325AIR_ERROR_NO_T
326air_switch_getSysIntrStatus(
327 const UI32_T unit,
328 const AIR_SYS_INTR_TYPE_T intr,
329 BOOL_T *ptr_enable)
330{
331 UI32_T val = 0;
332
333 AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
334 AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY6_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
335 AIR_CHECK_PTR(ptr_enable);
336
337 aml_readReg(unit, SYS_INT_STS, &val);
338 *ptr_enable = (val & BIT(intr)) ? TRUE : FALSE;
339
340 return AIR_E_OK;
341}
342
343/* FUNCTION NAME: air_switch_reset
344 * PURPOSE:
345 * Reset whole system
346 *
347 * INPUT:
348 * None
349 *
350 * OUTPUT:
351 * None
352 *
353 * RETURN:
354 * AIR_E_OK
355 *
356 * NOTES:
357 * None
358 */
359AIR_ERROR_NO_T
360air_switch_reset(
361 const UI32_T unit)
362{
363 UI32_T val = 0;
364
365 aml_writeReg(unit, RST_CTRL1, BIT(SYS_SW_RST_OFFT));
366 AIR_UDELAY(AIR_SYS_RST_WAIT_TIME);
367
368 return AIR_E_OK;
369}