blob: 0aa0f55241d2778b330b5b7c1255df7985ae40f2 [file] [log] [blame]
developer66e89bc2024-04-23 14:50:01 +08001From 8353ce159acb7a91db3d9df1591b1d0882b11063 Mon Sep 17 00:00:00 2001
2From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
3Date: Wed, 27 Mar 2024 17:50:16 +0800
4Subject: [PATCH 056/116] mtk: wifi: mt76: mt7996: add kite part number support
5
6CR-Id: WCNCR00274293
7Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
8Change-Id: Ib06648398f18b47c324e18b476a57444d929608f
9---
10 mt7996/eeprom.c | 35 +++++++++++++++++++++++------------
11 1 file changed, 23 insertions(+), 12 deletions(-)
12
13diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c
14index 9987bdab2..51455d877 100644
15--- a/mt7996/eeprom.c
16+++ b/mt7996/eeprom.c
17@@ -316,26 +316,39 @@ out:
18 return ret;
19 }
20
21-static int mt7996_eeprom_parse_efuse_hw_cap(struct mt7996_dev *dev)
22+static int mt7996_eeprom_parse_efuse_hw_cap(struct mt7996_phy *phy,
23+ u8 *path, u8 *rx_path, u8 *nss)
24 {
25 #define MODE_HE_ONLY BIT(0)
26+#define STREAM_MASK GENMASK(2, 0)
27+#define STREAM_OFFSET 1
28+#define TX_PATH_OFFSET 10
29+#define RX_PATH_OFFSET 19
30 #define WTBL_SIZE_GROUP GENMASK(31, 28)
31+#define GET_STREAM_CAP(offs) ({ \
32+ typeof(offs) _offs = (offs); \
33+ ((cap & (STREAM_MASK << _offs)) >> _offs); \
34+})
35+ struct mt7996_dev *dev = phy->dev;
36 u32 cap = 0;
37 int ret;
38+ u8 band_offs = phy->mt76->band_idx * hweight8(STREAM_MASK);
39
40 ret = mt7996_mcu_get_chip_config(dev, &cap);
41 if (ret)
42 return ret;
43
44- cap = 0x4b249248; /* internal hardcode */
45+ dev->has_eht = true;
46 if (cap) {
47 dev->has_eht = !(cap & MODE_HE_ONLY);
48 dev->wtbl_size_group = u32_get_bits(cap, WTBL_SIZE_GROUP);
49+ *nss = min_t(u8, *nss, GET_STREAM_CAP(STREAM_OFFSET + band_offs));
50+ *path = min_t(u8, *path, GET_STREAM_CAP(TX_PATH_OFFSET + band_offs));
51+ *rx_path = min_t(u8, *rx_path, GET_STREAM_CAP(RX_PATH_OFFSET + band_offs));
52 }
53
54- if (dev->wtbl_size_group < 2 || dev->wtbl_size_group > 4 ||
55- is_mt7992(&dev->mt76))
56- dev->wtbl_size_group = 2; /* set default */
57+ if (dev->wtbl_size_group < 2 || dev->wtbl_size_group > 4)
58+ dev->wtbl_size_group = is_mt7996(&dev->mt76) ? 4 : 2; /* set default */
59
60 return 0;
61 }
62@@ -379,13 +392,15 @@ static int mt7996_eeprom_parse_band_config(struct mt7996_phy *phy)
63
64 int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy)
65 {
66+ struct mt76_phy *mphy = phy->mt76;
67 u8 path, rx_path, nss, band_idx = phy->mt76->band_idx;
68 u8 *eeprom = dev->mt76.eeprom.data;
69- struct mt76_phy *mphy = phy->mt76;
70- int max_path = 5, max_nss = 4;
71- int ret;
72+ int ret, max_path = 5, max_nss = 4;
73
74 mt7996_parse_eeprom_stream(eeprom, band_idx, &path, &rx_path, &nss);
75+ ret = mt7996_eeprom_parse_efuse_hw_cap(phy, &path, &rx_path, &nss);
76+ if (ret)
77+ return ret;
78
79 if (!path || path > max_path)
80 path = max_path;
81@@ -405,10 +420,6 @@ int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy)
82 dev->chainshift[band_idx + 1] = dev->chainshift[band_idx] +
83 hweight16(mphy->chainmask);
84
85- ret = mt7996_eeprom_parse_efuse_hw_cap(dev);
86- if (ret)
87- return ret;
88-
89 return mt7996_eeprom_parse_band_config(phy);
90 }
91
92--
932.39.2
94