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developerbd9fa1e2023-10-16 11:04:00 +08001From 81ddde34a61e2a320cf1af73cc91e0465e92cad8 Mon Sep 17 00:00:00 2001
developere2cfb522022-12-08 18:09:45 +08002From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
developerc9333e12023-04-06 18:07:42 +08003Date: Thu, 30 Mar 2023 15:12:37 +0800
developerbd9fa1e2023-10-16 11:04:00 +08004Subject: [PATCH 1023/1040] wifi: mt76: mt7915: add E3 re-bonding for low yield
developerda18a742023-04-06 13:44:00 +08005 rate issue
developere2cfb522022-12-08 18:09:45 +08006
7Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
8---
developerc9333e12023-04-06 18:07:42 +08009 mt7915/eeprom.c | 28 ++++++++++++++++++++++++++++
10 mt7915/mt7915.h | 1 +
11 2 files changed, 29 insertions(+)
developere2cfb522022-12-08 18:09:45 +080012
13diff --git a/mt7915/eeprom.c b/mt7915/eeprom.c
developerbd9fa1e2023-10-16 11:04:00 +080014index fd08d42..3b44a9d 100644
developere2cfb522022-12-08 18:09:45 +080015--- a/mt7915/eeprom.c
16+++ b/mt7915/eeprom.c
developer7af0f762023-05-22 15:16:16 +080017@@ -244,6 +244,32 @@ void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
developere2cfb522022-12-08 18:09:45 +080018 dev->chainshift = hweight8(dev->mphy.chainmask);
19 }
20
21+void mt7915_eeprom_rebonding(struct mt7915_dev *dev)
22+{
23+#define MT7976_ADIE_MASK BIT(1)
24+#define MT7986_ADIE1_EFFUSE_OFFSET 0x1000
25+#define MT7986_ADIE1_MT7976C_OFFSET 0x270
26+#define MT7986_ADIE1_E3_OFFSET 0x271
developerc9333e12023-04-06 18:07:42 +080027+ u32 adie_offset, offset, sku = mt7915_check_adie(dev, true);
28+ u8 read_buf[MT7915_EEPROM_BLOCK_SIZE], *eeprom = dev->mt76.eeprom.data;
29+
developere2cfb522022-12-08 18:09:45 +080030+
31+ if (!(sku & MT7976_ADIE_MASK))
32+ return;
33+
34+ adie_offset = (sku == MT7976_DUAL_ADIE) ? MT7986_ADIE1_EFFUSE_OFFSET : 0;
35+
36+ /* 7976 A-Die, To identify MT7976C */
developerc9333e12023-04-06 18:07:42 +080037+ offset = MT7986_ADIE1_MT7976C_OFFSET + adie_offset;
38+ mt7915_mcu_get_eeprom(dev, offset, read_buf);
39+ eeprom[MT7986_ADIE1_MT7976C_OFFSET] = read_buf[offset % MT7915_EEPROM_BLOCK_SIZE];
developere2cfb522022-12-08 18:09:45 +080040+
41+ /* E3 re-binding */
developerc9333e12023-04-06 18:07:42 +080042+ offset = MT7986_ADIE1_E3_OFFSET + adie_offset;
43+ mt7915_mcu_get_eeprom(dev, offset, read_buf);
44+ eeprom[MT7986_ADIE1_E3_OFFSET] = read_buf[offset % MT7915_EEPROM_BLOCK_SIZE];
developere2cfb522022-12-08 18:09:45 +080045+}
46+
47 int mt7915_eeprom_init(struct mt7915_dev *dev)
48 {
49 int ret;
developer7af0f762023-05-22 15:16:16 +080050@@ -280,6 +306,8 @@ int mt7915_eeprom_init(struct mt7915_dev *dev)
developere2cfb522022-12-08 18:09:45 +080051 return ret;
52 }
53
54+ mt7915_eeprom_rebonding(dev);
55+
56 ret = mt7915_eeprom_load_precal(dev);
57 if (ret)
58 return ret;
developere2cfb522022-12-08 18:09:45 +080059diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developerbd9fa1e2023-10-16 11:04:00 +080060index febe070..a3d7b4b 100644
developere2cfb522022-12-08 18:09:45 +080061--- a/mt7915/mt7915.h
62+++ b/mt7915/mt7915.h
developerbd9fa1e2023-10-16 11:04:00 +080063@@ -506,6 +506,7 @@ u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
developere2cfb522022-12-08 18:09:45 +080064
65 int mt7915_register_device(struct mt7915_dev *dev);
66 void mt7915_unregister_device(struct mt7915_dev *dev);
67+void mt7915_eeprom_rebonding(struct mt7915_dev *dev);
68 int mt7915_eeprom_init(struct mt7915_dev *dev);
69 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
70 struct mt7915_phy *phy);
developere2cfb522022-12-08 18:09:45 +080071--
developerbd9fa1e2023-10-16 11:04:00 +0800722.18.0
developere2cfb522022-12-08 18:09:45 +080073