developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 1 | From 3273e4f5ee8a6b68c6f2f22ec6f0aa32423e2f4c Mon Sep 17 00:00:00 2001 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 2 | From: Howard Hsu <howard-yh.hsu@mediatek.com> |
| 3 | Date: Fri, 24 Jun 2022 11:15:45 +0800 |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 4 | Subject: [PATCH 1015/1051] wifi: mt76: mt7915: add vendor subcmd EDCCA ctrl |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 5 | enable/threshold/compensation |
| 6 | |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 7 | --- |
| 8 | mt76_connac_mcu.h | 1 + |
| 9 | mt7915/main.c | 3 ++ |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 10 | mt7915/mcu.c | 72 +++++++++++++++++++++++++ |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 11 | mt7915/mcu.h | 21 ++++++++ |
| 12 | mt7915/mt7915.h | 3 +- |
developer | aa5b1b2 | 2022-12-13 17:05:25 +0800 | [diff] [blame] | 13 | mt7915/vendor.c | 132 ++++++++++++++++++++++++++++++++++++++++++++++ |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 14 | mt7915/vendor.h | 33 ++++++++++++ |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 15 | 7 files changed, 264 insertions(+), 1 deletion(-) |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 16 | |
| 17 | diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 18 | index 9ac1c46..012f9be 100644 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 19 | --- a/mt76_connac_mcu.h |
| 20 | +++ b/mt76_connac_mcu.h |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 21 | @@ -1252,6 +1252,7 @@ enum { |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 22 | MCU_EXT_CMD_RX_STAT_USER_CTRL = 0xb3, |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 23 | MCU_EXT_CMD_SET_QOS_MAP = 0xb4, |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 24 | MCU_EXT_CMD_CERT_CFG = 0xb7, |
| 25 | + MCU_EXT_CMD_EDCCA = 0xba, |
| 26 | MCU_EXT_CMD_CSI_CTRL = 0xc2, |
| 27 | MCU_EXT_CMD_IPI_HIST_SCAN = 0xc5, |
| 28 | }; |
| 29 | diff --git a/mt7915/main.c b/mt7915/main.c |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 30 | index a5e33dc..f927c5a 100644 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 31 | --- a/mt7915/main.c |
| 32 | +++ b/mt7915/main.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 33 | @@ -479,6 +479,9 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed) |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 34 | mutex_unlock(&dev->mt76.mutex); |
| 35 | } |
| 36 | #endif |
| 37 | + ret = mt7915_mcu_set_edcca(phy, EDCCA_CTRL_SET_EN, NULL, 0); |
| 38 | + if (ret) |
| 39 | + return ret; |
| 40 | ieee80211_stop_queues(hw); |
| 41 | ret = mt7915_set_channel(phy); |
| 42 | if (ret) |
| 43 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 44 | index 751e413..badc831 100644 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 45 | --- a/mt7915/mcu.c |
| 46 | +++ b/mt7915/mcu.c |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 47 | @@ -5038,6 +5038,78 @@ int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool w |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 48 | return 0; |
| 49 | } |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 50 | |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 51 | +int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation) |
| 52 | +{ |
| 53 | + static const u8 ch_band[] = { |
| 54 | + [NL80211_BAND_2GHZ] = 0, |
| 55 | + [NL80211_BAND_5GHZ] = 1, |
| 56 | + [NL80211_BAND_6GHZ] = 2, |
| 57 | + }; |
| 58 | + struct mt7915_dev *dev = phy->dev; |
| 59 | + struct cfg80211_chan_def *chandef = &phy->mt76->chandef; |
| 60 | + struct { |
| 61 | + u8 band_idx; |
| 62 | + u8 cmd_idx; |
| 63 | + u8 setting[3]; |
| 64 | + bool record_in_fw; |
| 65 | + u8 region; |
| 66 | + s8 thres_compensation; |
| 67 | + } __packed req = { |
developer | aa5b1b2 | 2022-12-13 17:05:25 +0800 | [diff] [blame] | 68 | + .band_idx = phy->mt76->band_idx, |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 69 | + .cmd_idx = mode, |
| 70 | + .record_in_fw = false, |
| 71 | + .thres_compensation = compensation, |
| 72 | + }; |
| 73 | + |
| 74 | + if (ch_band[chandef->chan->band] == 2 && dev->mt76.region == NL80211_DFS_FCC) |
| 75 | + req.region = dev->mt76.region; |
| 76 | + |
| 77 | + if (mode == EDCCA_CTRL_SET_EN) { |
| 78 | + req.setting[0] = (!value)? EDCCA_MODE_AUTO: value[0]; |
| 79 | + } else if (mode == EDCCA_CTRL_SET_THERS) { |
| 80 | + req.setting[0] = value[0]; |
| 81 | + req.setting[1] = value[1]; |
| 82 | + req.setting[2] = value[2]; |
| 83 | + } else { |
| 84 | + return -EINVAL; |
| 85 | + } |
| 86 | + |
| 87 | + return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCCA), &req, sizeof(req), true); |
| 88 | +} |
| 89 | + |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 90 | +int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value) |
| 91 | +{ |
| 92 | + struct mt7915_dev *dev = phy->dev; |
| 93 | + struct { |
| 94 | + u8 band_idx; |
| 95 | + u8 cmd_idx; |
| 96 | + u8 setting[3]; |
| 97 | + bool record_in_fw; |
| 98 | + u8 region; |
| 99 | + s8 thres_compensation; |
| 100 | + } __packed req = { |
developer | aa5b1b2 | 2022-12-13 17:05:25 +0800 | [diff] [blame] | 101 | + .band_idx = phy->mt76->band_idx, |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 102 | + .cmd_idx = mode, |
| 103 | + .record_in_fw = false, |
| 104 | + }; |
| 105 | + struct sk_buff *skb; |
| 106 | + int ret; |
| 107 | + struct mt7915_mcu_edcca_info *res; |
| 108 | + |
| 109 | + ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(EDCCA), &req, sizeof(req), |
| 110 | + true, &skb); |
| 111 | + if (ret) |
| 112 | + return ret; |
| 113 | + |
| 114 | + res = (struct mt7915_mcu_edcca_info *)skb->data; |
| 115 | + *value++ = res->info[0]; |
| 116 | + *value++ = res->info[1]; |
| 117 | + *value = res->info[2]; |
developer | d8126d1 | 2023-02-17 11:50:45 +0800 | [diff] [blame] | 118 | + dev_kfree_skb(skb); |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 119 | + |
| 120 | + return 0; |
| 121 | +} |
developer | dad89a3 | 2024-04-29 14:17:17 +0800 | [diff] [blame] | 122 | + |
| 123 | int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) |
| 124 | { |
| 125 | #define IP_DSCP_NUM 64 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 126 | diff --git a/mt7915/mcu.h b/mt7915/mcu.h |
developer | dc9eeae | 2024-04-08 14:36:46 +0800 | [diff] [blame] | 127 | index de17c57..1682c11 100644 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 128 | --- a/mt7915/mcu.h |
| 129 | +++ b/mt7915/mcu.h |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 130 | @@ -1128,6 +1128,27 @@ enum { |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 131 | MURU_DL_INIT, |
| 132 | MURU_UL_INIT, |
| 133 | }; |
| 134 | + |
| 135 | +enum { |
| 136 | + EDCCA_CTRL_SET_EN = 0, |
| 137 | + EDCCA_CTRL_SET_THERS, |
| 138 | + EDCCA_CTRL_GET_EN, |
| 139 | + EDCCA_CTRL_GET_THERS, |
| 140 | + EDCCA_CTRL_NUM, |
| 141 | +}; |
| 142 | + |
| 143 | +enum { |
| 144 | + EDCCA_MODE_FORCE_DISABLE, |
| 145 | + EDCCA_MODE_AUTO, |
| 146 | +}; |
| 147 | + |
| 148 | +struct mt7915_mcu_edcca_info { |
| 149 | + u8 cmd_idx; |
| 150 | + u8 band_idx; |
| 151 | + u8 info[3]; |
| 152 | + u8 fginit; |
| 153 | + u8 rsv[2]; |
| 154 | +}; |
| 155 | #endif |
| 156 | |
| 157 | #endif |
| 158 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 159 | index 2c13d3a..ea450ae 100644 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 160 | --- a/mt7915/mt7915.h |
| 161 | +++ b/mt7915/mt7915.h |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 162 | @@ -773,7 +773,8 @@ void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb); |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 163 | int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, |
| 164 | struct ieee80211_sta *sta); |
| 165 | #endif |
| 166 | - |
| 167 | +int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation); |
| 168 | +int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value); |
| 169 | int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp); |
| 170 | int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp); |
| 171 | |
| 172 | diff --git a/mt7915/vendor.c b/mt7915/vendor.c |
developer | dc9eeae | 2024-04-08 14:36:46 +0800 | [diff] [blame] | 173 | index 757aecb..3a58684 100644 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 174 | --- a/mt7915/vendor.c |
| 175 | +++ b/mt7915/vendor.c |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 176 | @@ -63,6 +63,24 @@ phy_capa_dump_policy[NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP] = { |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 177 | [MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_STA] = { .type = NLA_U16 }, |
| 178 | }; |
| 179 | |
| 180 | +static const struct nla_policy |
| 181 | +edcca_ctrl_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL] = { |
| 182 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_MODE] = { .type = NLA_U8 }, |
| 183 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] = { .type = NLA_U8 }, |
| 184 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL] = { .type = NLA_U8 }, |
| 185 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL] = { .type = NLA_U8 }, |
| 186 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL] = { .type = NLA_U8 }, |
| 187 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE] = { .type = NLA_S8 }, |
| 188 | +}; |
| 189 | + |
| 190 | +static const struct nla_policy |
| 191 | +edcca_dump_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP] = { |
| 192 | + [MTK_VENDOR_ATTR_EDCCA_DUMP_MODE] = { .type = NLA_U8 }, |
| 193 | + [MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL] = { .type = NLA_U8 }, |
| 194 | + [MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL] = { .type = NLA_U8 }, |
| 195 | + [MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL] = { .type = NLA_U8 }, |
| 196 | +}; |
| 197 | + |
| 198 | struct csi_null_tone { |
| 199 | u8 start; |
| 200 | u8 end; |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 201 | @@ -1036,6 +1054,108 @@ mt7915_vendor_phy_capa_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 202 | return len; |
| 203 | } |
| 204 | |
| 205 | +static int mt7915_vendor_edcca_ctrl(struct wiphy *wiphy, |
| 206 | + struct wireless_dev *wdev, |
| 207 | + const void *data, |
| 208 | + int data_len) |
| 209 | +{ |
| 210 | + struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); |
| 211 | + struct mt7915_phy *phy = mt7915_hw_phy(hw); |
| 212 | + struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL]; |
| 213 | + int err; |
| 214 | + u8 edcca_mode; |
| 215 | + s8 edcca_compensation; |
| 216 | + u8 edcca_value[EDCCA_THRES_NUM] = {0}; |
| 217 | + |
| 218 | + err = nla_parse(tb, MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, data, data_len, |
| 219 | + edcca_ctrl_policy, NULL); |
| 220 | + if (err) |
| 221 | + return err; |
| 222 | + |
| 223 | + if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]) |
| 224 | + return -EINVAL; |
| 225 | + |
| 226 | + edcca_mode = nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]); |
| 227 | + if (edcca_mode == EDCCA_CTRL_SET_EN) { |
| 228 | + if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] || |
| 229 | + !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE]) { |
| 230 | + return -EINVAL; |
| 231 | + } |
| 232 | + edcca_value[0] = |
| 233 | + nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL]); |
| 234 | + edcca_compensation = |
| 235 | + nla_get_s8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE]); |
| 236 | + |
| 237 | + err = mt7915_mcu_set_edcca(phy, edcca_mode, edcca_value, |
| 238 | + edcca_compensation); |
| 239 | + if (err) |
| 240 | + return err; |
| 241 | + } else if (edcca_mode == EDCCA_CTRL_SET_THERS) { |
| 242 | + if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] || |
| 243 | + !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL] || |
| 244 | + !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL]) { |
| 245 | + return -EINVAL; |
| 246 | + } |
| 247 | + edcca_value[0] = |
| 248 | + nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL]); |
| 249 | + edcca_value[1] = |
| 250 | + nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL]); |
| 251 | + edcca_value[2] = |
| 252 | + nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL]); |
| 253 | + err = mt7915_mcu_set_edcca(phy, edcca_mode, edcca_value, |
| 254 | + edcca_compensation); |
| 255 | + if (err) |
| 256 | + return err; |
| 257 | + } else { |
| 258 | + return -EINVAL; |
| 259 | + } |
| 260 | + |
| 261 | + return 0; |
| 262 | +} |
| 263 | + |
| 264 | +static int |
| 265 | +mt7915_vendor_edcca_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, |
| 266 | + struct sk_buff *skb, const void *data, int data_len, |
| 267 | + unsigned long *storage) |
| 268 | +{ |
| 269 | + struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); |
| 270 | + struct mt7915_phy *phy = mt7915_hw_phy(hw); |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 271 | + struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL]; |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 272 | + int len = EDCCA_THRES_NUM; |
| 273 | + int err; |
| 274 | + u8 edcca_mode; |
| 275 | + s8 value[EDCCA_THRES_NUM]; |
| 276 | + |
| 277 | + if (*storage == 1) |
| 278 | + return -ENOENT; |
| 279 | + *storage = 1; |
| 280 | + |
| 281 | + err = nla_parse(tb, MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, data, data_len, |
| 282 | + edcca_ctrl_policy, NULL); |
| 283 | + if (err) |
| 284 | + return err; |
| 285 | + |
| 286 | + if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]) |
| 287 | + return -EINVAL; |
| 288 | + |
| 289 | + edcca_mode = nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]); |
| 290 | + if (edcca_mode == EDCCA_CTRL_GET_EN || edcca_mode == EDCCA_CTRL_GET_THERS) { |
| 291 | + err = mt7915_mcu_get_edcca(phy, edcca_mode, value); |
| 292 | + } else { |
| 293 | + return -EINVAL; |
| 294 | + } |
| 295 | + |
| 296 | + if (err) |
| 297 | + return err; |
| 298 | + |
| 299 | + if (nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL, value[0]) || |
| 300 | + nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL, value[1]) || |
| 301 | + nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL, value[2])) |
| 302 | + return -ENOMEM; |
| 303 | + |
| 304 | + return len; |
| 305 | +} |
| 306 | + |
| 307 | static const struct wiphy_vendor_command mt7915_vendor_commands[] = { |
| 308 | { |
| 309 | .info = { |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 310 | @@ -1104,6 +1224,18 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 311 | .dumpit = mt7915_vendor_phy_capa_ctrl_dump, |
| 312 | .policy = phy_capa_ctrl_policy, |
| 313 | .maxattr = MTK_VENDOR_ATTR_PHY_CAPA_CTRL_MAX, |
| 314 | + }, |
| 315 | + { |
| 316 | + .info = { |
| 317 | + .vendor_id = MTK_NL80211_VENDOR_ID, |
| 318 | + .subcmd = MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL, |
| 319 | + }, |
| 320 | + .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | |
| 321 | + WIPHY_VENDOR_CMD_NEED_RUNNING, |
| 322 | + .doit = mt7915_vendor_edcca_ctrl, |
| 323 | + .dumpit = mt7915_vendor_edcca_ctrl_dump, |
| 324 | + .policy = edcca_ctrl_policy, |
| 325 | + .maxattr = MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, |
| 326 | } |
| 327 | }; |
| 328 | |
| 329 | diff --git a/mt7915/vendor.h b/mt7915/vendor.h |
developer | dc9eeae | 2024-04-08 14:36:46 +0800 | [diff] [blame] | 330 | index 34dd7d0..284994a 100644 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 331 | --- a/mt7915/vendor.h |
| 332 | +++ b/mt7915/vendor.h |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 333 | @@ -3,6 +3,7 @@ |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 334 | #define __MT7915_VENDOR_H |
| 335 | |
| 336 | #define MTK_NL80211_VENDOR_ID 0x0ce7 |
| 337 | +#define EDCCA_THRES_NUM 3 |
| 338 | |
| 339 | enum mtk_nl80211_vendor_subcmds { |
| 340 | MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL = 0xae, |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 341 | @@ -11,6 +12,38 @@ enum mtk_nl80211_vendor_subcmds { |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 342 | MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4, |
developer | 2c78ce7 | 2023-02-24 11:26:12 +0800 | [diff] [blame] | 343 | MTK_NL80211_VENDOR_SUBCMD_MU_CTRL = 0xc5, |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 344 | MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL = 0xc6, |
| 345 | + MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7, |
| 346 | +}; |
| 347 | + |
| 348 | + |
| 349 | +enum mtk_vendor_attr_edcca_ctrl { |
| 350 | + MTK_VENDOR_ATTR_EDCCA_THRESHOLD_INVALID = 0, |
| 351 | + |
| 352 | + MTK_VENDOR_ATTR_EDCCA_CTRL_MODE, |
| 353 | + MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL, |
| 354 | + MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL, |
| 355 | + MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL, |
| 356 | + MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL, |
| 357 | + MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE, |
| 358 | + |
| 359 | + /* keep last */ |
| 360 | + NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL, |
| 361 | + MTK_VENDOR_ATTR_EDCCA_CTRL_MAX = |
| 362 | + NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL - 1 |
| 363 | +}; |
| 364 | + |
| 365 | +enum mtk_vendor_attr_edcca_dump { |
| 366 | + MTK_VENDOR_ATTR_EDCCA_DUMP_UNSPEC = 0, |
| 367 | + |
| 368 | + MTK_VENDOR_ATTR_EDCCA_DUMP_MODE, |
| 369 | + MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL, |
| 370 | + MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL, |
| 371 | + MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL, |
| 372 | + |
| 373 | + /* keep last */ |
| 374 | + NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP, |
| 375 | + MTK_VENDOR_ATTR_EDCCA_DUMP_MAX = |
| 376 | + NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP - 1 |
| 377 | }; |
| 378 | |
| 379 | enum mtk_capi_control_changed { |
| 380 | -- |
developer | bd9fa1e | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 381 | 2.18.0 |
developer | e2cfb52 | 2022-12-08 18:09:45 +0800 | [diff] [blame] | 382 | |