blob: 94728926d3814c249c8d619ef78b73c4dd9f4c43 [file] [log] [blame]
developerd8126d12023-02-17 11:50:45 +08001From 9f4ef5f8637f597acf5fc876d40f9159e051e512 Mon Sep 17 00:00:00 2001
developere2cfb522022-12-08 18:09:45 +08002From: Howard Hsu <howard-yh.hsu@mediatek.com>
3Date: Fri, 24 Jun 2022 11:15:45 +0800
developerd8126d12023-02-17 11:50:45 +08004Subject: [PATCH] mt76: mt7915: add vendor subcmd EDCCA ctrl
developere2cfb522022-12-08 18:09:45 +08005 enable/threshold/compensation
6
7Change-Id: I06a3f94d5e444be894200e2b6588d76ed38d09d0
8---
9 mt76_connac_mcu.h | 1 +
10 mt7915/main.c | 3 ++
developerd8126d12023-02-17 11:50:45 +080011 mt7915/mcu.c | 73 +++++++++++++++++++++++++
developere2cfb522022-12-08 18:09:45 +080012 mt7915/mcu.h | 21 ++++++++
13 mt7915/mt7915.h | 3 +-
developeraa5b1b22022-12-13 17:05:25 +080014 mt7915/vendor.c | 132 ++++++++++++++++++++++++++++++++++++++++++++++
developere2cfb522022-12-08 18:09:45 +080015 mt7915/vendor.h | 33 ++++++++++++
developerd8126d12023-02-17 11:50:45 +080016 7 files changed, 265 insertions(+), 1 deletion(-)
developere2cfb522022-12-08 18:09:45 +080017
18diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h
developer60a3d662023-02-07 15:24:34 +080019index 5cef308a..65863a0d 100644
developere2cfb522022-12-08 18:09:45 +080020--- a/mt76_connac_mcu.h
21+++ b/mt76_connac_mcu.h
developer60a3d662023-02-07 15:24:34 +080022@@ -1205,6 +1205,7 @@ enum {
developere2cfb522022-12-08 18:09:45 +080023 MCU_EXT_CMD_SMESH_CTRL = 0xae,
24 MCU_EXT_CMD_RX_STAT_USER_CTRL = 0xb3,
25 MCU_EXT_CMD_CERT_CFG = 0xb7,
26+ MCU_EXT_CMD_EDCCA = 0xba,
27 MCU_EXT_CMD_CSI_CTRL = 0xc2,
28 MCU_EXT_CMD_IPI_HIST_SCAN = 0xc5,
29 };
30diff --git a/mt7915/main.c b/mt7915/main.c
developerd8126d12023-02-17 11:50:45 +080031index d1135d9f..0d01d880 100644
developere2cfb522022-12-08 18:09:45 +080032--- a/mt7915/main.c
33+++ b/mt7915/main.c
developerc5ce7502022-12-19 11:33:22 +080034@@ -479,6 +479,9 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed)
developere2cfb522022-12-08 18:09:45 +080035 mutex_unlock(&dev->mt76.mutex);
36 }
37 #endif
38+ ret = mt7915_mcu_set_edcca(phy, EDCCA_CTRL_SET_EN, NULL, 0);
39+ if (ret)
40+ return ret;
41 ieee80211_stop_queues(hw);
42 ret = mt7915_set_channel(phy);
43 if (ret)
44diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developerd8126d12023-02-17 11:50:45 +080045index 185b6495..85bb60c9 100644
developere2cfb522022-12-08 18:09:45 +080046--- a/mt7915/mcu.c
47+++ b/mt7915/mcu.c
developerd8126d12023-02-17 11:50:45 +080048@@ -4623,3 +4623,76 @@ int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool w
developere2cfb522022-12-08 18:09:45 +080049
50 return 0;
51 }
52+
53+int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation)
54+{
55+ static const u8 ch_band[] = {
56+ [NL80211_BAND_2GHZ] = 0,
57+ [NL80211_BAND_5GHZ] = 1,
58+ [NL80211_BAND_6GHZ] = 2,
59+ };
60+ struct mt7915_dev *dev = phy->dev;
61+ struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
62+ struct {
63+ u8 band_idx;
64+ u8 cmd_idx;
65+ u8 setting[3];
66+ bool record_in_fw;
67+ u8 region;
68+ s8 thres_compensation;
69+ } __packed req = {
developeraa5b1b22022-12-13 17:05:25 +080070+ .band_idx = phy->mt76->band_idx,
developere2cfb522022-12-08 18:09:45 +080071+ .cmd_idx = mode,
72+ .record_in_fw = false,
73+ .thres_compensation = compensation,
74+ };
75+
76+ if (ch_band[chandef->chan->band] == 2 && dev->mt76.region == NL80211_DFS_FCC)
77+ req.region = dev->mt76.region;
78+
79+ if (mode == EDCCA_CTRL_SET_EN) {
80+ req.setting[0] = (!value)? EDCCA_MODE_AUTO: value[0];
81+ } else if (mode == EDCCA_CTRL_SET_THERS) {
82+ req.setting[0] = value[0];
83+ req.setting[1] = value[1];
84+ req.setting[2] = value[2];
85+ } else {
86+ return -EINVAL;
87+ }
88+
89+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCCA), &req, sizeof(req), true);
90+}
91+
92+
93+int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value)
94+{
95+ struct mt7915_dev *dev = phy->dev;
96+ struct {
97+ u8 band_idx;
98+ u8 cmd_idx;
99+ u8 setting[3];
100+ bool record_in_fw;
101+ u8 region;
102+ s8 thres_compensation;
103+ } __packed req = {
developeraa5b1b22022-12-13 17:05:25 +0800104+ .band_idx = phy->mt76->band_idx,
developere2cfb522022-12-08 18:09:45 +0800105+ .cmd_idx = mode,
106+ .record_in_fw = false,
107+ };
108+ struct sk_buff *skb;
109+ int ret;
110+ struct mt7915_mcu_edcca_info *res;
111+
112+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(EDCCA), &req, sizeof(req),
113+ true, &skb);
114+ if (ret)
115+ return ret;
116+
117+ res = (struct mt7915_mcu_edcca_info *)skb->data;
118+ *value++ = res->info[0];
119+ *value++ = res->info[1];
120+ *value = res->info[2];
developerd8126d12023-02-17 11:50:45 +0800121+ dev_kfree_skb(skb);
developere2cfb522022-12-08 18:09:45 +0800122+
123+ return 0;
124+}
125diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developer60a3d662023-02-07 15:24:34 +0800126index 5c5c92fc..c87fe8e8 100644
developere2cfb522022-12-08 18:09:45 +0800127--- a/mt7915/mcu.h
128+++ b/mt7915/mcu.h
developer60a3d662023-02-07 15:24:34 +0800129@@ -1058,6 +1058,27 @@ enum {
developere2cfb522022-12-08 18:09:45 +0800130 MURU_DL_INIT,
131 MURU_UL_INIT,
132 };
133+
134+enum {
135+ EDCCA_CTRL_SET_EN = 0,
136+ EDCCA_CTRL_SET_THERS,
137+ EDCCA_CTRL_GET_EN,
138+ EDCCA_CTRL_GET_THERS,
139+ EDCCA_CTRL_NUM,
140+};
141+
142+enum {
143+ EDCCA_MODE_FORCE_DISABLE,
144+ EDCCA_MODE_AUTO,
145+};
146+
147+struct mt7915_mcu_edcca_info {
148+ u8 cmd_idx;
149+ u8 band_idx;
150+ u8 info[3];
151+ u8 fginit;
152+ u8 rsv[2];
153+};
154 #endif
155
156 #endif
157diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developerd8126d12023-02-17 11:50:45 +0800158index f6b7241d..582887d4 100644
developere2cfb522022-12-08 18:09:45 +0800159--- a/mt7915/mt7915.h
160+++ b/mt7915/mt7915.h
developerd8126d12023-02-17 11:50:45 +0800161@@ -763,7 +763,8 @@ void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb);
developere2cfb522022-12-08 18:09:45 +0800162 int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy,
163 struct ieee80211_sta *sta);
164 #endif
165-
166+int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation);
167+int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value);
168 int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp);
169 int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp);
170
171diff --git a/mt7915/vendor.c b/mt7915/vendor.c
developerd8126d12023-02-17 11:50:45 +0800172index 526eb6b2..f712d67c 100644
developere2cfb522022-12-08 18:09:45 +0800173--- a/mt7915/vendor.c
174+++ b/mt7915/vendor.c
175@@ -62,6 +62,24 @@ phy_capa_dump_policy[NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP] = {
176 [MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_STA] = { .type = NLA_U16 },
177 };
178
179+static const struct nla_policy
180+edcca_ctrl_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL] = {
181+ [MTK_VENDOR_ATTR_EDCCA_CTRL_MODE] = { .type = NLA_U8 },
182+ [MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] = { .type = NLA_U8 },
183+ [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL] = { .type = NLA_U8 },
184+ [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL] = { .type = NLA_U8 },
185+ [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL] = { .type = NLA_U8 },
186+ [MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE] = { .type = NLA_S8 },
187+};
188+
189+static const struct nla_policy
190+edcca_dump_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP] = {
191+ [MTK_VENDOR_ATTR_EDCCA_DUMP_MODE] = { .type = NLA_U8 },
192+ [MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL] = { .type = NLA_U8 },
193+ [MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL] = { .type = NLA_U8 },
194+ [MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL] = { .type = NLA_U8 },
195+};
196+
197 struct csi_null_tone {
198 u8 start;
199 u8 end;
developeraa5b1b22022-12-13 17:05:25 +0800200@@ -1015,6 +1033,108 @@ mt7915_vendor_phy_capa_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev,
developere2cfb522022-12-08 18:09:45 +0800201 return len;
202 }
203
204+static int mt7915_vendor_edcca_ctrl(struct wiphy *wiphy,
205+ struct wireless_dev *wdev,
206+ const void *data,
207+ int data_len)
208+{
209+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
210+ struct mt7915_phy *phy = mt7915_hw_phy(hw);
211+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL];
212+ int err;
213+ u8 edcca_mode;
214+ s8 edcca_compensation;
215+ u8 edcca_value[EDCCA_THRES_NUM] = {0};
216+
217+ err = nla_parse(tb, MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, data, data_len,
218+ edcca_ctrl_policy, NULL);
219+ if (err)
220+ return err;
221+
222+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE])
223+ return -EINVAL;
224+
225+ edcca_mode = nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]);
226+ if (edcca_mode == EDCCA_CTRL_SET_EN) {
227+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] ||
228+ !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE]) {
229+ return -EINVAL;
230+ }
231+ edcca_value[0] =
232+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL]);
233+ edcca_compensation =
234+ nla_get_s8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE]);
235+
236+ err = mt7915_mcu_set_edcca(phy, edcca_mode, edcca_value,
237+ edcca_compensation);
238+ if (err)
239+ return err;
240+ } else if (edcca_mode == EDCCA_CTRL_SET_THERS) {
241+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] ||
242+ !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL] ||
243+ !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL]) {
244+ return -EINVAL;
245+ }
246+ edcca_value[0] =
247+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL]);
248+ edcca_value[1] =
249+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL]);
250+ edcca_value[2] =
251+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL]);
252+ err = mt7915_mcu_set_edcca(phy, edcca_mode, edcca_value,
253+ edcca_compensation);
254+ if (err)
255+ return err;
256+ } else {
257+ return -EINVAL;
258+ }
259+
260+ return 0;
261+}
262+
263+static int
264+mt7915_vendor_edcca_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev,
265+ struct sk_buff *skb, const void *data, int data_len,
266+ unsigned long *storage)
267+{
268+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
269+ struct mt7915_phy *phy = mt7915_hw_phy(hw);
developere2cfb522022-12-08 18:09:45 +0800270+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL];
developere2cfb522022-12-08 18:09:45 +0800271+ int len = EDCCA_THRES_NUM;
272+ int err;
273+ u8 edcca_mode;
274+ s8 value[EDCCA_THRES_NUM];
275+
276+ if (*storage == 1)
277+ return -ENOENT;
278+ *storage = 1;
279+
280+ err = nla_parse(tb, MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, data, data_len,
281+ edcca_ctrl_policy, NULL);
282+ if (err)
283+ return err;
284+
285+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE])
286+ return -EINVAL;
287+
288+ edcca_mode = nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]);
289+ if (edcca_mode == EDCCA_CTRL_GET_EN || edcca_mode == EDCCA_CTRL_GET_THERS) {
290+ err = mt7915_mcu_get_edcca(phy, edcca_mode, value);
291+ } else {
292+ return -EINVAL;
293+ }
294+
295+ if (err)
296+ return err;
297+
298+ if (nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL, value[0]) ||
299+ nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL, value[1]) ||
300+ nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL, value[2]))
301+ return -ENOMEM;
302+
303+ return len;
304+}
305+
306 static const struct wiphy_vendor_command mt7915_vendor_commands[] = {
307 {
308 .info = {
developeraa5b1b22022-12-13 17:05:25 +0800309@@ -1083,6 +1203,18 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = {
developere2cfb522022-12-08 18:09:45 +0800310 .dumpit = mt7915_vendor_phy_capa_ctrl_dump,
311 .policy = phy_capa_ctrl_policy,
312 .maxattr = MTK_VENDOR_ATTR_PHY_CAPA_CTRL_MAX,
313+ },
314+ {
315+ .info = {
316+ .vendor_id = MTK_NL80211_VENDOR_ID,
317+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL,
318+ },
319+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV |
320+ WIPHY_VENDOR_CMD_NEED_RUNNING,
321+ .doit = mt7915_vendor_edcca_ctrl,
322+ .dumpit = mt7915_vendor_edcca_ctrl_dump,
323+ .policy = edcca_ctrl_policy,
324+ .maxattr = MTK_VENDOR_ATTR_EDCCA_CTRL_MAX,
325 }
326 };
327
328diff --git a/mt7915/vendor.h b/mt7915/vendor.h
developer60a3d662023-02-07 15:24:34 +0800329index 719b851f..72319717 100644
developere2cfb522022-12-08 18:09:45 +0800330--- a/mt7915/vendor.h
331+++ b/mt7915/vendor.h
332@@ -2,6 +2,7 @@
333 #define __MT7915_VENDOR_H
334
335 #define MTK_NL80211_VENDOR_ID 0x0ce7
336+#define EDCCA_THRES_NUM 3
337
338 enum mtk_nl80211_vendor_subcmds {
339 MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL = 0xae,
340@@ -10,6 +11,38 @@ enum mtk_nl80211_vendor_subcmds {
341 MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4,
342 MTK_NL80211_VENDOR_SUBCMD_HEMU_CTRL = 0xc5,
343 MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL = 0xc6,
344+ MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7,
345+};
346+
347+
348+enum mtk_vendor_attr_edcca_ctrl {
349+ MTK_VENDOR_ATTR_EDCCA_THRESHOLD_INVALID = 0,
350+
351+ MTK_VENDOR_ATTR_EDCCA_CTRL_MODE,
352+ MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL,
353+ MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL,
354+ MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL,
355+ MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL,
356+ MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE,
357+
358+ /* keep last */
359+ NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL,
360+ MTK_VENDOR_ATTR_EDCCA_CTRL_MAX =
361+ NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL - 1
362+};
363+
364+enum mtk_vendor_attr_edcca_dump {
365+ MTK_VENDOR_ATTR_EDCCA_DUMP_UNSPEC = 0,
366+
367+ MTK_VENDOR_ATTR_EDCCA_DUMP_MODE,
368+ MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL,
369+ MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL,
370+ MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL,
371+
372+ /* keep last */
373+ NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP,
374+ MTK_VENDOR_ATTR_EDCCA_DUMP_MAX =
375+ NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP - 1
376 };
377
378 enum mtk_capi_control_changed {
379--
developer60a3d662023-02-07 15:24:34 +08003802.18.0
developere2cfb522022-12-08 18:09:45 +0800381