blob: 98b83ee63e12dcafe2339cbc5c1678effbaf04ab [file] [log] [blame]
developer05f3b2b2024-08-19 19:17:34 +08001From 0a01643db7a700b8d78b3a1b33944bcf0fb4185d Mon Sep 17 00:00:00 2001
developer66e89bc2024-04-23 14:50:01 +08002From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
3Date: Tue, 5 Dec 2023 16:48:33 +0800
developer05f3b2b2024-08-19 19:17:34 +08004Subject: [PATCH 057/199] mtk: mt76: mt7996: add Eagle 2adie TBTC (BE14000)
developer66e89bc2024-04-23 14:50:01 +08005 support
6
7Add fwdl/default eeprom load support for Eagle 2 adie TBTC
8
developer66e89bc2024-04-23 14:50:01 +08009Add Eagle 2adie TBTC efuse merge
10Add Eagle 2adie TBTC group prek size
11
developer66e89bc2024-04-23 14:50:01 +080012Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
13---
developer05f3b2b2024-08-19 19:17:34 +080014 mt7996/eeprom.c | 11 +++++++++--
developer66e89bc2024-04-23 14:50:01 +080015 mt7996/eeprom.h | 12 ++++++++++++
developer05f3b2b2024-08-19 19:17:34 +080016 mt7996/init.c | 5 +++++
developer66e89bc2024-04-23 14:50:01 +080017 mt7996/mcu.c | 5 +++++
developer05f3b2b2024-08-19 19:17:34 +080018 mt7996/mt7996.h | 9 +++++++++
developer66e89bc2024-04-23 14:50:01 +080019 mt7996/regs.h | 1 +
developer05f3b2b2024-08-19 19:17:34 +080020 6 files changed, 41 insertions(+), 2 deletions(-)
developer66e89bc2024-04-23 14:50:01 +080021
22diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c
developer05f3b2b2024-08-19 19:17:34 +080023index 8cdd6d96..fb4d031f 100644
developer66e89bc2024-04-23 14:50:01 +080024--- a/mt7996/eeprom.c
25+++ b/mt7996/eeprom.c
developer05f3b2b2024-08-19 19:17:34 +080026@@ -158,6 +158,11 @@ const char *mt7996_eeprom_name(struct mt7996_dev *dev)
developer66e89bc2024-04-23 14:50:01 +080027 case 0x7990:
28 if (dev->chip_sku == MT7996_SKU_404)
29 return MT7996_EEPROM_DEFAULT_404;
developer05f3b2b2024-08-19 19:17:34 +080030+ else if (dev->chip_sku == MT7996_SKU_233 &&
31+ dev->fem_type == MT7996_FEM_INT)
32+ return MT7996_EEPROM_DEFAULT_233_INT;
developer66e89bc2024-04-23 14:50:01 +080033+ else if (dev->chip_sku == MT7996_SKU_233)
34+ return MT7996_EEPROM_DEFAULT_233;
35
36 if (dev->fem_type == MT7996_FEM_INT)
37 return MT7996_EEPROM_DEFAULT_INT;
developer05f3b2b2024-08-19 19:17:34 +080038@@ -450,6 +455,8 @@ static void mt7996_eeprom_init_precal(struct mt7996_dev *dev)
developer66e89bc2024-04-23 14:50:01 +080039 switch (mt76_chip(&dev->mt76)) {
40 case 0x7990:
41 dev->prek.rev = mt7996_prek_rev;
42+ if (dev->chip_sku == MT7996_SKU_233)
43+ dev->prek.rev = mt7996_prek_rev_233;
44 /* 5g & 6g bw 80 dpd channel list is not used */
45 dev->prek.dpd_ch_num[DPD_CH_NUM_BW320_6G] = ARRAY_SIZE(dpd_6g_ch_list_bw320);
46 break;
developer05f3b2b2024-08-19 19:17:34 +080047@@ -553,7 +560,7 @@ static int mt7996_apply_cal_free_data(struct mt7996_dev *dev)
developer66e89bc2024-04-23 14:50:01 +080048 case 0x7990:
49 adie_base = adie_base_7996;
50 /* adie 0 */
51- if (dev->fem_type == MT7996_FEM_INT)
52+ if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_SKU_233)
53 adie_id = ADIE_7975;
54 else
55 adie_id = ADIE_7976;
developer05f3b2b2024-08-19 19:17:34 +080056@@ -561,7 +568,7 @@ static int mt7996_apply_cal_free_data(struct mt7996_dev *dev)
developer66e89bc2024-04-23 14:50:01 +080057 eep_offs[0] = eep_offs_list[adie_id];
58
59 /* adie 1 */
60- if (dev->chip_sku != MT7996_SKU_404) {
61+ if (dev->chip_sku == MT7996_SKU_444) {
62 adie_offs[1] = adie_offs_list[ADIE_7977];
63 eep_offs[1] = eep_offs_list[ADIE_7977];
64 }
65diff --git a/mt7996/eeprom.h b/mt7996/eeprom.h
developer05f3b2b2024-08-19 19:17:34 +080066index fa9c31e7..43c9783c 100644
developer66e89bc2024-04-23 14:50:01 +080067--- a/mt7996/eeprom.h
68+++ b/mt7996/eeprom.h
69@@ -70,6 +70,18 @@ static const u32 mt7996_prek_rev[] = {
70 [DPD_OTFG0_SIZE] = 2 * MT_EE_CAL_UNIT,
71 };
72
73+static const u32 mt7996_prek_rev_233[] = {
74+ [GROUP_SIZE_2G] = 4 * MT_EE_CAL_UNIT,
75+ [GROUP_SIZE_5G] = 44 * MT_EE_CAL_UNIT,
76+ [GROUP_SIZE_6G] = 100 * MT_EE_CAL_UNIT,
77+ [ADCDCOC_SIZE_2G] = 4 * 4,
78+ [ADCDCOC_SIZE_5G] = 4 * 4,
79+ [ADCDCOC_SIZE_6G] = 4 * 5,
80+ [DPD_LEGACY_SIZE] = 4 * MT_EE_CAL_UNIT,
81+ [DPD_MEM_SIZE] = 13 * MT_EE_CAL_UNIT,
82+ [DPD_OTFG0_SIZE] = 2 * MT_EE_CAL_UNIT,
83+};
84+
85 /* kite 2/5g config */
86 static const u32 mt7992_prek_rev[] = {
87 [GROUP_SIZE_2G] = 4 * MT_EE_CAL_UNIT,
88diff --git a/mt7996/init.c b/mt7996/init.c
developer05f3b2b2024-08-19 19:17:34 +080089index 0201d9fc..342f15fb 100644
developer66e89bc2024-04-23 14:50:01 +080090--- a/mt7996/init.c
91+++ b/mt7996/init.c
developer05f3b2b2024-08-19 19:17:34 +080092@@ -918,6 +918,11 @@ int mt7996_get_chip_sku(struct mt7996_dev *dev)
developer66e89bc2024-04-23 14:50:01 +080093
94 switch (mt76_chip(&dev->mt76)) {
95 case 0x7990:
96+ if (FIELD_GET(MT_PAD_GPIO_2ADIE_TBTC, val)) {
97+ dev->chip_sku = MT7996_SKU_233;
developer05f3b2b2024-08-19 19:17:34 +080098+ break;
developer66e89bc2024-04-23 14:50:01 +080099+ }
100+
101 adie_comb = FIELD_GET(MT_PAD_GPIO_ADIE_COMB, val);
102 if (adie_comb <= 1)
103 dev->chip_sku = MT7996_SKU_444;
104diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800105index 1c98d179..9bef1274 100644
developer66e89bc2024-04-23 14:50:01 +0800106--- a/mt7996/mcu.c
107+++ b/mt7996/mcu.c
108@@ -23,6 +23,11 @@
109 _fw = MT7992_##name; \
110 break; \
111 case 0x7990: \
112+ if ((_dev)->chip_sku == MT7996_SKU_233) \
113+ _fw = MT7996_##name##_233; \
114+ else \
115+ _fw = MT7996_##name; \
116+ break; \
117 default: \
118 _fw = MT7996_##name; \
119 break; \
120diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h
developer05f3b2b2024-08-19 19:17:34 +0800121index 34886128..294818b4 100644
developer66e89bc2024-04-23 14:50:01 +0800122--- a/mt7996/mt7996.h
123+++ b/mt7996/mt7996.h
124@@ -35,6 +35,12 @@
125 #define MT7996_FIRMWARE_WM_TM "mediatek/mt7996/mt7996_wm_tm.bin"
126 #define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin"
127
128+#define MT7996_FIRMWARE_WA_233 "mediatek/mt7996/mt7996_wa_233.bin"
129+#define MT7996_FIRMWARE_WM_233 "mediatek/mt7996/mt7996_wm_233.bin"
130+#define MT7996_FIRMWARE_DSP_233 MT7996_FIRMWARE_DSP
131+#define MT7996_FIRMWARE_WM_TM_233 "mediatek/mt7996/mt7996_wm_tm_233.bin"
132+#define MT7996_ROM_PATCH_233 "mediatek/mt7996/mt7996_rom_patch_233.bin"
133+
134 #define MT7992_FIRMWARE_WA "mediatek/mt7996/mt7992_wa.bin"
135 #define MT7992_FIRMWARE_WM "mediatek/mt7996/mt7992_wm.bin"
136 #define MT7992_FIRMWARE_DSP "mediatek/mt7996/mt7992_dsp.bin"
developer05f3b2b2024-08-19 19:17:34 +0800137@@ -55,6 +61,8 @@
developer66e89bc2024-04-23 14:50:01 +0800138
139 #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin"
140 #define MT7996_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7996_eeprom_2i5i6i.bin"
141+#define MT7996_EEPROM_DEFAULT_233 "mediatek/mt7996/mt7996_eeprom_233.bin"
developer05f3b2b2024-08-19 19:17:34 +0800142+#define MT7996_EEPROM_DEFAULT_233_INT "mediatek/mt7996/mt7996_eeprom_233_2i5i6i.bin"
developer66e89bc2024-04-23 14:50:01 +0800143 #define MT7996_EEPROM_DEFAULT_404 "mediatek/mt7996/mt7996_eeprom_dual_404.bin"
developer05f3b2b2024-08-19 19:17:34 +0800144 #define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom_2e5e.bin"
145 #define MT7992_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7992_eeprom_2i5i.bin"
146@@ -122,6 +130,7 @@ enum mt7996_fem_type {
developer66e89bc2024-04-23 14:50:01 +0800147 enum mt7996_sku_type {
148 MT7996_SKU_404,
149 MT7996_SKU_444,
150+ MT7996_SKU_233,
151 };
152
153 enum mt7992_sku_type {
154diff --git a/mt7996/regs.h b/mt7996/regs.h
developer05f3b2b2024-08-19 19:17:34 +0800155index 263737c5..91159c63 100644
developer66e89bc2024-04-23 14:50:01 +0800156--- a/mt7996/regs.h
157+++ b/mt7996/regs.h
158@@ -666,6 +666,7 @@ enum offs_rev {
159
160 #define MT_PAD_GPIO 0x700056f0
161 #define MT_PAD_GPIO_ADIE_COMB GENMASK(16, 15)
162+#define MT_PAD_GPIO_2ADIE_TBTC BIT(19)
163 #define MT_PAD_GPIO_ADIE_COMB_7992 GENMASK(17, 16)
164 #define MT_PAD_GPIO_ADIE_NUM_7992 BIT(15)
165
166--
developer9237f442024-06-14 17:13:04 +08001672.18.0
developer66e89bc2024-04-23 14:50:01 +0800168