blob: 0071ccc9806e7e16c5839cb9f916316520012f7c [file] [log] [blame]
developer1f55fcf2024-10-17 14:52:33 +08001From 60bad0ddca997fdc6e0a235ded2def0fdb720b10 Mon Sep 17 00:00:00 2001
developer05f3b2b2024-08-19 19:17:34 +08002From: Peter Chiu <chui-hao.chiu@mediatek.com>
3Date: Thu, 16 May 2024 18:04:28 +0800
developer1f55fcf2024-10-17 14:52:33 +08004Subject: [PATCH 124/193] mtk: mt76: mt7996: move internal debugfs knob to
developer05f3b2b2024-08-19 19:17:34 +08005 per-band folder
6
developerd0c89452024-10-11 16:53:27 +08007Change-Id: I03efc222cd57035aa089babbc94c70e807494763
developer05f3b2b2024-08-19 19:17:34 +08008Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
9---
10 mt7996/debugfs.c | 5 +-
11 mt7996/mt7996.h | 3 +-
12 mt7996/mtk_debugfs.c | 117 ++++++++++++++-----------------------------
13 3 files changed, 44 insertions(+), 81 deletions(-)
14
15diff --git a/mt7996/debugfs.c b/mt7996/debugfs.c
developer1f55fcf2024-10-17 14:52:33 +080016index d2b38ef..9a62dfd 100644
developer05f3b2b2024-08-19 19:17:34 +080017--- a/mt7996/debugfs.c
18+++ b/mt7996/debugfs.c
19@@ -1105,6 +1105,9 @@ int mt7996_init_band_debugfs(struct mt7996_phy *phy)
20 mt7996_rdd_monitor);
21 }
22
23+#ifdef CONFIG_MTK_DEBUG
24+ mt7996_mtk_init_band_debugfs(phy, dir);
25+#endif
26 return 0;
27 }
28
29@@ -1146,7 +1149,7 @@ int mt7996_init_dev_debugfs(struct mt7996_phy *phy)
30
31 #ifdef CONFIG_MTK_DEBUG
32 debugfs_create_u16("wlan_idx", 0600, dir, &dev->wlan_idx);
33- mt7996_mtk_init_debugfs(phy, dir);
34+ mt7996_mtk_init_dev_debugfs(dev, dir);
35 #endif
36
37 return 0;
38diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h
developer1f55fcf2024-10-17 14:52:33 +080039index ef41bee..21be14d 100644
developer05f3b2b2024-08-19 19:17:34 +080040--- a/mt7996/mt7996.h
41+++ b/mt7996/mt7996.h
developerd0c89452024-10-11 16:53:27 +080042@@ -1290,7 +1290,8 @@ enum edcca_bw_id {
developer05f3b2b2024-08-19 19:17:34 +080043 };
44
45 #ifdef CONFIG_MTK_DEBUG
46-int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir);
47+void mt7996_mtk_init_dev_debugfs(struct mt7996_dev *dev, struct dentry *dir);
48+void mt7996_mtk_init_band_debugfs(struct mt7996_phy *phy, struct dentry *dir);
49 int mt7996_mcu_muru_dbg_info(struct mt7996_dev *dev, u16 item, u8 val);
50 int mt7996_mcu_set_sr_enable(struct mt7996_phy *phy, u8 action, u64 val, bool set);
51 void mt7996_mcu_rx_sr_event(struct mt7996_dev *dev, struct sk_buff *skb);
52diff --git a/mt7996/mtk_debugfs.c b/mt7996/mtk_debugfs.c
developer1f55fcf2024-10-17 14:52:33 +080053index 0cf4819..06fa83b 100644
developer05f3b2b2024-08-19 19:17:34 +080054--- a/mt7996/mtk_debugfs.c
55+++ b/mt7996/mtk_debugfs.c
56@@ -14,13 +14,14 @@
57 #ifdef CONFIG_MTK_DEBUG
58
59 /* AGG INFO */
60-static int
61-mt7996_agginfo_read_per_band(struct seq_file *s, int band_idx)
62+static int mt7996_agginfo_show(struct seq_file *s, void *data)
63 {
64- struct mt7996_dev *dev = dev_get_drvdata(s->private);
65+ struct mt7996_phy *phy = s->private;
66+ struct mt7996_dev *dev = phy->dev;
67 u64 total_burst, total_ampdu, ampdu_cnt[16];
68 u32 value, idx, row_idx, col_idx, start_range, agg_rang_sel[16], burst_cnt[16], band_offset = 0;
69 u8 partial_str[16] = {}, full_str[64] = {};
70+ u8 band_idx = phy->mt76->band_idx;
71
72 switch (band_idx) {
73 case 0:
74@@ -204,24 +205,7 @@ mt7996_agginfo_read_per_band(struct seq_file *s, int band_idx)
75
76 return 0;
77 }
78-
79-static int mt7996_agginfo_read_band0(struct seq_file *s, void *data)
80-{
81- mt7996_agginfo_read_per_band(s, MT_BAND0);
82- return 0;
83-}
84-
85-static int mt7996_agginfo_read_band1(struct seq_file *s, void *data)
86-{
87- mt7996_agginfo_read_per_band(s, MT_BAND1);
88- return 0;
89-}
90-
91-static int mt7996_agginfo_read_band2(struct seq_file *s, void *data)
92-{
93- mt7996_agginfo_read_per_band(s, MT_BAND2);
94- return 0;
95-}
96+DEFINE_SHOW_ATTRIBUTE(mt7996_agginfo);
97
98 /* AMSDU INFO */
99 static int mt7996_amsdu_result_read(struct seq_file *s, void *data)
developerd0c89452024-10-11 16:53:27 +0800100@@ -703,10 +687,12 @@ static int mt7996_trinfo_read(struct seq_file *s, void *data)
developer05f3b2b2024-08-19 19:17:34 +0800101 }
102
103 /* MIB INFO */
104-static int mt7996_mibinfo_read_per_band(struct seq_file *s, int band_idx)
105+static int mt7996_mibinfo_show(struct seq_file *s, void *data)
106 {
107 #define BSS_NUM 4
108- struct mt7996_dev *dev = dev_get_drvdata(s->private);
109+ struct mt7996_phy *phy = s->private;
110+ struct mt7996_dev *dev = phy->dev;
111+ u8 band_idx = phy->mt76->band_idx;
112 u8 bss_nums = BSS_NUM;
113 u32 idx;
114 u32 mac_val, band_offset = 0, band_offset_umib = 0;
developerd0c89452024-10-11 16:53:27 +0800115@@ -919,24 +905,7 @@ static int mt7996_mibinfo_read_per_band(struct seq_file *s, int band_idx)
developer05f3b2b2024-08-19 19:17:34 +0800116
117 return 0;
118 }
119-
120-static int mt7996_mibinfo_band0(struct seq_file *s, void *data)
121-{
122- mt7996_mibinfo_read_per_band(s, MT_BAND0);
123- return 0;
124-}
125-
126-static int mt7996_mibinfo_band1(struct seq_file *s, void *data)
127-{
128- mt7996_mibinfo_read_per_band(s, MT_BAND1);
129- return 0;
130-}
131-
132-static int mt7996_mibinfo_band2(struct seq_file *s, void *data)
133-{
134- mt7996_mibinfo_read_per_band(s, MT_BAND2);
135- return 0;
136-}
137+DEFINE_SHOW_ATTRIBUTE(mt7996_mibinfo);
138
139 /* WTBL INFO */
140 static int
developerd0c89452024-10-11 16:53:27 +0800141@@ -3035,9 +3004,9 @@ static const struct file_operations fops_muru_fixed_group_rate = {
developer05f3b2b2024-08-19 19:17:34 +0800142
143 static int mt7996_muru_prot_thr_set(void *data, u64 val)
144 {
145- struct mt7996_phy *phy = data;
146+ struct mt7996_dev *dev = data;
147
148- return mt7996_mcu_muru_set_prot_frame_thr(phy->dev, (u32)val);
149+ return mt7996_mcu_muru_set_prot_frame_thr(dev, (u32)val);
150 }
151
152 DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_prot_thr, NULL,
developerd0c89452024-10-11 16:53:27 +0800153@@ -4218,9 +4187,32 @@ mt7996_drr_info(struct seq_file *s, void *data)
developer05f3b2b2024-08-19 19:17:34 +0800154 return 0;
155 }
156
157-int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
158+void mt7996_mtk_init_band_debugfs(struct mt7996_phy *phy, struct dentry *dir)
159+{
160+ /* agg */
161+ debugfs_create_file("agginfo", 0400, dir, phy, &mt7996_agginfo_fops);
162+ debugfs_create_file("mibinfo", 0400, dir, phy, &mt7996_mibinfo_fops);
163+ debugfs_create_file("txpower_level", 0600, dir, phy, &fops_txpower_level);
164+ debugfs_create_file("txpower_info", 0600, dir, phy, &mt7996_txpower_info_fops);
165+ debugfs_create_file("txpower_sku", 0600, dir, phy, &mt7996_txpower_sku_fops);
166+ debugfs_create_file("txpower_path", 0600, dir, phy, &mt7996_txpower_path_fops);
167+
168+ debugfs_create_file("sr_enable", 0600, dir, phy, &fops_sr_enable);
169+ debugfs_create_file("sr_enhanced_enable", 0600, dir, phy, &fops_sr_enhanced_enable);
170+ debugfs_create_file("sr_stats", 0400, dir, phy, &mt7996_sr_stats_fops);
171+ debugfs_create_file("sr_scene_cond", 0400, dir, phy, &mt7996_sr_scene_cond_fops);
172+
173+ debugfs_create_file("bf_txsnd_info", 0600, dir, phy, &fops_bf_txsnd_info);
174+ debugfs_create_file("bf_starec_read", 0600, dir, phy, &fops_starec_bf_read);
175+ debugfs_create_file("bf_fbk_rpt", 0600, dir, phy, &fops_bf_fbk_rpt);
176+ debugfs_create_file("pfmu_tag_read", 0600, dir, phy, &fops_bf_pfmu_tag_read);
177+
178+ debugfs_create_file("thermal_enable", 0600, dir, phy, &fops_thermal_enable);
179+ debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable);
180+}
181+
182+void mt7996_mtk_init_dev_debugfs(struct mt7996_dev *dev, struct dentry *dir)
183 {
184- struct mt7996_dev *dev = phy->dev;
185 u32 device_id = (dev->mt76.rev) >> 16;
186 int i = 0;
187 static const struct mt7996_dbg_reg_desc dbg_reg_s[] = {
developerd0c89452024-10-11 16:53:27 +0800188@@ -4245,13 +4237,6 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
developer05f3b2b2024-08-19 19:17:34 +0800189 WTBL_LMAC_DW9 = WTBL_LMAC_DW9_7992;
190 }
191
192- /* agg */
193- debugfs_create_devm_seqfile(dev->mt76.dev, "agg_info0", dir,
194- mt7996_agginfo_read_band0);
195- debugfs_create_devm_seqfile(dev->mt76.dev, "agg_info1", dir,
196- mt7996_agginfo_read_band1);
197- debugfs_create_devm_seqfile(dev->mt76.dev, "agg_info2", dir,
198- mt7996_agginfo_read_band2);
199 /* amsdu */
200 debugfs_create_devm_seqfile(dev->mt76.dev, "amsdu_info", dir,
201 mt7996_amsdu_result_read);
developerd0c89452024-10-11 16:53:27 +0800202@@ -4269,24 +4254,12 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
developer05f3b2b2024-08-19 19:17:34 +0800203 debugfs_create_devm_seqfile(dev->mt76.dev, "fw_wm_info", dir,
204 mt7996_fw_wm_info_read);
205
206- debugfs_create_devm_seqfile(dev->mt76.dev, "mib_info0", dir,
207- mt7996_mibinfo_band0);
208- debugfs_create_devm_seqfile(dev->mt76.dev, "mib_info1", dir,
209- mt7996_mibinfo_band1);
210- debugfs_create_devm_seqfile(dev->mt76.dev, "mib_info2", dir,
211- mt7996_mibinfo_band2);
212-
213 debugfs_create_devm_seqfile(dev->mt76.dev, "sta_info", dir,
214 mt7996_sta_info);
215
216 debugfs_create_devm_seqfile(dev->mt76.dev, "tr_info", dir,
217 mt7996_trinfo_read);
218
219- debugfs_create_file("txpower_level", 0600, dir, phy, &fops_txpower_level);
220- debugfs_create_file("txpower_info", 0600, dir, phy, &mt7996_txpower_info_fops);
221- debugfs_create_file("txpower_sku", 0600, dir, phy, &mt7996_txpower_sku_fops);
222- debugfs_create_file("txpower_path", 0600, dir, phy, &mt7996_txpower_path_fops);
223-
224 debugfs_create_devm_seqfile(dev->mt76.dev, "eeprom_mode", dir,
225 mt7996_show_eeprom_mode);
226
developerd0c89452024-10-11 16:53:27 +0800227@@ -4299,23 +4272,12 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
developer05f3b2b2024-08-19 19:17:34 +0800228
229 dev->dbg.sku_disable = true; /* For SQC */
230 debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable);
231- debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable);
232-
233- debugfs_create_file("sr_enable", 0600, dir, phy, &fops_sr_enable);
234- debugfs_create_file("sr_enhanced_enable", 0600, dir, phy, &fops_sr_enhanced_enable);
235- debugfs_create_file("sr_stats", 0400, dir, phy, &mt7996_sr_stats_fops);
236- debugfs_create_file("sr_scene_cond", 0400, dir, phy, &mt7996_sr_scene_cond_fops);
237
238+ debugfs_create_file("muru_prot_thr", 0200, dir, dev, &fops_muru_prot_thr);
239 debugfs_create_file("muru_fixed_rate_enable", 0600, dir, dev,
240 &fops_muru_fixed_rate_enable);
241 debugfs_create_file("muru_fixed_group_rate", 0600, dir, dev,
242 &fops_muru_fixed_group_rate);
243- debugfs_create_file("bf_txsnd_info", 0600, dir, phy, &fops_bf_txsnd_info);
244- debugfs_create_file("bf_starec_read", 0600, dir, phy, &fops_starec_bf_read);
245- debugfs_create_file("bf_fbk_rpt", 0600, dir, phy, &fops_bf_fbk_rpt);
246- debugfs_create_file("pfmu_tag_read", 0600, dir, phy, &fops_bf_pfmu_tag_read);
247-
248- debugfs_create_file("muru_prot_thr", 0200, dir, phy, &fops_muru_prot_thr);
249
250 if (dev->has_rro) {
251 debugfs_create_u32("rro_sid", 0600, dir, &dev->dbg.sid);
developerd0c89452024-10-11 16:53:27 +0800252@@ -4325,7 +4287,6 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
developer05f3b2b2024-08-19 19:17:34 +0800253 mt7996_show_rro_mib);
254 }
255
256- debugfs_create_file("thermal_enable", 0600, dir, phy, &fops_thermal_enable);
257 debugfs_create_file("thermal_recal", 0200, dir, dev, &fops_thermal_recal);
258 debugfs_create_file("reset_counter", 0200, dir, dev, &fops_reset_counter);
259
developerd0c89452024-10-11 16:53:27 +0800260@@ -4345,8 +4306,6 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
developer05f3b2b2024-08-19 19:17:34 +0800261 debugfs_create_file("amsdu_para", 0600, dir, dev, &fops_amsdu_para);
262 debugfs_create_devm_seqfile(dev->mt76.dev, "hw_amsdu_info", dir,
263 mt7996_hw_amsdu_info_read);
264-
265- return 0;
266 }
267
268 #endif
269--
developerd0c89452024-10-11 16:53:27 +08002702.45.2
developer05f3b2b2024-08-19 19:17:34 +0800271