blob: 754008700dbae4571d207dc7fd322525cb7ab76c [file] [log] [blame]
developer1f55fcf2024-10-17 14:52:33 +08001From 65574c009356434eb5154104a8f65c944446839b Mon Sep 17 00:00:00 2001
developer05f3b2b2024-08-19 19:17:34 +08002From: Shayne Chen <shayne.chen@mediatek.com>
3Date: Wed, 15 May 2024 17:47:33 +0800
developer1f55fcf2024-10-17 14:52:33 +08004Subject: [PATCH 122/193] mtk: mt76: mt7996: do software link addr translation
developer05f3b2b2024-08-19 19:17:34 +08005 for EAPOL
6
7Previously, we do HW link address translation for EAPOL addr1 and addr2,
8but SW link address translation for EAPOL addr3 due to incompatibility
9between HW converting rules and 802.11 EAPOL frames.
10
11This patch adds support for doing pure SW link address translation for
12EAPOL, to get rid of ambiguity and could also help on debugging EAPOL
13timeout issues.
14
15Note that dma_sync_single_for_cpu/dma_sync_single_for_device is
16necessary to sync the changes of address to DMA.
17
18Assign EAPOL's SA/DA to MLD address.
19
developerd0c89452024-10-11 16:53:27 +080020Change-Id: Ibb63beb37f80075da8c0e1535fde74f9710f92f5
21Change-Id: I307146d0f88ecca0f0ea592b9157b6a7e8009fbb
developer05f3b2b2024-08-19 19:17:34 +080022Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
23Signed-off-by: Michael-CY Lee <michael-cy.lee@mediatek.com>
24Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
25---
26 mt7996/mac.c | 46 +++++++++++++++++++++++++++++++---------------
27 1 file changed, 31 insertions(+), 15 deletions(-)
28
29diff --git a/mt7996/mac.c b/mt7996/mac.c
developer1f55fcf2024-10-17 14:52:33 +080030index 901c70e..02045b8 100644
developer05f3b2b2024-08-19 19:17:34 +080031--- a/mt7996/mac.c
32+++ b/mt7996/mac.c
developerd0c89452024-10-11 16:53:27 +080033@@ -843,7 +843,8 @@ void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi,
developer05f3b2b2024-08-19 19:17:34 +080034 txwi[5] = cpu_to_le32(val);
35
36 val = MT_TXD6_DAS;
37- if ((q_idx >= MT_LMAC_ALTX0 && q_idx <= MT_LMAC_BCN0))
38+ if ((q_idx >= MT_LMAC_ALTX0 && q_idx <= MT_LMAC_BCN0) ||
39+ unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
40 val |= MT_TXD6_DIS_MAT;
41
42 if (is_mt7996(&dev->mt76))
developerd0c89452024-10-11 16:53:27 +080043@@ -951,23 +952,38 @@ int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
developer05f3b2b2024-08-19 19:17:34 +080044 mt7996_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, key,
45 pid, qid, 0);
46
47- /* translate addr3 of EAPOL by driver */
48+ /* Since the rules of HW MLD address translation are not fully compatible
49+ * with 802.11 EAPOL frame, we do the translation by software
50+ */
51 if (unlikely(tx_info->skb->protocol == cpu_to_be16(ETH_P_PAE)) && sta->mlo) {
52- if (ether_addr_equal(vif->addr, hdr->addr3)) {
53- struct ieee80211_bss_conf *conf;
54-
55- conf = rcu_dereference(vif->link_conf[wcid->link_id]);
56- if (unlikely(!conf))
57- return -ENOLINK;
58-
59- memcpy(hdr->addr3, conf->addr, ETH_ALEN);
60- } else if (ether_addr_equal(sta->addr, hdr->addr3)) {
61- struct ieee80211_link_sta *link_sta;
62-
63- link_sta = rcu_dereference(sta->link[wcid->link_id]);
64- memcpy(hdr->addr3, link_sta->addr, ETH_ALEN);
65+ struct ieee80211_bss_conf *conf;
66+ struct ieee80211_link_sta *link_sta;
67+ __le16 fc = hdr->frame_control;
68+
69+ conf = rcu_dereference(vif->link_conf[wcid->link_id]);
70+ link_sta = rcu_dereference(sta->link[wcid->link_id]);
71+ if (!conf || !link_sta)
72+ return -ENOLINK;
73+
74+ dma_sync_single_for_cpu(mdev->dma_dev, tx_info->buf[1].addr,
75+ tx_info->buf[1].len, DMA_TO_DEVICE);
76+
77+ memcpy(hdr->addr1, link_sta->addr, ETH_ALEN);
78+ memcpy(hdr->addr2, conf->addr, ETH_ALEN);
79+
80+ /* EAPOL's SA/DA need to be MLD address in MLO */
81+ if (ieee80211_has_a4(fc)) {
82+ memcpy(hdr->addr3, sta->addr, ETH_ALEN);
83+ memcpy(hdr->addr4, vif->addr, ETH_ALEN);
84+ } else if (ieee80211_has_tods(fc)) {
85+ memcpy(hdr->addr3, sta->addr, ETH_ALEN);
86+ } else if (ieee80211_has_fromds(fc)) {
87+ memcpy(hdr->addr3, vif->addr, ETH_ALEN);
88 }
89
90+ dma_sync_single_for_device(mdev->dma_dev, tx_info->buf[1].addr,
91+ tx_info->buf[1].len, DMA_TO_DEVICE);
92+
93 pr_info("EAPOL: a1=%pM, a2=%pM, a3=%pM\n", hdr->addr1, hdr->addr2, hdr->addr3);
94 }
95
96--
developerd0c89452024-10-11 16:53:27 +0800972.45.2
developer05f3b2b2024-08-19 19:17:34 +080098