blob: 467d98e0932faeaea218d82deecd549994d965b9 [file] [log] [blame]
developer1a173672023-12-21 14:49:33 +08001From 1c87f95ce8be271a28470bf1d2809aed425c6870 Mon Sep 17 00:00:00 2001
developer57c8f1a2022-12-15 14:09:45 +08002From: Sujuan Chen <sujuan.chen@mediatek.com>
3Date: Tue, 13 Dec 2022 17:51:26 +0800
developer1a173672023-12-21 14:49:33 +08004Subject: [PATCH 59/76] wifi: mt76: mt7915: wed: add wds support when wed is
5 enabled
developer57c8f1a2022-12-15 14:09:45 +08006
7Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
8---
9 mt76.h | 6 ++++++
10 mt7915/main.c | 22 ++++++++++++++++++++--
developerbb6ddff2023-03-08 17:22:32 +080011 mt7915/mcu.c | 16 ++++++++++++----
developer57c8f1a2022-12-15 14:09:45 +080012 mt7915/mcu.h | 1 +
13 util.c | 40 +++++++++++++++++++++++++++++++++++++---
14 util.h | 7 ++++++-
developerbb6ddff2023-03-08 17:22:32 +080015 6 files changed, 82 insertions(+), 10 deletions(-)
developer57c8f1a2022-12-15 14:09:45 +080016
17diff --git a/mt76.h b/mt76.h
developer1a173672023-12-21 14:49:33 +080018index c0fdbd6..a54da76 100644
developer57c8f1a2022-12-15 14:09:45 +080019--- a/mt76.h
20+++ b/mt76.h
developer1a173672023-12-21 14:49:33 +080021@@ -78,6 +78,12 @@ enum mt76_wed_type {
22 MT76_WED_RRO_Q_IND,
developer57c8f1a2022-12-15 14:09:45 +080023 };
24
25+enum mt76_wed_state {
26+ MT76_WED_DEFAULT,
27+ MT76_WED_ACTIVE,
28+ MT76_WED_WDS_ACTIVE,
29+};
30+
31 struct mt76_bus_ops {
32 u32 (*rr)(struct mt76_dev *dev, u32 offset);
33 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
34diff --git a/mt7915/main.c b/mt7915/main.c
developer1a173672023-12-21 14:49:33 +080035index 659ae48..bbfb643 100644
developer57c8f1a2022-12-15 14:09:45 +080036--- a/mt7915/main.c
37+++ b/mt7915/main.c
developer1a173672023-12-21 14:49:33 +080038@@ -788,8 +788,15 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
developer57c8f1a2022-12-15 14:09:45 +080039 #endif
40 int ret, idx;
41 u32 addr;
42+ u8 flags = MT76_WED_DEFAULT;
43
44- idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
45+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
46+ !is_mt7915(&dev->mt76)) {
47+ flags = test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags) ?
48+ MT76_WED_WDS_ACTIVE : MT76_WED_ACTIVE;
49+ }
50+
51+ idx = __mt76_wcid_alloc(mdev->wcid_mask, MT7915_WTBL_STA, flags);
52 if (idx < 0)
53 return -ENOSPC;
54
developer1a173672023-12-21 14:49:33 +080055@@ -1276,6 +1283,13 @@ static void mt7915_sta_set_4addr(struct ieee80211_hw *hw,
developer57c8f1a2022-12-15 14:09:45 +080056 else
57 clear_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags);
58
59+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
60+ !is_mt7915(&dev->mt76)) {
61+ mt7915_sta_remove(hw, vif, sta);
62+ mt76_sta_pre_rcu_remove(hw, vif, sta);
63+ mt7915_sta_add(hw, vif, sta);
64+ }
65+
66 mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta);
67 }
68
developer1a173672023-12-21 14:49:33 +080069@@ -1715,8 +1729,12 @@ mt7915_net_fill_forward_path(struct ieee80211_hw *hw,
developer57c8f1a2022-12-15 14:09:45 +080070 path->dev = ctx->dev;
71 path->mtk_wdma.wdma_idx = wed->wdma_idx;
72 path->mtk_wdma.bss = mvif->mt76.idx;
73- path->mtk_wdma.wcid = is_mt7915(&dev->mt76) ? 0xff : 0x3ff;
74 path->mtk_wdma.queue = phy != &dev->phy;
75+ if (test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags) ||
76+ is_mt7915(&dev->mt76))
77+ path->mtk_wdma.wcid = msta->wcid.idx;
78+ else
79+ path->mtk_wdma.wcid = 0x3ff;
80
81 ctx->dev = NULL;
82
83diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developer1a173672023-12-21 14:49:33 +080084index 38679d2..405bdfc 100644
developer57c8f1a2022-12-15 14:09:45 +080085--- a/mt7915/mcu.c
86+++ b/mt7915/mcu.c
developerbd9fa1e2023-10-16 11:04:00 +080087@@ -2397,10 +2397,18 @@ int mt7915_mcu_init_firmware(struct mt7915_dev *dev)
developer57c8f1a2022-12-15 14:09:45 +080088 if (ret)
89 return ret;
90
developerbb6ddff2023-03-08 17:22:32 +080091- if ((mtk_wed_device_active(&dev->mt76.mmio.wed) &&
92- is_mt7915(&dev->mt76)) ||
93- !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))
developer57c8f1a2022-12-15 14:09:45 +080094- mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);
95+ if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
developerbb6ddff2023-03-08 17:22:32 +080096+ if (is_mt7915(&dev->mt76) ||
97+ !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))
developer57c8f1a2022-12-15 14:09:45 +080098+ ret = mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY),
99+ 0, 0, 0);
100+ else
101+ ret = mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
102+ MCU_WA_PARAM_WED_VERSION,
103+ dev->mt76.mmio.wed.rev_id, 0);
104+ if (ret)
105+ return ret;
106+ }
107
108 ret = mt7915_mcu_set_mwds(dev, 1);
109 if (ret)
110diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developer1a173672023-12-21 14:49:33 +0800111index 723f23e..3b169d6 100644
developer57c8f1a2022-12-15 14:09:45 +0800112--- a/mt7915/mcu.h
113+++ b/mt7915/mcu.h
developer7af0f762023-05-22 15:16:16 +0800114@@ -339,6 +339,7 @@ enum {
developer57c8f1a2022-12-15 14:09:45 +0800115 MCU_WA_PARAM_PDMA_RX = 0x04,
116 MCU_WA_PARAM_CPU_UTIL = 0x0b,
117 MCU_WA_PARAM_RED = 0x0e,
118+ MCU_WA_PARAM_WED_VERSION = 0x32,
119 #ifdef MTK_DEBUG
120 MCU_WA_PARAM_RED_SHOW_STA = 0xf,
121 MCU_WA_PARAM_RED_TARGET_DELAY = 0x10,
122diff --git a/util.c b/util.c
developerbd9fa1e2023-10-16 11:04:00 +0800123index fc76c66..61b2d30 100644
developer57c8f1a2022-12-15 14:09:45 +0800124--- a/util.c
125+++ b/util.c
developer60a3d662023-02-07 15:24:34 +0800126@@ -42,9 +42,14 @@ bool ____mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
developer57c8f1a2022-12-15 14:09:45 +0800127 }
developer60a3d662023-02-07 15:24:34 +0800128 EXPORT_SYMBOL_GPL(____mt76_poll_msec);
developer57c8f1a2022-12-15 14:09:45 +0800129
130-int mt76_wcid_alloc(u32 *mask, int size)
131+int __mt76_wcid_alloc(u32 *mask, int size, u8 flag)
132 {
133+#define MT76_WED_WDS_MIN 256
134+#define MT76_WED_WDS_CNT 16
135+
136 int i, idx = 0, cur;
137+ int min = MT76_WED_WDS_MIN;
138+ int max = min + MT76_WED_WDS_CNT;
139
140 for (i = 0; i < DIV_ROUND_UP(size, 32); i++) {
141 idx = ffs(~mask[i]);
142@@ -53,16 +58,45 @@ int mt76_wcid_alloc(u32 *mask, int size)
143
144 idx--;
145 cur = i * 32 + idx;
146- if (cur >= size)
147+
148+ switch (flag) {
149+ case MT76_WED_ACTIVE:
150+ if (cur >= min && cur < max)
151+ continue;
152+
153+ if (cur >= size) {
154+ u32 end = MT76_WED_WDS_CNT - 1;
155+
156+ i = min / 32;
157+ idx = ffs(~mask[i] & GENMASK(end, 0));
158+ if (!idx)
159+ goto error;
160+ idx--;
161+ cur = min + idx;
162+ }
163+
164 break;
165+ case MT76_WED_WDS_ACTIVE:
166+ if (cur < min)
167+ continue;
168+ if (cur >= max)
169+ goto error;
170+
171+ break;
172+ default:
173+ if (cur >= size)
174+ goto error;
175+ break;
176+ }
177
178 mask[i] |= BIT(idx);
179 return cur;
180 }
181
182+error:
183 return -1;
184 }
185-EXPORT_SYMBOL_GPL(mt76_wcid_alloc);
186+EXPORT_SYMBOL_GPL(__mt76_wcid_alloc);
187
188 int mt76_get_min_avg_rssi(struct mt76_dev *dev, bool ext_phy)
189 {
190diff --git a/util.h b/util.h
developerbd9fa1e2023-10-16 11:04:00 +0800191index 260965d..99b7263 100644
developer57c8f1a2022-12-15 14:09:45 +0800192--- a/util.h
193+++ b/util.h
194@@ -27,7 +27,12 @@ enum {
195 #define MT76_INCR(_var, _size) \
196 (_var = (((_var) + 1) % (_size)))
197
198-int mt76_wcid_alloc(u32 *mask, int size);
199+int __mt76_wcid_alloc(u32 *mask, int size, u8 flags);
200+
201+static inline int mt76_wcid_alloc(u32 *mask, int size)
202+{
203+ return __mt76_wcid_alloc(mask, size, 0);
204+}
205
206 static inline void
207 mt76_wcid_mask_set(u32 *mask, int idx)
208--
developerbd9fa1e2023-10-16 11:04:00 +08002092.18.0
developer57c8f1a2022-12-15 14:09:45 +0800210