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developer05f3b2b2024-08-19 19:17:34 +08001From f5504bc5f7c41c0d8f1c944dd34cf22f284ed1c8 Mon Sep 17 00:00:00 2001
developer66e89bc2024-04-23 14:50:01 +08002From: mtk27745 <rex.lu@mediatek.com>
3Date: Fri, 6 Oct 2023 20:59:42 +0800
developer05f3b2b2024-08-19 19:17:34 +08004Subject: [PATCH 074/199] mtk: mt76: mt7996: support backaward compatiable
developer66e89bc2024-04-23 14:50:01 +08005
6revert upstream wed trigger mode to polling mode
7
developer66e89bc2024-04-23 14:50:01 +08008[Description]
9Change the SW token size from 1024 to 15360 according to HW capability.
10
11[Release-log]
12N/A
13
developer66e89bc2024-04-23 14:50:01 +080014Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
developer05f3b2b2024-08-19 19:17:34 +080015Signed-off-by: mtk27745 <rex.lu@mediatek.com>
developer66e89bc2024-04-23 14:50:01 +080016Signed-off-by: Rex Lu <rex.lu@mediatek.com>
17---
18 mt76.h | 2 ++
19 mt7996/mac.c | 3 ++-
20 mt7996/mcu.c | 2 +-
21 mt7996/mmio.c | 12 +++++++-----
22 mt7996/mt7996.h | 1 +
23 mt7996/pci.c | 17 +++++++++--------
24 wed.c | 4 ++--
25 7 files changed, 24 insertions(+), 17 deletions(-)
26
27diff --git a/mt76.h b/mt76.h
developer05f3b2b2024-08-19 19:17:34 +080028index 1236ddb4..e3c209ff 100644
developer66e89bc2024-04-23 14:50:01 +080029--- a/mt76.h
30+++ b/mt76.h
31@@ -53,6 +53,8 @@
32
33 #define MT76_TOKEN_FREE_THR 64
34
35+#define MT76_WED_SW_TOKEN_SIZE 15360
36+
37 #define MT_QFLAG_WED_RING GENMASK(1, 0)
38 #define MT_QFLAG_WED_TYPE GENMASK(4, 2)
39 #define MT_QFLAG_WED BIT(5)
40diff --git a/mt7996/mac.c b/mt7996/mac.c
developer05f3b2b2024-08-19 19:17:34 +080041index be3fea21..1792726c 100644
developer66e89bc2024-04-23 14:50:01 +080042--- a/mt7996/mac.c
43+++ b/mt7996/mac.c
developer05f3b2b2024-08-19 19:17:34 +080044@@ -1774,7 +1774,7 @@ mt7996_mac_restart(struct mt7996_dev *dev)
developer66e89bc2024-04-23 14:50:01 +080045 }
46
47 mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask);
48- mtk_wed_device_start_hwrro(&dev->mt76.mmio.wed, wed_irq_mask, false);
49+ mtk_wed_device_start_hw_rro(&dev->mt76.mmio.wed, wed_irq_mask, false);
50 mt7996_irq_enable(dev, wed_irq_mask);
51 mt7996_irq_disable(dev, 0);
52 }
developer05f3b2b2024-08-19 19:17:34 +080053@@ -2006,6 +2006,7 @@ void mt7996_mac_reset_work(struct work_struct *work)
developer66e89bc2024-04-23 14:50:01 +080054
55 mtk_wed_device_start_hw_rro(&dev->mt76.mmio.wed, wed_irq_mask,
56 true);
57+
58 mt7996_irq_enable(dev, wed_irq_mask);
59 mt7996_irq_disable(dev, 0);
60 }
61diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developer05f3b2b2024-08-19 19:17:34 +080062index 4bcc415f..46611191 100644
developer66e89bc2024-04-23 14:50:01 +080063--- a/mt7996/mcu.c
64+++ b/mt7996/mcu.c
developer05f3b2b2024-08-19 19:17:34 +080065@@ -3257,7 +3257,7 @@ static int mt7996_mcu_wa_red_config(struct mt7996_dev *dev)
developer66e89bc2024-04-23 14:50:01 +080066
67 if (!mtk_wed_device_active(&dev->mt76.mmio.wed))
68 req.token_per_src[RED_TOKEN_SRC_CNT - 1] =
69- cpu_to_le16(MT7996_TOKEN_SIZE - MT7996_HW_TOKEN_SIZE);
70+ cpu_to_le16(MT7996_SW_TOKEN_SIZE);
71
72 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET),
73 &req, sizeof(req), false);
74diff --git a/mt7996/mmio.c b/mt7996/mmio.c
developer05f3b2b2024-08-19 19:17:34 +080075index 0d25c5ff..35573003 100644
developer66e89bc2024-04-23 14:50:01 +080076--- a/mt7996/mmio.c
77+++ b/mt7996/mmio.c
78@@ -14,7 +14,7 @@
79 #include "../trace.h"
80 #include "../dma.h"
81
82-static bool wed_enable;
83+static bool wed_enable = true;
84 module_param(wed_enable, bool, 0644);
85
86 static const struct __base mt7996_reg_base[] = {
87@@ -347,7 +347,7 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr,
88 }
89
90 wed->wlan.wpdma_rx_glo = wed->wlan.phy_base + hif1_ofs + MT_WFDMA0_GLO_CFG;
91- wed->wlan.wpdma_rx = wed->wlan.phy_base + hif1_ofs +
92+ wed->wlan.wpdma_rx[0] = wed->wlan.phy_base + hif1_ofs +
93 MT_RXQ_RING_BASE(MT7996_RXQ_BAND0) +
94 MT7996_RXQ_BAND0 * MT_RING_SIZE;
95
96@@ -362,7 +362,7 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr,
97
98 wed->wlan.wpdma_rx_glo = wed->wlan.phy_base + MT_WFDMA0_GLO_CFG;
99
100- wed->wlan.wpdma_rx = wed->wlan.phy_base +
101+ wed->wlan.wpdma_rx[0] = wed->wlan.phy_base +
102 MT_RXQ_RING_BASE(MT7996_RXQ_BAND0) +
103 MT7996_RXQ_BAND0 * MT_RING_SIZE;
104
105@@ -404,8 +404,8 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr,
106 dev->mt76.rx_token_size = MT7996_TOKEN_SIZE + wed->wlan.rx_npkt;
107 }
108
109- wed->wlan.nbuf = MT7996_HW_TOKEN_SIZE;
110- wed->wlan.token_start = MT7996_TOKEN_SIZE - wed->wlan.nbuf;
111+ wed->wlan.nbuf = MT7996_TOKEN_SIZE;
112+ wed->wlan.token_start = 0;
113
114 wed->wlan.amsdu_max_subframes = 8;
115 wed->wlan.amsdu_max_len = 1536;
116@@ -426,6 +426,8 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr,
117 *irq = wed->irq;
118 dev->mt76.dma_dev = wed->dev;
119
120+ dev->mt76.token_size = MT7996_SW_TOKEN_SIZE;
121+
122 return 1;
123 #else
124 return 0;
125diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h
developer05f3b2b2024-08-19 19:17:34 +0800126index f0288cca..6254604f 100644
developer66e89bc2024-04-23 14:50:01 +0800127--- a/mt7996/mt7996.h
128+++ b/mt7996/mt7996.h
developer05f3b2b2024-08-19 19:17:34 +0800129@@ -74,6 +74,7 @@
developer66e89bc2024-04-23 14:50:01 +0800130 #define MT7996_EEPROM_BLOCK_SIZE 16
131 #define MT7996_TOKEN_SIZE 16384
132 #define MT7996_HW_TOKEN_SIZE 8192
133+#define MT7996_SW_TOKEN_SIZE 15360
134
135 #define MT7996_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
136 #define MT7996_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
137diff --git a/mt7996/pci.c b/mt7996/pci.c
developer05f3b2b2024-08-19 19:17:34 +0800138index 05830c01..4e957771 100644
developer66e89bc2024-04-23 14:50:01 +0800139--- a/mt7996/pci.c
140+++ b/mt7996/pci.c
141@@ -171,7 +171,7 @@ static int mt7996_pci_probe(struct pci_dev *pdev,
142
143 ret = mt7996_mmio_wed_init(dev, hif2_dev, true, &hif2_irq);
144 if (ret < 0)
145- goto free_hif2_wed_irq_vector;
146+ goto free_wed_or_irq_vector;
147
148 if (!ret) {
149 ret = pci_alloc_irq_vectors(hif2_dev, 1, 1,
150@@ -180,14 +180,15 @@ static int mt7996_pci_probe(struct pci_dev *pdev,
151 goto free_hif2;
152
153 dev->hif2->irq = hif2_dev->irq;
154- hif2_irq = dev->hif2->irq;
155+ } else {
156+ dev->hif2->irq = irq;
157 }
158
159- ret = devm_request_irq(mdev->dev, hif2_irq, mt7996_irq_handler,
160- IRQF_SHARED, KBUILD_MODNAME "-hif",
161- dev);
162+ ret = devm_request_irq(mdev->dev, dev->hif2->irq,
163+ mt7996_irq_handler, IRQF_SHARED,
164+ KBUILD_MODNAME "-hif", dev);
165 if (ret)
166- goto free_hif2_wed_irq_vector;
167+ goto free_hif2_irq_vector;
168
169 mt76_wr(dev, MT_INT1_MASK_CSR, 0);
170 /* master switch of PCIe tnterrupt enable */
171@@ -202,8 +203,8 @@ static int mt7996_pci_probe(struct pci_dev *pdev,
172
173 free_hif2_irq:
174 if (dev->hif2)
175- devm_free_irq(mdev->dev, hif2_irq, dev);
176-free_hif2_wed_irq_vector:
177+ devm_free_irq(mdev->dev, dev->hif2->irq, dev);
178+free_hif2_irq_vector:
179 if (dev->hif2) {
180 if (mtk_wed_device_active(&dev->mt76.mmio.wed_hif2))
181 mtk_wed_device_detach(&dev->mt76.mmio.wed_hif2);
182diff --git a/wed.c b/wed.c
developer05f3b2b2024-08-19 19:17:34 +0800183index 61a6badf..634c95cf 100644
developer66e89bc2024-04-23 14:50:01 +0800184--- a/wed.c
185+++ b/wed.c
186@@ -120,7 +120,7 @@ int mt76_wed_offload_enable(struct mtk_wed_device *wed)
187 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed);
188
189 spin_lock_bh(&dev->token_lock);
190- dev->token_size = wed->wlan.token_start;
191+ dev->token_size = MT76_WED_SW_TOKEN_SIZE;
192 spin_unlock_bh(&dev->token_lock);
193
194 return !wait_event_timeout(dev->tx_wait, !dev->wed_token_count, HZ);
195@@ -204,7 +204,7 @@ void mt76_wed_offload_disable(struct mtk_wed_device *wed)
196 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed);
197
198 spin_lock_bh(&dev->token_lock);
199- dev->token_size = dev->drv->token_size;
200+ dev->token_size = MT76_WED_SW_TOKEN_SIZE;
201 spin_unlock_bh(&dev->token_lock);
202 }
203 EXPORT_SYMBOL_GPL(mt76_wed_offload_disable);
204--
developer9237f442024-06-14 17:13:04 +08002052.18.0
developer66e89bc2024-04-23 14:50:01 +0800206