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developer05f3b2b2024-08-19 19:17:34 +08001From 737ee81737fcefd3abbab0bb628fa9db193b1b34 Mon Sep 17 00:00:00 2001
developer66e89bc2024-04-23 14:50:01 +08002From: MeiChia Chiu <meichia.chiu@mediatek.com>
3Date: Mon, 14 Aug 2023 13:36:58 +0800
developer05f3b2b2024-08-19 19:17:34 +08004Subject: [PATCH 049/199] mtk: mt76: mt7996: add cert patch
developer66e89bc2024-04-23 14:50:01 +08005
6This patch includes TGac and TGax
7
8Commit histroy:
9
10Add vendor cmd set ap wireless rts_sigta support
11
developer05f3b2b2024-08-19 19:17:34 +080012In Wi-Fi 7 UCC, there are a command without a specified interface,
13causing the AP to send trigger frames on only one link. When testing
14EMLSR+OFDMA test cases (EHT-4.45.1), this results in the AP sending
15trigger frames on only one link, leading to test failure.
16Therefore, the band_bitmap is corrected to ensure that trigger frames are sent on all links.
17
18The UCC command specifies an interface:
19ap_set_rfeature,NAME,Wi-Fi7APUT,Interface,5G,type,EHT,TriggerType,0,
20Trigger_Variant,HE,PPDUTxType,legacy
21
22The UCC command does not specify an interface:
23ap_set_rfeature,NAME,Wi-Fi7APUT,type,EHT,TriggerType,0,Trigger_Variant,
24EHT,PPDUTxType,legacy
25
26Logan set the band_bitmap to 7 in Wi-Fi 7 regardless of whether the UCC
27command specifies an interface.
28
developer66e89bc2024-04-23 14:50:01 +080029Signed-off-by: ye he <ye.he@mediatek.com>
developer05f3b2b2024-08-19 19:17:34 +080030Signed-off-by: MeiChia Chiu <MeiChia.Chiu@mediatek.com>
developer66e89bc2024-04-23 14:50:01 +080031---
32 mt7996/mac.c | 9 ++
33 mt7996/main.c | 31 ++++++-
34 mt7996/mcu.c | 40 +++++++++
35 mt7996/mcu.h | 6 ++
36 mt7996/mt7996.h | 13 +++
developer05f3b2b2024-08-19 19:17:34 +080037 mt7996/mtk_mcu.c | 206 ++++++++++++++++++++++++++++++++++++++++++
developer66e89bc2024-04-23 14:50:01 +080038 mt7996/mtk_mcu.h | 184 +++++++++++++++++++++++++++++++++++--
39 mt7996/vendor.c | 230 ++++++++++++++++++++++++++++++++++++++++++++++-
40 mt7996/vendor.h | 67 ++++++++++++++
developer05f3b2b2024-08-19 19:17:34 +080041 9 files changed, 779 insertions(+), 7 deletions(-)
developer66e89bc2024-04-23 14:50:01 +080042
43diff --git a/mt7996/mac.c b/mt7996/mac.c
developer05f3b2b2024-08-19 19:17:34 +080044index 63408421..90e8e7b1 100644
developer66e89bc2024-04-23 14:50:01 +080045--- a/mt7996/mac.c
46+++ b/mt7996/mac.c
47@@ -10,6 +10,7 @@
48 #include "../dma.h"
49 #include "mac.h"
50 #include "mcu.h"
51+#include "vendor.h"
52
53 #define to_rssi(field, rcpi) ((FIELD_GET(field, rcpi) - 220) / 2)
54
55@@ -2284,6 +2285,14 @@ void mt7996_mac_update_stats(struct mt7996_phy *phy)
56 }
57 }
58
59+void mt7996_set_wireless_amsdu(struct ieee80211_hw *hw, u8 en)
60+{
61+ if (en)
62+ ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
63+ else
64+ ieee80211_hw_clear(hw, SUPPORTS_AMSDU_IN_AMPDU);
65+}
66+
67 void mt7996_mac_sta_rc_work(struct work_struct *work)
68 {
69 struct mt7996_dev *dev = container_of(work, struct mt7996_dev, rc_work);
70diff --git a/mt7996/main.c b/mt7996/main.c
developer05f3b2b2024-08-19 19:17:34 +080071index f7819a85..39318595 100644
developer66e89bc2024-04-23 14:50:01 +080072--- a/mt7996/main.c
73+++ b/mt7996/main.c
developer05f3b2b2024-08-19 19:17:34 +080074@@ -617,6 +617,7 @@ mt7996_get_rates_table(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
developer66e89bc2024-04-23 14:50:01 +080075 bool beacon, bool mcast)
76 {
77 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
78+ struct mt7996_dev *dev = mt7996_hw_dev(hw);
79 struct mt76_phy *mphy = hw->priv;
80 u16 rate;
81 u8 i, idx;
developer05f3b2b2024-08-19 19:17:34 +080082@@ -626,6 +627,9 @@ mt7996_get_rates_table(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
developer66e89bc2024-04-23 14:50:01 +080083 if (beacon) {
84 struct mt7996_phy *phy = mphy->priv;
85
86+ if (dev->cert_mode && phy->mt76->band_idx == MT_BAND2)
87+ rate = 0x0200;
88+
89 /* odd index for driver, even index for firmware */
90 idx = MT7996_BEACON_RATES_TBL + 2 * phy->mt76->band_idx;
91 if (phy->beacon_rate != rate)
developer05f3b2b2024-08-19 19:17:34 +080092@@ -753,6 +757,10 @@ int mt7996_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
developer66e89bc2024-04-23 14:50:01 +080093 u8 band_idx = mvif->phy->mt76->band_idx;
94 int ret, idx;
95
96+#ifdef CONFIG_MTK_VENDOR
97+ struct mt7996_phy *phy = &dev->phy;
98+#endif
99+
100 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7996_WTBL_STA);
101 if (idx < 0)
102 return -ENOSPC;
developer05f3b2b2024-08-19 19:17:34 +0800103@@ -778,7 +786,28 @@ int mt7996_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
developer66e89bc2024-04-23 14:50:01 +0800104 if (ret)
105 return ret;
106
107- return mt7996_mcu_add_rate_ctrl(dev, vif, sta, false);
108+ ret = mt7996_mcu_add_rate_ctrl(dev, vif, sta, false);
109+ if (ret)
110+ return ret;
111+
112+#ifdef CONFIG_MTK_VENDOR
113+ switch (band_idx) {
114+ case MT_BAND1:
115+ phy = mt7996_phy2(dev);
116+ break;
117+ case MT_BAND2:
118+ phy = mt7996_phy3(dev);
119+ break;
120+ case MT_BAND0:
121+ default:
122+ break;
123+ }
124+
125+ if (phy && phy->muru_onoff & MUMIMO_DL_CERT)
126+ mt7996_mcu_set_mimo(phy);
127+#endif
128+
129+ return 0;
130 }
131
132 void mt7996_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
133diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800134index c47dee02..ae894ac9 100644
developer66e89bc2024-04-23 14:50:01 +0800135--- a/mt7996/mcu.c
136+++ b/mt7996/mcu.c
137@@ -1352,6 +1352,10 @@ mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
138 {
139 struct sta_rec_vht *vht;
140 struct tlv *tlv;
141+#ifdef CONFIG_MTK_VENDOR
142+ struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
143+ struct mt7996_phy *phy = (struct mt7996_phy *)msta->vif->phy;
144+#endif
145
146 /* For 6G band, this tlv is necessary to let hw work normally */
147 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported)
148@@ -1363,6 +1367,9 @@ mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
149 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
150 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
151 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
152+#ifdef CONFIG_MTK_VENDOR
153+ vht->rts_bw_sig = phy->rts_bw_sig;
154+#endif
155 }
156
157 static void
developer05f3b2b2024-08-19 19:17:34 +0800158@@ -4443,6 +4450,27 @@ int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val)
developer66e89bc2024-04-23 14:50:01 +0800159 &req, sizeof(req), true);
160 }
161
162+int mt7996_mcu_set_band_confg(struct mt7996_phy *phy, u16 option, bool enable)
163+{
164+ struct {
165+ u8 band_idx;
166+ u8 _rsv[3];
167+
168+ __le16 tag;
169+ __le16 len;
170+ bool enable;
171+ u8 _rsv2[3];
172+ } __packed req = {
173+ .band_idx = phy->mt76->band_idx,
174+ .tag = cpu_to_le16(option),
175+ .len = cpu_to_le16(sizeof(req) - 4),
176+ .enable = enable,
177+ };
178+
179+ return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
180+ &req, sizeof(req), true);
181+}
182+
183 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable)
184 {
185 struct {
developer05f3b2b2024-08-19 19:17:34 +0800186@@ -5010,6 +5038,18 @@ void mt7996_set_wireless_vif(void *data, u8 *mac, struct ieee80211_vif *vif)
developer66e89bc2024-04-23 14:50:01 +0800187 val = FIELD_GET(RATE_CFG_VAL, *((u32 *)data));
188
189 switch (mode) {
190+ case RATE_PARAM_FIXED_OFDMA:
191+ if (val == 3)
developer05f3b2b2024-08-19 19:17:34 +0800192+ phy->muru_onoff |= OFDMA_DL;
developer66e89bc2024-04-23 14:50:01 +0800193+ else
developer05f3b2b2024-08-19 19:17:34 +0800194+ phy->muru_onoff |= val;
developer66e89bc2024-04-23 14:50:01 +0800195+ break;
196+ case RATE_PARAM_FIXED_MIMO:
197+ if (val == 0)
developer05f3b2b2024-08-19 19:17:34 +0800198+ phy->muru_onoff |= MUMIMO_DL_CERT | MUMIMO_DL;
developer66e89bc2024-04-23 14:50:01 +0800199+ else
developer05f3b2b2024-08-19 19:17:34 +0800200+ phy->muru_onoff |= MUMIMO_UL;
developer66e89bc2024-04-23 14:50:01 +0800201+ break;
202 case RATE_PARAM_AUTO_MU:
203 if (val < 0 || val > 15) {
204 printk("Wrong value! The value is between 0-15.\n");
205diff --git a/mt7996/mcu.h b/mt7996/mcu.h
developer05f3b2b2024-08-19 19:17:34 +0800206index a98b174e..2546354e 100644
developer66e89bc2024-04-23 14:50:01 +0800207--- a/mt7996/mcu.h
208+++ b/mt7996/mcu.h
209@@ -755,6 +755,8 @@ enum {
210 RATE_PARAM_FIXED_GI = 11,
211 RATE_PARAM_AUTO = 20,
212 #ifdef CONFIG_MTK_VENDOR
213+ RATE_PARAM_FIXED_MIMO = 30,
214+ RATE_PARAM_FIXED_OFDMA = 31,
215 RATE_PARAM_AUTO_MU = 32,
216 #endif
217 };
218@@ -767,6 +769,7 @@ enum {
219 #define OFDMA_UL BIT(1)
220 #define MUMIMO_DL BIT(2)
221 #define MUMIMO_UL BIT(3)
222+#define MUMIMO_DL_CERT BIT(4)
223
224 enum {
225 BF_SOUNDING_ON = 1,
226@@ -853,11 +856,14 @@ enum {
227 UNI_BAND_CONFIG_EDCCA_ENABLE = 0x05,
228 UNI_BAND_CONFIG_EDCCA_THRESHOLD = 0x06,
229 UNI_BAND_CONFIG_RTS_THRESHOLD = 0x08,
230+ UNI_BAND_CONFIG_RTS_SIGTA_EN = 0x09,
231+ UNI_BAND_CONFIG_DIS_SECCH_CCA_DET = 0x0a,
232 };
233
234 enum {
235 UNI_WSYS_CONFIG_FW_LOG_CTRL,
236 UNI_WSYS_CONFIG_FW_DBG_CTRL,
237+ UNI_CMD_CERT_CFG = 6,
238 };
239
240 enum {
241diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h
developer05f3b2b2024-08-19 19:17:34 +0800242index 45ce7db7..00d7991b 100644
developer66e89bc2024-04-23 14:50:01 +0800243--- a/mt7996/mt7996.h
244+++ b/mt7996/mt7996.h
245@@ -354,6 +354,7 @@ struct mt7996_phy {
246 } test;
247 #endif
248 #ifdef CONFIG_MTK_VENDOR
249+ u8 rts_bw_sig;
250 spinlock_t amnt_lock;
251 struct mt7996_air_monitor_ctrl amnt_ctrl;
252 #endif
253@@ -482,6 +483,9 @@ struct mt7996_dev {
254 } dbg;
255 const struct mt7996_dbg_reg_desc *dbg_reg;
256 #endif
257+#ifdef CONFIG_MTK_VENDOR
258+ bool cert_mode;
259+#endif
260 };
261
262 enum {
263@@ -679,6 +683,7 @@ void mt7996_tm_rf_test_event(struct mt7996_dev *dev, struct sk_buff *skb);
264 int mt7996_mcu_get_tx_power_info(struct mt7996_phy *phy, u8 category, void *event);
265 int mt7996_mcu_set_scs(struct mt7996_phy *phy, u8 enable);
266 void mt7996_mcu_scs_sta_poll(struct work_struct *work);
267+int mt7996_mcu_set_band_confg(struct mt7996_phy *phy, u16 option, bool enable);
268
269 static inline u8 mt7996_max_interface_num(struct mt7996_dev *dev)
270 {
271@@ -797,6 +802,10 @@ void mt7996_vendor_register(struct mt7996_phy *phy);
272 void mt7996_vendor_amnt_fill_rx(struct mt7996_phy *phy, struct sk_buff *skb);
273 int mt7996_vendor_amnt_sta_remove(struct mt7996_phy *phy,
274 struct ieee80211_sta *sta);
275+void mt7996_set_wireless_amsdu(struct ieee80211_hw *hw, u8 en);
276+void mt7996_mcu_set_mimo(struct mt7996_phy *phy);
277+int mt7996_set_muru_cfg(struct mt7996_phy *phy, u8 action, u8 val);
278+int mt7996_mcu_set_muru_cfg(struct mt7996_phy *phy, void *data);
279 #endif
280
281 int mt7996_mcu_edcca_enable(struct mt7996_phy *phy, bool enable);
282@@ -824,6 +833,10 @@ int mt7996_mcu_set_txbf_snd_info(struct mt7996_phy *phy, void *para);
283 int mt7996_mcu_set_muru_cmd(struct mt7996_dev *dev, u16 action, int val);
284 int mt7996_mcu_muru_set_prot_frame_thr(struct mt7996_dev *dev, u32 val);
285 int mt7996_mcu_set_bypass_smthint(struct mt7996_phy *phy, u8 val);
286+int mt7996_mcu_set_rfeature_trig_type(struct mt7996_phy *phy, u8 enable, u8 trig_type);
287+void mt7996_mcu_set_ppdu_tx_type(struct mt7996_phy *phy, u8 ppdu_type);
288+void mt7996_mcu_set_nusers_ofdma(struct mt7996_phy *phy, u8 type, u8 ofdma_user_cnt);
289+void mt7996_mcu_set_cert(struct mt7996_phy *phy, u8 type);
290 #endif
291
292 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
293diff --git a/mt7996/mtk_mcu.c b/mt7996/mtk_mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800294index 68650623..30da79f4 100644
developer66e89bc2024-04-23 14:50:01 +0800295--- a/mt7996/mtk_mcu.c
296+++ b/mt7996/mtk_mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800297@@ -982,4 +982,210 @@ int mt7996_mcu_set_bypass_smthint(struct mt7996_phy *phy, u8 val)
developer66e89bc2024-04-23 14:50:01 +0800298 true);
299 }
300
301+int mt7996_mcu_set_bsrp_ctrl(struct mt7996_phy *phy, u16 interval,
302+ u16 ru_alloc, u32 trig_type, u8 trig_flow, u8 ext_cmd)
303+{
304+ struct mt7996_dev *dev = phy->dev;
305+ struct {
306+ u8 _rsv[4];
307+
308+ __le16 tag;
309+ __le16 len;
310+
311+ __le16 interval;
312+ __le16 ru_alloc;
313+ __le32 trigger_type;
314+ u8 trigger_flow;
315+ u8 ext_cmd_bsrp;
316+ u8 band_bitmap;
317+ u8 _rsv2;
318+ } __packed req = {
319+ .tag = cpu_to_le16(UNI_CMD_MURU_BSRP_CTRL),
320+ .len = cpu_to_le16(sizeof(req) - 4),
321+ .interval = cpu_to_le16(interval),
322+ .ru_alloc = cpu_to_le16(ru_alloc),
323+ .trigger_type = cpu_to_le32(trig_type),
324+ .trigger_flow = trig_flow,
325+ .ext_cmd_bsrp = ext_cmd,
developer05f3b2b2024-08-19 19:17:34 +0800326+ .band_bitmap = mt7996_band_valid(dev, MT_BAND2) ?
327+ GENMASK(2, 0) : GENMASK(1, 0),
developer66e89bc2024-04-23 14:50:01 +0800328+ };
329+
330+ return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(MURU), &req,
331+ sizeof(req), false);
332+}
333+
334+int mt7996_mcu_set_rfeature_trig_type(struct mt7996_phy *phy, u8 enable, u8 trig_type)
335+{
336+ struct mt7996_dev *dev = phy->dev;
337+ int ret = 0;
338+ char buf[] = "01:00:00:1B";
339+
340+ if (enable) {
341+ ret = mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SET_TRIG_TYPE, trig_type);
342+ if (ret)
343+ return ret;
344+ }
345+
346+ switch (trig_type) {
347+ case CAPI_BASIC:
348+ return mt7996_mcu_set_bsrp_ctrl(phy, 5, 67, 0, 0, enable);
349+ case CAPI_BRP:
350+ return mt7996_mcu_set_txbf_snd_info(phy, buf);
351+ case CAPI_MU_BAR:
352+ return mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SET_MUDL_ACK_POLICY,
353+ MU_DL_ACK_POLICY_MU_BAR);
354+ case CAPI_BSRP:
355+ return mt7996_mcu_set_bsrp_ctrl(phy, 5, 67, 4, 0, enable);
356+ default:
357+ return 0;
358+ }
359+}
360+
361+int mt7996_mcu_set_muru_cfg(struct mt7996_phy *phy, void *data)
362+{
363+ struct mt7996_dev *dev = phy->dev;
364+ struct mt7996_muru *muru;
365+ struct {
366+ u8 _rsv[4];
367+
368+ __le16 tag;
369+ __le16 len;
370+
371+ u8 version;
372+ u8 revision;
373+ u8 _rsv2[2];
374+
375+ struct mt7996_muru muru;
376+ } __packed req = {
377+ .tag = cpu_to_le16(UNI_CMD_MURU_MUNUAL_CONFIG),
378+ .len = cpu_to_le16(sizeof(req) - 4),
379+ .version = UNI_CMD_MURU_VER_EHT,
380+ };
381+
382+ muru = (struct mt7996_muru *) data;
383+ memcpy(&req.muru, muru, sizeof(struct mt7996_muru));
384+
385+ return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(MURU), &req,
386+ sizeof(req), false);
387+}
388+
389+int mt7996_set_muru_cfg(struct mt7996_phy *phy, u8 action, u8 val)
390+{
391+ struct mt7996_muru *muru;
392+ struct mt7996_muru_dl *dl;
393+ struct mt7996_muru_ul *ul;
394+ struct mt7996_muru_comm *comm;
395+ int ret = 0;
396+
397+ muru = kzalloc(sizeof(struct mt7996_muru), GFP_KERNEL);
398+ dl = &muru->dl;
399+ ul = &muru->ul;
400+ comm = &muru->comm;
401+
402+ switch (action) {
403+ case MU_CTRL_DL_USER_CNT:
404+ dl->user_num = val;
405+ comm->ppdu_format = MURU_PPDU_HE_MU;
406+ comm->sch_type = MURU_OFDMA_SCH_TYPE_DL;
407+ muru->cfg_comm = cpu_to_le32(MURU_COMM_SET);
408+ muru->cfg_dl = cpu_to_le32(MURU_FIXED_DL_TOTAL_USER_CNT);
409+ ret = mt7996_mcu_set_muru_cfg(phy, muru);
410+ break;
411+ case MU_CTRL_UL_USER_CNT:
412+ ul->user_num = val;
413+ comm->ppdu_format = MURU_PPDU_HE_TRIG;
414+ comm->sch_type = MURU_OFDMA_SCH_TYPE_UL;
415+ muru->cfg_comm = cpu_to_le32(MURU_COMM_SET);
416+ muru->cfg_ul = cpu_to_le32(MURU_FIXED_UL_TOTAL_USER_CNT);
417+ ret = mt7996_mcu_set_muru_cfg(phy, muru);
418+ break;
419+ default:
420+ break;
421+ }
422+
423+ kfree(muru);
424+ return ret;
425+}
426+
427+void mt7996_mcu_set_ppdu_tx_type(struct mt7996_phy *phy, u8 ppdu_type)
428+{
429+ struct mt7996_dev *dev = phy->dev;
430+ int enable_su;
431+
432+ switch (ppdu_type) {
433+ case CAPI_SU:
434+ enable_su = 1;
435+ mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SUTX_CTRL, enable_su);
436+ mt7996_set_muru_cfg(phy, MU_CTRL_DL_USER_CNT, 0);
437+ break;
438+ case CAPI_MU:
439+ enable_su = 0;
440+ mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SUTX_CTRL, enable_su);
441+ break;
442+ default:
443+ break;
444+ }
445+}
446+
447+void mt7996_mcu_set_nusers_ofdma(struct mt7996_phy *phy, u8 type, u8 user_cnt)
448+{
449+ struct mt7996_dev *dev = phy->dev;
450+ int enable_su = 0;
451+
452+ mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SUTX_CTRL, enable_su);
453+ mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SET_MUDL_ACK_POLICY, MU_DL_ACK_POLICY_SU_BAR);
454+ mt7996_mcu_muru_set_prot_frame_thr(dev, 9999);
455+
456+ mt7996_set_muru_cfg(phy, type, user_cnt);
457+}
458+
459+void mt7996_mcu_set_mimo(struct mt7996_phy *phy)
460+{
461+ struct mt7996_dev *dev = phy->dev;
462+ struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
463+ int disable_ra = 1;
464+ char buf[] = "2 134 0 1 0 1 2 2 2";
465+ int force_mu = 1;
466+
467+ switch (chandef->width) {
468+ case NL80211_CHAN_WIDTH_20_NOHT:
469+ case NL80211_CHAN_WIDTH_20:
470+ strscpy(buf, "2 122 0 1 0 1 2 2 2", sizeof(buf));
471+ break;
472+ case NL80211_CHAN_WIDTH_80:
473+ break;
474+ case NL80211_CHAN_WIDTH_160:
475+ strscpy(buf, "2 137 0 1 0 1 2 2 2", sizeof(buf));
476+ break;
477+ default:
478+ break;
479+ }
480+
481+ mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SET_MUDL_ACK_POLICY, MU_DL_ACK_POLICY_SU_BAR);
482+ mt7996_mcu_set_muru_fixed_rate_enable(dev, UNI_CMD_MURU_FIXED_RATE_CTRL, disable_ra);
483+ mt7996_mcu_set_muru_fixed_rate_parameter(dev, UNI_CMD_MURU_FIXED_GROUP_RATE_CTRL, buf);
484+ mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SET_FORCE_MU, force_mu);
485+}
486+
487+void mt7996_mcu_set_cert(struct mt7996_phy *phy, u8 type)
488+{
489+ struct mt7996_dev *dev = phy->dev;
490+ struct {
491+ u8 _rsv[4];
492+
493+ __le16 tag;
494+ __le16 len;
495+ u8 action;
496+ u8 _rsv2[3];
497+ } __packed req = {
498+ .tag = cpu_to_le16(UNI_CMD_CERT_CFG),
499+ .len = cpu_to_le16(sizeof(req) - 4),
500+ .action = type, /* 1: CAPI Enable */
501+ };
502+
503+ mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &req,
504+ sizeof(req), false);
505+}
506+
507 #endif
508diff --git a/mt7996/mtk_mcu.h b/mt7996/mtk_mcu.h
developer05f3b2b2024-08-19 19:17:34 +0800509index d9686ebb..7a4140b5 100644
developer66e89bc2024-04-23 14:50:01 +0800510--- a/mt7996/mtk_mcu.h
511+++ b/mt7996/mtk_mcu.h
512@@ -122,14 +122,15 @@ enum {
513 };
514
515 enum {
516+ UNI_CMD_MURU_BSRP_CTRL = 0x01,
517 UNI_CMD_MURU_SUTX_CTRL = 0x10,
518- UNI_CMD_MURU_FIXED_RATE_CTRL,
519- UNI_CMD_MURU_FIXED_GROUP_RATE_CTRL,
520+ UNI_CMD_MURU_FIXED_RATE_CTRL = 0x11,
521+ UNI_CMD_MURU_FIXED_GROUP_RATE_CTRL = 0x12,
522 UNI_CMD_MURU_SET_FORCE_MU = 0x33,
523 UNI_CMD_MURU_MUNUAL_CONFIG = 0x64,
524- UNI_CMD_MURU_SET_MUDL_ACK_POLICY = 0xC9,
525- UNI_CMD_MURU_SET_TRIG_TYPE,
526- UNI_CMD_MURU_SET_20M_DYN_ALGO,
527+ UNI_CMD_MURU_SET_MUDL_ACK_POLICY = 0xC8,
528+ UNI_CMD_MURU_SET_TRIG_TYPE = 0xC9,
529+ UNI_CMD_MURU_SET_20M_DYN_ALGO = 0xCA,
530 UNI_CMD_MURU_PROT_FRAME_THR = 0xCC,
531 UNI_CMD_MURU_SET_CERT_MU_EDCA_OVERRIDE,
532 };
533@@ -533,6 +534,179 @@ struct mt7996_mcu_sr_hw_ind_event {
534 __le32 sr_ampdu_mpdu_cnt;
535 __le32 sr_ampdu_mpdu_acked_cnt;
536 };
537+
538+struct mt7996_muru_comm {
539+ u8 pda_pol;
540+ u8 band;
541+ u8 spe_idx;
542+ u8 proc_type;
543+
544+ __le16 mlo_ctrl;
545+ u8 sch_type;
546+ u8 ppdu_format;
547+ u8 ac;
548+ u8 _rsv[3];
549+};
550+
551+struct mt7996_muru_dl {
552+ u8 user_num;
553+ u8 tx_mode;
554+ u8 bw;
555+ u8 gi;
556+
557+ u8 ltf;
558+ u8 mcs;
559+ u8 dcm;
560+ u8 cmprs;
561+
562+ __le16 ru[16];
563+
564+ u8 c26[2];
565+ u8 ack_policy;
566+ u8 tx_power;
567+
568+ __le16 mu_ppdu_duration;
569+ u8 agc_disp_order;
570+ u8 _rsv1;
571+
572+ u8 agc_disp_pol;
573+ u8 agc_disp_ratio;
574+ __le16 agc_disp_linkMFG;
575+
576+ __le16 prmbl_punc_bmp;
577+ u8 _rsv2[2];
578+
579+ struct {
580+ __le16 wlan_idx;
581+ u8 ru_alloc_seg;
582+ u8 ru_idx;
583+ u8 ldpc;
584+ u8 nss;
585+ u8 mcs;
586+ u8 mu_group_idx;
587+ u8 vht_groud_id;
588+ u8 vht_up;
589+ u8 he_start_stream;
590+ u8 he_mu_spatial;
591+ __le16 tx_power_alpha;
592+ u8 ack_policy;
593+ u8 ru_allo_ps160;
594+ } usr[16];
595+};
596+
597+struct mt7996_muru_ul {
598+ u8 user_num;
599+ u8 tx_mode;
600+
601+ u8 ba_type;
602+ u8 _rsv;
603+
604+ u8 bw;
605+ u8 gi_ltf;
606+ __le16 ul_len;
607+
608+ __le16 trig_cnt;
609+ u8 pad;
610+ u8 trig_type;
611+
612+ __le16 trig_intv;
613+ u8 trig_ta[ETH_ALEN];
614+ __le16 ul_ru[16];
615+
616+ u8 c26[2];
617+ __le16 agc_disp_linkMFG;
618+
619+ u8 agc_disp_mu_len;
620+ u8 agc_disp_pol;
621+ u8 agc_disp_ratio;
622+ u8 agc_disp_pu_idx;
623+
624+ struct {
625+ __le16 wlan_idx;
626+ u8 ru_alloc_seg;
627+ u8 ru_idx;
628+ u8 ldpc;
629+ u8 nss;
630+ u8 mcs;
631+ u8 target_rssi;
632+ __le32 trig_pkt_size;
633+ u8 ru_allo_ps160;
634+ u8 _rsv2[3];
635+ } usr[16];
636+};
637+
638+struct mt7996_muru_dbg {
639+ /* HE TB RX Debug */
640+ __le32 rx_hetb_nonsf_en_bitmap;
641+ __le32 rx_hetb_cfg[2];
642+};
643+
644+struct mt7996_muru {
645+ __le32 cfg_comm;
646+ __le32 cfg_dl;
647+ __le32 cfg_ul;
648+ __le32 cfg_dbg;
649+
650+ struct mt7996_muru_comm comm;
651+ struct mt7996_muru_dl dl;
652+ struct mt7996_muru_ul ul;
653+ struct mt7996_muru_dbg dbg;
654+};
655+
656+
657+#define MURU_PPDU_HE_TRIG BIT(2)
658+#define MURU_PPDU_HE_MU BIT(3)
659+
660+#define MURU_OFDMA_SCH_TYPE_DL BIT(0)
661+#define MURU_OFDMA_SCH_TYPE_UL BIT(1)
662+
663+/* Common Config */
664+#define MURU_COMM_PPDU_FMT BIT(0)
665+#define MURU_COMM_SCH_TYPE BIT(1)
666+#define MURU_COMM_BAND BIT(2)
667+#define MURU_COMM_WMM BIT(3)
668+#define MURU_COMM_SPE_IDX BIT(4)
669+#define MURU_COMM_PROC_TYPE BIT(5)
670+#define MURU_COMM_SET (MURU_COMM_PPDU_FMT | MURU_COMM_SCH_TYPE)
671+#define MURU_COMM_SET_TM (MURU_COMM_PPDU_FMT | MURU_COMM_BAND | \
672+ MURU_COMM_WMM | MURU_COMM_SPE_IDX)
673+
674+/* DL Common config */
675+#define MURU_FIXED_DL_TOTAL_USER_CNT BIT(4)
676+
677+/* UL Common Config */
678+#define MURU_FIXED_UL_TOTAL_USER_CNT BIT(4)
679+
680+enum {
681+ CAPI_SU,
682+ CAPI_MU,
683+ CAPI_ER_SU,
684+ CAPI_TB,
685+ CAPI_LEGACY
686+};
687+
688+enum {
689+ CAPI_BASIC,
690+ CAPI_BRP,
691+ CAPI_MU_BAR,
692+ CAPI_MU_RTS,
693+ CAPI_BSRP,
694+ CAPI_GCR_MU_BAR,
695+ CAPI_BQRP,
696+ CAPI_NDP_FRP,
697+};
698+
699+enum {
700+ MU_DL_ACK_POLICY_MU_BAR = 3,
701+ MU_DL_ACK_POLICY_TF_FOR_ACK = 4,
702+ MU_DL_ACK_POLICY_SU_BAR = 5,
703+};
704+
705+enum muru_vendor_ctrl {
706+ MU_CTRL_UPDATE,
707+ MU_CTRL_DL_USER_CNT,
708+ MU_CTRL_UL_USER_CNT,
709+};
710 #endif
711
712 #endif
713diff --git a/mt7996/vendor.c b/mt7996/vendor.c
developer05f3b2b2024-08-19 19:17:34 +0800714index 0d6fa779..7ab64471 100644
developer66e89bc2024-04-23 14:50:01 +0800715--- a/mt7996/vendor.c
716+++ b/mt7996/vendor.c
717@@ -10,10 +10,31 @@
718 #include "vendor.h"
719 #include "mtk_mcu.h"
720
721+#ifdef CONFIG_MTK_VENDOR
722 static const struct nla_policy
723 mu_ctrl_policy[NUM_MTK_VENDOR_ATTRS_MU_CTRL] = {
724 [MTK_VENDOR_ATTR_MU_CTRL_ONOFF] = {.type = NLA_U8 },
725 [MTK_VENDOR_ATTR_MU_CTRL_DUMP] = {.type = NLA_U8 },
726+ [MTK_VENDOR_ATTR_MU_CTRL_STRUCT] = {.type = NLA_BINARY },
727+};
728+
729+static const struct nla_policy
730+wireless_ctrl_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL] = {
731+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU] = {.type = NLA_U8 },
732+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_AMPDU] = {.type = NLA_U8 },
733+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT] = {.type = NLA_U8 },
734+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA] = {.type = NLA_U8 },
735+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_MCS] = {.type = NLA_U8 },
736+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA] = {.type = NLA_U8 },
737+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE] = {.type = NLA_U8 },
738+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA] = {.type = NLA_U8 },
739+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO] = {.type = NLA_U8 },
740+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE] = {.type = NLA_U16 },
741+};
742+
743+static const struct nla_policy
744+wireless_dump_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_DUMP] = {
745+ [MTK_VENDOR_ATTR_WIRELESS_DUMP_AMSDU] = { .type = NLA_U8 },
746 };
747
748 static const struct nla_policy
749@@ -76,6 +97,17 @@ pp_ctrl_policy[NUM_MTK_VENDOR_ATTRS_PP_CTRL] = {
750 [MTK_VENDOR_ATTR_PP_BAND_IDX] = { .type = NLA_U8 },
751 };
752
753+static const struct nla_policy
754+rfeature_ctrl_policy[NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL] = {
755+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI] = {.type = NLA_U8 },
756+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_LTF] = { .type = NLA_U8 },
757+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG] = { .type = NLA_NESTED },
758+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_EN] = { .type = NLA_U8 },
759+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE] = { .type = NLA_U8 },
760+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY] = { .type = NLA_U8 },
761+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TXBF] = { .type = NLA_U8 },
762+};
763+
764 struct mt7996_amnt_data {
765 u8 idx;
766 u8 addr[ETH_ALEN];
767@@ -90,6 +122,8 @@ static int mt7996_vendor_mu_ctrl(struct wiphy *wiphy,
768 {
769 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
770 struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_MU_CTRL];
771+ struct mt7996_phy *phy = mt7996_hw_phy(hw);
772+ struct mt7996_muru *muru;
773 int err;
774 u8 val8;
775 u32 val32 = 0;
776@@ -105,9 +139,17 @@ static int mt7996_vendor_mu_ctrl(struct wiphy *wiphy,
777 FIELD_PREP(RATE_CFG_VAL, val8);
778 ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL,
779 mt7996_set_wireless_vif, &val32);
780+ } else if (tb[MTK_VENDOR_ATTR_MU_CTRL_STRUCT]) {
781+ muru = kzalloc(sizeof(struct mt7996_muru), GFP_KERNEL);
782+
783+ nla_memcpy(muru, tb[MTK_VENDOR_ATTR_MU_CTRL_STRUCT],
784+ sizeof(struct mt7996_muru));
785+
786+ err = mt7996_mcu_set_muru_cfg(phy, muru);
787+ kfree(muru);
788 }
789
790- return 0;
791+ return err;
792 }
793
794 static int
795@@ -130,6 +172,48 @@ mt7996_vendor_mu_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev,
796 return len;
797 }
798
799+void mt7996_set_wireless_rts_sigta(struct ieee80211_hw *hw, u8 value) {
800+ struct mt7996_phy *phy = mt7996_hw_phy(hw);
801+
802+ switch (value) {
803+ case BW_SIGNALING_STATIC:
804+ case BW_SIGNALING_DYNAMIC:
805+ mt7996_mcu_set_band_confg(phy, UNI_BAND_CONFIG_RTS_SIGTA_EN, true);
806+ mt7996_mcu_set_band_confg(phy, UNI_BAND_CONFIG_DIS_SECCH_CCA_DET, false);
807+ break;
808+ default:
809+ value = BW_SIGNALING_DISABLE;
810+ mt7996_mcu_set_band_confg(phy, UNI_BAND_CONFIG_RTS_SIGTA_EN, false);
811+ mt7996_mcu_set_band_confg(phy, UNI_BAND_CONFIG_DIS_SECCH_CCA_DET, true);
812+ break;
813+ }
814+
815+ phy->rts_bw_sig = value;
816+
817+ /* Set RTS Threshold to a lower Value */
818+ mt7996_mcu_set_rts_thresh(phy, 500);
819+}
820+
821+static int
822+mt7996_vendor_wireless_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev,
823+ struct sk_buff *skb, const void *data, int data_len,
824+ unsigned long *storage)
825+{
826+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
827+ int len = 0;
828+
829+ if (*storage == 1)
830+ return -ENOENT;
831+ *storage = 1;
832+
833+ if (nla_put_u8(skb, MTK_VENDOR_ATTR_WIRELESS_DUMP_AMSDU,
834+ ieee80211_hw_check(hw, SUPPORTS_AMSDU_IN_AMPDU)))
835+ return -ENOMEM;
836+ len += 1;
837+
838+ return len;
839+ }
840+
841 void mt7996_vendor_amnt_fill_rx(struct mt7996_phy *phy, struct sk_buff *skb)
842 {
843 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
844@@ -712,6 +796,126 @@ error:
845 return -EINVAL;
846 }
847
848+static int mt7996_vendor_rfeature_ctrl(struct wiphy *wiphy,
849+ struct wireless_dev *wdev,
850+ const void *data,
851+ int data_len)
852+{
853+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
854+ struct mt7996_phy *phy = mt7996_hw_phy(hw);
855+ struct mt7996_dev *dev = phy->dev;
856+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL];
857+ int err;
858+ u32 val;
859+
860+ err = nla_parse(tb, MTK_VENDOR_ATTR_RFEATURE_CTRL_MAX, data, data_len,
861+ rfeature_ctrl_policy, NULL);
862+ if (err)
863+ return err;
864+
865+ val = CAPI_RFEATURE_CHANGED;
866+
867+ if (tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG]) {
868+ u8 enable, trig_type;
869+ int rem;
870+ struct nlattr *cur;
871+
872+ nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG], rem) {
873+ switch (nla_type(cur)) {
874+ case MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_EN:
875+ enable = nla_get_u8(cur);
876+ break;
877+ case MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE:
878+ trig_type = nla_get_u8(cur);
879+ break;
880+ default:
881+ return -EINVAL;
882+ };
883+ }
884+
885+ err = mt7996_mcu_set_rfeature_trig_type(phy, enable, trig_type);
886+ if (err)
887+ return err;
888+ } else if (tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY]) {
889+ u8 ack_policy;
890+
891+ ack_policy = nla_get_u8(tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY]);
892+ switch (ack_policy) {
893+ case MU_DL_ACK_POLICY_TF_FOR_ACK:
894+ return mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SET_MUDL_ACK_POLICY,
895+ ack_policy);
896+ default:
897+ return 0;
898+ }
899+ }
900+
901+ return 0;
902+}
903+
904+static int mt7996_vendor_wireless_ctrl(struct wiphy *wiphy,
905+ struct wireless_dev *wdev,
906+ const void *data,
907+ int data_len)
908+{
909+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
910+ struct mt7996_phy *phy = mt7996_hw_phy(hw);
911+ struct mt7996_dev *dev = phy->dev;
912+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL];
913+ int err;
914+ u8 val8;
915+ u16 val16;
916+ u32 val32;
917+
918+ err = nla_parse(tb, MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX, data, data_len,
919+ wireless_ctrl_policy, NULL);
920+ if (err)
921+ return err;
922+
923+ val32 = CAPI_WIRELESS_CHANGED;
924+
925+ if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA]) {
926+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA]);
927+ val32 |= FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_FIXED_OFDMA) |
928+ FIELD_PREP(RATE_CFG_VAL, val8);
929+ ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL,
930+ mt7996_set_wireless_vif, &val32);
931+ if (val8 == 3) /* DL20and80 */
932+ mt7996_mcu_set_muru_cmd(dev, UNI_CMD_MURU_SET_20M_DYN_ALGO, 1);
933+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE]) {
934+ val16 = nla_get_u16(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE]);
935+ hw->max_tx_aggregation_subframes = val16;
936+ hw->max_rx_aggregation_subframes = val16;
937+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE]) {
938+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE]);
939+ mt7996_mcu_set_ppdu_tx_type(phy, val8);
940+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA]) {
941+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA]);
942+ if (phy->muru_onoff & OFDMA_UL)
943+ mt7996_mcu_set_nusers_ofdma(phy, MU_CTRL_UL_USER_CNT, val8);
944+ else
945+ mt7996_mcu_set_nusers_ofdma(phy, MU_CTRL_DL_USER_CNT, val8);
946+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO]) {
947+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO]);
948+ val32 |= FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_FIXED_MIMO) |
949+ FIELD_PREP(RATE_CFG_VAL, val8);
950+ ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL,
951+ mt7996_set_wireless_vif, &val32);
952+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT]) {
953+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT]);
954+ dev->cert_mode = val8;
955+ mt7996_mcu_set_cert(phy, val8);
956+ mt7996_mcu_set_bypass_smthint(phy, val8);
957+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU]) {
958+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU]);
959+ mt7996_set_wireless_amsdu(hw, val8);
960+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA]) {
961+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA]);
962+ mt7996_set_wireless_rts_sigta(hw, val8);
963+ }
964+
965+ return 0;
966+}
967+
968 static const struct wiphy_vendor_command mt7996_vendor_commands[] = {
969 {
970 .info = {
971@@ -725,6 +929,18 @@ static const struct wiphy_vendor_command mt7996_vendor_commands[] = {
972 .policy = mu_ctrl_policy,
973 .maxattr = MTK_VENDOR_ATTR_MU_CTRL_MAX,
974 },
975+ {
976+ .info = {
977+ .vendor_id = MTK_NL80211_VENDOR_ID,
978+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL,
979+ },
980+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV |
981+ WIPHY_VENDOR_CMD_NEED_RUNNING,
982+ .doit = mt7996_vendor_wireless_ctrl,
983+ .dumpit = mt7996_vendor_wireless_ctrl_dump,
984+ .policy = wireless_ctrl_policy,
985+ .maxattr = MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX,
986+ },
987 {
988 .info = {
989 .vendor_id = MTK_NL80211_VENDOR_ID,
990@@ -794,6 +1010,17 @@ static const struct wiphy_vendor_command mt7996_vendor_commands[] = {
991 .policy = pp_ctrl_policy,
992 .maxattr = MTK_VENDOR_ATTR_PP_CTRL_MAX,
993 },
994+ {
995+ .info = {
996+ .vendor_id = MTK_NL80211_VENDOR_ID,
997+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_RFEATURE_CTRL,
998+ },
999+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV |
1000+ WIPHY_VENDOR_CMD_NEED_RUNNING,
1001+ .doit = mt7996_vendor_rfeature_ctrl,
1002+ .policy = rfeature_ctrl_policy,
1003+ .maxattr = MTK_VENDOR_ATTR_RFEATURE_CTRL_MAX,
1004+ },
1005 };
1006
1007 void mt7996_vendor_register(struct mt7996_phy *phy)
1008@@ -803,3 +1030,4 @@ void mt7996_vendor_register(struct mt7996_phy *phy)
1009
1010 spin_lock_init(&phy->amnt_lock);
1011 }
1012+#endif
1013diff --git a/mt7996/vendor.h b/mt7996/vendor.h
developer05f3b2b2024-08-19 19:17:34 +08001014index 8aaa18ee..2ee1339a 100644
developer66e89bc2024-04-23 14:50:01 +08001015--- a/mt7996/vendor.h
1016+++ b/mt7996/vendor.h
1017@@ -3,8 +3,12 @@
1018
1019 #define MTK_NL80211_VENDOR_ID 0x0ce7
1020
1021+#ifdef CONFIG_MTK_VENDOR
1022+
1023 enum mtk_nl80211_vendor_subcmds {
1024 MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL = 0xae,
1025+ MTK_NL80211_VENDOR_SUBCMD_RFEATURE_CTRL = 0xc3,
1026+ MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4,
1027 MTK_NL80211_VENDOR_SUBCMD_MU_CTRL = 0xc5,
1028 MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7,
1029 MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8,
1030@@ -61,6 +65,7 @@ enum mtk_vendor_attr_mu_ctrl {
1031
1032 MTK_VENDOR_ATTR_MU_CTRL_ONOFF,
1033 MTK_VENDOR_ATTR_MU_CTRL_DUMP,
1034+ MTK_VENDOR_ATTR_MU_CTRL_STRUCT,
1035
1036 /* keep last */
1037 NUM_MTK_VENDOR_ATTRS_MU_CTRL,
1038@@ -68,6 +73,66 @@ enum mtk_vendor_attr_mu_ctrl {
1039 NUM_MTK_VENDOR_ATTRS_MU_CTRL - 1
1040 };
1041
1042+enum mtk_capi_control_changed {
1043+ CAPI_RFEATURE_CHANGED = BIT(16),
1044+ CAPI_WIRELESS_CHANGED = BIT(17),
1045+};
1046+
1047+enum mtk_vendor_attr_rfeature_ctrl {
1048+ MTK_VENDOR_ATTR_RFEATURE_CTRL_UNSPEC,
1049+
1050+ MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI,
1051+ MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_LTF,
1052+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG,
1053+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_EN,
1054+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE,
1055+ MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY,
1056+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TXBF,
1057+
1058+ /* keep last */
1059+ NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL,
1060+ MTK_VENDOR_ATTR_RFEATURE_CTRL_MAX =
1061+ NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL - 1
1062+};
1063+
1064+enum mtk_vendor_attr_wireless_ctrl {
1065+ MTK_VENDOR_ATTR_WIRELESS_CTRL_UNSPEC,
1066+
1067+ MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_MCS,
1068+ MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA,
1069+ MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE,
1070+ MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA,
1071+ MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE,
1072+ MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO,
1073+ MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU,
1074+ MTK_VENDOR_ATTR_WIRELESS_CTRL_AMPDU,
1075+ MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT = 9,
1076+ MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA,
1077+ MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA, /* reserve */
1078+
1079+ /* keep last */
1080+ NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL,
1081+ MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX =
1082+ NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL - 1
1083+};
1084+
1085+enum mtk_vendor_attr_wireless_dump {
1086+ MTK_VENDOR_ATTR_WIRELESS_DUMP_UNSPEC,
1087+
1088+ MTK_VENDOR_ATTR_WIRELESS_DUMP_AMSDU,
1089+
1090+ /* keep last */
1091+ NUM_MTK_VENDOR_ATTRS_WIRELESS_DUMP,
1092+ MTK_VENDOR_ATTR_WIRELESS_DUMP_MAX =
1093+ NUM_MTK_VENDOR_ATTRS_WIRELESS_DUMP - 1
1094+};
1095+
1096+enum bw_sig {
1097+ BW_SIGNALING_DISABLE,
1098+ BW_SIGNALING_STATIC,
1099+ BW_SIGNALING_DYNAMIC
1100+};
1101+
1102 enum mtk_vendor_attr_mnt_ctrl {
1103 MTK_VENDOR_ATTR_AMNT_CTRL_UNSPEC,
1104
1105@@ -151,3 +216,5 @@ enum mtk_vendor_attr_pp_ctrl {
1106 };
1107
1108 #endif
1109+
1110+#endif
1111--
developer9237f442024-06-14 17:13:04 +080011122.18.0
developer66e89bc2024-04-23 14:50:01 +08001113