[rdkb][common][bsp][Refactor and sync kernel from openwrt]
[Description]
fad06c23 [Critical][mt7988][SPI][Change SPI1 clk]
2b1f78b1 [kernel][mt7988][eth][Correct CDMA_HIGH_THRESHOLD setting]
[Release-log]
Change-Id: I48b2db4cc4c63b285f493772a399d730bdba3950
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
index 0fd2d47..9abe45f 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
@@ -1057,7 +1057,7 @@
reg = <0 0x11008000 0 0x100>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&topckgen CK_TOP_CB_M_D2>,
- <&topckgen CK_TOP_SPI_SEL>,
+ <&topckgen CK_TOP_SPIM_MST_SEL>,
<&infracfg_ao CK_INFRA_104M_SPI1>,
<&infracfg_ao CK_INFRA_66M_SPI1_HCK>;
clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index dbd2b49..7ff8baf 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -4409,7 +4409,7 @@
/* GDM and CDM Threshold */
mtk_w32(eth, 0x00000004, MTK_CDM2_THRES);
- mtk_w32(eth, 0x00000707, MTK_CDMW0_THRES);
+ mtk_w32(eth, 0x08000707, MTK_CDMW0_THRES);
mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES);
/* Disable GDM1 RX CRC stripping */