| From e3eb835c5f9c1f40a1aaf4fae2a2de83f2cd1a9c Mon Sep 17 00:00:00 2001 |
| From: Shayne Chen <shayne.chen@mediatek.com> |
| Date: Thu, 3 Aug 2023 14:49:59 +0800 |
| Subject: [PATCH] sync to master codebase |
| |
| --- |
| Makefile | 8 + |
| mt76_connac3_mac.h | 14 + |
| mt76x02_mac.c | 3 +- |
| mt7915/main.c | 3 +- |
| mt7915/mcu.c | 2 +- |
| mt7921/Kconfig | 4 +- |
| mt7921/Makefile | 9 +- |
| mt7921/acpi_sar.h | 105 --- |
| mt7921/debugfs.c | 228 +------ |
| mt7921/init.c | 304 +-------- |
| mt7921/mac.c | 442 ++----------- |
| mt7921/main.c | 796 +++++----------------- |
| mt7921/mcu.c | 217 ++---- |
| mt7921/mt7921.h | 320 ++------- |
| mt7921/pci.c | 223 ++++--- |
| mt7921/pci_mac.c | 18 +- |
| mt7921/pci_mcu.c | 71 +- |
| mt7921/regs.h | 464 +------------ |
| mt7921/sdio.c | 32 +- |
| mt7921/sdio_mac.c | 6 +- |
| mt7921/sdio_mcu.c | 14 +- |
| mt7921/testmode.c | 10 +- |
| mt7921/trace.c | 12 - |
| mt7921/usb.c | 205 +++--- |
| mt7921/usb_mac.c | 255 ------- |
| mt792x.h | 367 +++++++++++ |
| mt7921/acpi_sar.c => mt792x_acpi_sar.c | 128 ++-- |
| mt792x_acpi_sar.h | 105 +++ |
| mt792x_core.c | 844 ++++++++++++++++++++++++ |
| mt792x_debugfs.c | 168 +++++ |
| mt7921/dma.c => mt792x_dma.c | 336 +++++----- |
| mt792x_mac.c | 385 +++++++++++ |
| mt792x_regs.h | 479 ++++++++++++++ |
| mt792x_trace.c | 14 + |
| mt7921/mt7921_trace.h => mt792x_trace.h | 16 +- |
| mt792x_usb.c | 309 +++++++++ |
| mt7996/mt7996.h | 14 - |
| testmode.c | 1 + |
| 38 files changed, 3586 insertions(+), 3345 deletions(-) |
| delete mode 100644 mt7921/acpi_sar.h |
| delete mode 100644 mt7921/trace.c |
| delete mode 100644 mt7921/usb_mac.c |
| create mode 100644 mt792x.h |
| rename mt7921/acpi_sar.c => mt792x_acpi_sar.c (64%) |
| create mode 100644 mt792x_acpi_sar.h |
| create mode 100644 mt792x_core.c |
| create mode 100644 mt792x_debugfs.c |
| rename mt7921/dma.c => mt792x_dma.c (55%) |
| create mode 100644 mt792x_mac.c |
| create mode 100644 mt792x_regs.h |
| create mode 100644 mt792x_trace.c |
| rename mt7921/mt7921_trace.h => mt792x_trace.h (68%) |
| create mode 100644 mt792x_usb.c |
| |
| diff --git a/Makefile b/Makefile |
| index f9b94280..c8aedf6d 100644 |
| --- a/Makefile |
| +++ b/Makefile |
| @@ -6,6 +6,8 @@ obj-$(CONFIG_MT76_SDIO) += mt76-sdio.o |
| obj-$(CONFIG_MT76x02_LIB) += mt76x02-lib.o |
| obj-$(CONFIG_MT76x02_USB) += mt76x02-usb.o |
| obj-$(CONFIG_MT76_CONNAC_LIB) += mt76-connac-lib.o |
| +obj-$(CONFIG_MT792x_LIB) += mt792x-lib.o |
| +obj-$(CONFIG_MT792x_USB) += mt792x-usb.o |
| |
| mt76-y := \ |
| mmio.o util.o trace.o dma.o mac80211.o debugfs.o eeprom.o \ |
| @@ -20,6 +22,7 @@ mt76-sdio-y := sdio.o sdio_txrx.o |
| CFLAGS_trace.o := -I$(src) |
| CFLAGS_usb_trace.o := -I$(src) |
| CFLAGS_mt76x02_trace.o := -I$(src) |
| +CFLAGS_mt792x_trace.o := -I$(src) |
| |
| mt76x02-lib-y := mt76x02_util.o mt76x02_mac.o mt76x02_mcu.o \ |
| mt76x02_eeprom.o mt76x02_phy.o mt76x02_mmio.o \ |
| @@ -30,6 +33,11 @@ mt76x02-usb-y := mt76x02_usb_mcu.o mt76x02_usb_core.o |
| |
| mt76-connac-lib-y := mt76_connac_mcu.o mt76_connac_mac.o mt76_connac3_mac.o |
| |
| +mt792x-lib-y := mt792x_core.o mt792x_mac.o mt792x_trace.o \ |
| + mt792x_debugfs.o mt792x_dma.o |
| +mt792x-lib-$(CONFIG_ACPI) += mt792x_acpi_sar.o |
| +mt792x-usb-y := mt792x_usb.o |
| + |
| obj-$(CONFIG_MT76x0_COMMON) += mt76x0/ |
| obj-$(CONFIG_MT76x2_COMMON) += mt76x2/ |
| obj-$(CONFIG_MT7603E) += mt7603/ |
| diff --git a/mt76_connac3_mac.h b/mt76_connac3_mac.h |
| index 6663a0b4..68ca0844 100644 |
| --- a/mt76_connac3_mac.h |
| +++ b/mt76_connac3_mac.h |
| @@ -4,6 +4,20 @@ |
| #ifndef __MT76_CONNAC3_MAC_H |
| #define __MT76_CONNAC3_MAC_H |
| |
| +enum { |
| + MT_CTX0, |
| + MT_HIF0 = 0x0, |
| + |
| + MT_LMAC_AC00 = 0x0, |
| + MT_LMAC_AC01, |
| + MT_LMAC_AC02, |
| + MT_LMAC_AC03, |
| + MT_LMAC_ALTX0 = 0x10, |
| + MT_LMAC_BMC0, |
| + MT_LMAC_BCN0, |
| + MT_LMAC_PSMP0, |
| +}; |
| + |
| #define MT_CT_PARSE_LEN 72 |
| #define MT_CT_DMA_BUF_NUM 2 |
| |
| diff --git a/mt76x02_mac.c b/mt76x02_mac.c |
| index 3e41d809..d5db6ffd 100644 |
| --- a/mt76x02_mac.c |
| +++ b/mt76x02_mac.c |
| @@ -853,7 +853,8 @@ int mt76x02_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb, |
| if (WARN_ON_ONCE(len > skb->len)) |
| return -EINVAL; |
| |
| - pskb_trim(skb, len); |
| + if (pskb_trim(skb, len)) |
| + return -EINVAL; |
| |
| status->chains = BIT(0); |
| signal = mt76x02_mac_get_rssi(dev, rxwi->rssi[0], 0); |
| diff --git a/mt7915/main.c b/mt7915/main.c |
| index 33bfa4a6..9b79e915 100644 |
| --- a/mt7915/main.c |
| +++ b/mt7915/main.c |
| @@ -471,7 +471,8 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed) |
| ieee80211_wake_queues(hw); |
| } |
| |
| - if (changed & IEEE80211_CONF_CHANGE_POWER) { |
| + if (changed & (IEEE80211_CONF_CHANGE_POWER | |
| + IEEE80211_CONF_CHANGE_CHANNEL)) { |
| ret = mt7915_mcu_set_txpower_sku(phy); |
| if (ret) |
| return ret; |
| diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
| index b0328d4f..8224f8be 100644 |
| --- a/mt7915/mcu.c |
| +++ b/mt7915/mcu.c |
| @@ -3038,7 +3038,7 @@ int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch) |
| } |
| |
| ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO), |
| - req, sizeof(req), true, &skb); |
| + req, len * sizeof(req[0]), true, &skb); |
| if (ret) |
| return ret; |
| |
| diff --git a/mt7921/Kconfig b/mt7921/Kconfig |
| index adff2d73..7ed51e05 100644 |
| --- a/mt7921/Kconfig |
| +++ b/mt7921/Kconfig |
| @@ -1,7 +1,7 @@ |
| # SPDX-License-Identifier: ISC |
| config MT7921_COMMON |
| tristate |
| - select MT76_CONNAC_LIB |
| + select MT792x_LIB |
| select WANT_DEV_COREDUMP |
| |
| config MT7921E |
| @@ -27,7 +27,7 @@ config MT7921S |
| |
| config MT7921U |
| tristate "MediaTek MT7921U (USB) support" |
| - select MT76_USB |
| + select MT792x_USB |
| select MT7921_COMMON |
| depends on MAC80211 |
| depends on USB |
| diff --git a/mt7921/Makefile b/mt7921/Makefile |
| index e5d2d2e1..849be9e8 100644 |
| --- a/mt7921/Makefile |
| +++ b/mt7921/Makefile |
| @@ -5,11 +5,8 @@ obj-$(CONFIG_MT7921E) += mt7921e.o |
| obj-$(CONFIG_MT7921S) += mt7921s.o |
| obj-$(CONFIG_MT7921U) += mt7921u.o |
| |
| -CFLAGS_trace.o := -I$(src) |
| - |
| -mt7921-common-y := mac.o mcu.o main.o init.o debugfs.o trace.o |
| +mt7921-common-y := mac.o mcu.o main.o init.o debugfs.o |
| mt7921-common-$(CONFIG_NL80211_TESTMODE) += testmode.o |
| -mt7921-common-$(CONFIG_ACPI) += acpi_sar.o |
| -mt7921e-y := pci.o pci_mac.o pci_mcu.o dma.o |
| +mt7921e-y := pci.o pci_mac.o pci_mcu.o |
| mt7921s-y := sdio.o sdio_mac.o sdio_mcu.o |
| -mt7921u-y := usb.o usb_mac.o |
| +mt7921u-y := usb.o |
| diff --git a/mt7921/acpi_sar.h b/mt7921/acpi_sar.h |
| deleted file mode 100644 |
| index 35268b08..00000000 |
| --- a/mt7921/acpi_sar.h |
| +++ /dev/null |
| @@ -1,105 +0,0 @@ |
| -/* SPDX-License-Identifier: ISC */ |
| -/* Copyright (C) 2022 MediaTek Inc. */ |
| - |
| -#ifndef __MT7921_ACPI_SAR_H |
| -#define __MT7921_ACPI_SAR_H |
| - |
| -#define MT7921_ASAR_MIN_DYN 1 |
| -#define MT7921_ASAR_MAX_DYN 8 |
| -#define MT7921_ASAR_MIN_GEO 3 |
| -#define MT7921_ASAR_MAX_GEO 8 |
| -#define MT7921_ASAR_MIN_FG 8 |
| - |
| -#define MT7921_ACPI_MTCL "MTCL" |
| -#define MT7921_ACPI_MTDS "MTDS" |
| -#define MT7921_ACPI_MTGS "MTGS" |
| -#define MT7921_ACPI_MTFG "MTFG" |
| - |
| -struct mt7921_asar_dyn_limit { |
| - u8 idx; |
| - u8 frp[5]; |
| -} __packed; |
| - |
| -struct mt7921_asar_dyn { |
| - u8 names[4]; |
| - u8 enable; |
| - u8 nr_tbl; |
| - struct mt7921_asar_dyn_limit tbl[0]; |
| -} __packed; |
| - |
| -struct mt7921_asar_dyn_limit_v2 { |
| - u8 idx; |
| - u8 frp[11]; |
| -} __packed; |
| - |
| -struct mt7921_asar_dyn_v2 { |
| - u8 names[4]; |
| - u8 enable; |
| - u8 rsvd; |
| - u8 nr_tbl; |
| - struct mt7921_asar_dyn_limit_v2 tbl[0]; |
| -} __packed; |
| - |
| -struct mt7921_asar_geo_band { |
| - u8 pwr; |
| - u8 offset; |
| -} __packed; |
| - |
| -struct mt7921_asar_geo_limit { |
| - u8 idx; |
| - /* 0:2G, 1:5G */ |
| - struct mt7921_asar_geo_band band[2]; |
| -} __packed; |
| - |
| -struct mt7921_asar_geo { |
| - u8 names[4]; |
| - u8 version; |
| - u8 nr_tbl; |
| - struct mt7921_asar_geo_limit tbl[0]; |
| -} __packed; |
| - |
| -struct mt7921_asar_geo_limit_v2 { |
| - u8 idx; |
| - /* 0:2G, 1:5G, 2:6G */ |
| - struct mt7921_asar_geo_band band[3]; |
| -} __packed; |
| - |
| -struct mt7921_asar_geo_v2 { |
| - u8 names[4]; |
| - u8 version; |
| - u8 rsvd; |
| - u8 nr_tbl; |
| - struct mt7921_asar_geo_limit_v2 tbl[0]; |
| -} __packed; |
| - |
| -struct mt7921_asar_cl { |
| - u8 names[4]; |
| - u8 version; |
| - u8 mode_6g; |
| - u8 cl6g[6]; |
| -} __packed; |
| - |
| -struct mt7921_asar_fg { |
| - u8 names[4]; |
| - u8 version; |
| - u8 rsvd; |
| - u8 nr_flag; |
| - u8 rsvd1; |
| - u8 flag[0]; |
| -} __packed; |
| - |
| -struct mt7921_acpi_sar { |
| - u8 ver; |
| - union { |
| - struct mt7921_asar_dyn *dyn; |
| - struct mt7921_asar_dyn_v2 *dyn_v2; |
| - }; |
| - union { |
| - struct mt7921_asar_geo *geo; |
| - struct mt7921_asar_geo_v2 *geo_v2; |
| - }; |
| - struct mt7921_asar_cl *countrylist; |
| - struct mt7921_asar_fg *fg; |
| -}; |
| - |
| -#endif |
| diff --git a/mt7921/debugfs.c b/mt7921/debugfs.c |
| index d6c66e77..616b66a3 100644 |
| --- a/mt7921/debugfs.c |
| +++ b/mt7921/debugfs.c |
| @@ -6,11 +6,11 @@ |
| static int |
| mt7921_reg_set(void *data, u64 val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt76_wr(dev, dev->mt76.debugfs_reg, val); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| @@ -18,11 +18,11 @@ mt7921_reg_set(void *data, u64 val) |
| static int |
| mt7921_reg_get(void *data, u64 *val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| *val = mt76_rr(dev, dev->mt76.debugfs_reg); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| @@ -32,14 +32,14 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_regval, mt7921_reg_get, mt7921_reg_set, |
| static int |
| mt7921_fw_debug_set(void *data, u64 val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| dev->fw_debug = (u8)val; |
| mt7921_mcu_fw_log_2_host(dev, dev->fw_debug); |
| |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| @@ -47,7 +47,7 @@ mt7921_fw_debug_set(void *data, u64 val) |
| static int |
| mt7921_fw_debug_get(void *data, u64 *val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| |
| *val = dev->fw_debug; |
| |
| @@ -57,128 +57,7 @@ mt7921_fw_debug_get(void *data, u64 *val) |
| DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug, mt7921_fw_debug_get, |
| mt7921_fw_debug_set, "%lld\n"); |
| |
| -static void |
| -mt7921_ampdu_stat_read_phy(struct mt7921_phy *phy, |
| - struct seq_file *file) |
| -{ |
| - struct mt7921_dev *dev = file->private; |
| - int bound[15], range[4], i; |
| - |
| - if (!phy) |
| - return; |
| - |
| - mt7921_mac_update_mib_stats(phy); |
| - |
| - /* Tx ampdu stat */ |
| - for (i = 0; i < ARRAY_SIZE(range); i++) |
| - range[i] = mt76_rr(dev, MT_MIB_ARNG(0, i)); |
| - |
| - for (i = 0; i < ARRAY_SIZE(bound); i++) |
| - bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1; |
| - |
| - seq_printf(file, "\nPhy0\n"); |
| - |
| - seq_printf(file, "Length: %8d | ", bound[0]); |
| - for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) |
| - seq_printf(file, "%3d %3d | ", bound[i] + 1, bound[i + 1]); |
| - |
| - seq_puts(file, "\nCount: "); |
| - for (i = 0; i < ARRAY_SIZE(bound); i++) |
| - seq_printf(file, "%8d | ", phy->mt76->aggr_stats[i]); |
| - seq_puts(file, "\n"); |
| - |
| - seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); |
| -} |
| - |
| -static int |
| -mt7921_tx_stats_show(struct seq_file *file, void *data) |
| -{ |
| - struct mt7921_dev *dev = file->private; |
| - struct mt7921_phy *phy = &dev->phy; |
| - struct mt76_mib_stats *mib = &phy->mib; |
| - int i; |
| - |
| - mt7921_mutex_acquire(dev); |
| - |
| - mt7921_ampdu_stat_read_phy(phy, file); |
| - |
| - seq_puts(file, "Tx MSDU stat:\n"); |
| - for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { |
| - seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ", |
| - i + 1, mib->tx_amsdu[i]); |
| - if (mib->tx_amsdu_cnt) |
| - seq_printf(file, "(%3d%%)\n", |
| - mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt); |
| - else |
| - seq_puts(file, "\n"); |
| - } |
| - |
| - mt7921_mutex_release(dev); |
| - |
| - return 0; |
| -} |
| - |
| -DEFINE_SHOW_ATTRIBUTE(mt7921_tx_stats); |
| - |
| -static int |
| -mt7921_queues_acq(struct seq_file *s, void *data) |
| -{ |
| - struct mt7921_dev *dev = dev_get_drvdata(s->private); |
| - int i; |
| - |
| - mt7921_mutex_acquire(dev); |
| - |
| - for (i = 0; i < 4; i++) { |
| - u32 ctrl, val, qlen = 0; |
| - int j; |
| - |
| - val = mt76_rr(dev, MT_PLE_AC_QEMPTY(i)); |
| - ctrl = BIT(31) | BIT(11) | (i << 24); |
| - |
| - for (j = 0; j < 32; j++) { |
| - if (val & BIT(j)) |
| - continue; |
| - |
| - mt76_wr(dev, MT_PLE_FL_Q0_CTRL, ctrl | j); |
| - qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL, |
| - GENMASK(11, 0)); |
| - } |
| - seq_printf(s, "AC%d: queued=%d\n", i, qlen); |
| - } |
| - |
| - mt7921_mutex_release(dev); |
| - |
| - return 0; |
| -} |
| - |
| -static int |
| -mt7921_queues_read(struct seq_file *s, void *data) |
| -{ |
| - struct mt7921_dev *dev = dev_get_drvdata(s->private); |
| - struct { |
| - struct mt76_queue *q; |
| - char *queue; |
| - } queue_map[] = { |
| - { dev->mphy.q_tx[MT_TXQ_BE], "WFDMA0" }, |
| - { dev->mt76.q_mcu[MT_MCUQ_WM], "MCUWM" }, |
| - { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" }, |
| - }; |
| - int i; |
| - |
| - for (i = 0; i < ARRAY_SIZE(queue_map); i++) { |
| - struct mt76_queue *q = queue_map[i].q; |
| - |
| - if (!q) |
| - continue; |
| - |
| - seq_printf(s, |
| - "%s: queued=%d head=%d tail=%d\n", |
| - queue_map[i].queue, q->queued, q->head, |
| - q->tail); |
| - } |
| - |
| - return 0; |
| -} |
| +DEFINE_SHOW_ATTRIBUTE(mt792x_tx_stats); |
| |
| static void |
| mt7921_seq_puts_array(struct seq_file *file, const char *str, |
| @@ -211,13 +90,13 @@ mt7921_seq_puts_array(struct seq_file *file, const char *str, |
| static int |
| mt7921_txpwr(struct seq_file *s, void *data) |
| { |
| - struct mt7921_dev *dev = dev_get_drvdata(s->private); |
| + struct mt792x_dev *dev = dev_get_drvdata(s->private); |
| struct mt7921_txpwr txpwr; |
| int ret; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| ret = mt7921_get_txpwr_info(dev, &txpwr); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| if (ret) |
| return ret; |
| @@ -263,7 +142,7 @@ mt7921_txpwr(struct seq_file *s, void *data) |
| static int |
| mt7921_pm_set(void *data, u64 val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| struct mt76_connac_pm *pm = &dev->pm; |
| |
| if (mt76_is_usb(&dev->mt76)) |
| @@ -296,7 +175,7 @@ out: |
| static int |
| mt7921_pm_get(void *data, u64 *val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| |
| *val = dev->pm.enable_user; |
| |
| @@ -308,7 +187,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_pm, mt7921_pm_get, mt7921_pm_set, "%lld\n"); |
| static int |
| mt7921_deep_sleep_set(void *data, u64 val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| struct mt76_connac_pm *pm = &dev->pm; |
| bool monitor = !!(dev->mphy.hw->conf.flags & IEEE80211_CONF_MONITOR); |
| bool enable = !!val; |
| @@ -316,7 +195,7 @@ mt7921_deep_sleep_set(void *data, u64 val) |
| if (mt76_is_usb(&dev->mt76)) |
| return -EOPNOTSUPP; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| if (pm->ds_enable_user == enable) |
| goto out; |
| |
| @@ -324,7 +203,7 @@ mt7921_deep_sleep_set(void *data, u64 val) |
| pm->ds_enable = enable && !monitor; |
| mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable); |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| @@ -332,7 +211,7 @@ out: |
| static int |
| mt7921_deep_sleep_get(void *data, u64 *val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| |
| *val = dev->pm.ds_enable_user; |
| |
| @@ -342,67 +221,24 @@ mt7921_deep_sleep_get(void *data, u64 *val) |
| DEFINE_DEBUGFS_ATTRIBUTE(fops_ds, mt7921_deep_sleep_get, |
| mt7921_deep_sleep_set, "%lld\n"); |
| |
| -static int |
| -mt7921_pm_stats(struct seq_file *s, void *data) |
| -{ |
| - struct mt7921_dev *dev = dev_get_drvdata(s->private); |
| - struct mt76_connac_pm *pm = &dev->pm; |
| - |
| - unsigned long awake_time = pm->stats.awake_time; |
| - unsigned long doze_time = pm->stats.doze_time; |
| - |
| - if (!test_bit(MT76_STATE_PM, &dev->mphy.state)) |
| - awake_time += jiffies - pm->stats.last_wake_event; |
| - else |
| - doze_time += jiffies - pm->stats.last_doze_event; |
| - |
| - seq_printf(s, "awake time: %14u\ndoze time: %15u\n", |
| - jiffies_to_msecs(awake_time), |
| - jiffies_to_msecs(doze_time)); |
| - |
| - seq_printf(s, "low power wakes: %9d\n", pm->stats.lp_wake); |
| - |
| - return 0; |
| -} |
| - |
| -static int |
| -mt7921_pm_idle_timeout_set(void *data, u64 val) |
| -{ |
| - struct mt7921_dev *dev = data; |
| - |
| - dev->pm.idle_timeout = msecs_to_jiffies(val); |
| - |
| - return 0; |
| -} |
| - |
| -static int |
| -mt7921_pm_idle_timeout_get(void *data, u64 *val) |
| -{ |
| - struct mt7921_dev *dev = data; |
| - |
| - *val = jiffies_to_msecs(dev->pm.idle_timeout); |
| - |
| - return 0; |
| -} |
| - |
| -DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt7921_pm_idle_timeout_get, |
| - mt7921_pm_idle_timeout_set, "%lld\n"); |
| +DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt792x_pm_idle_timeout_get, |
| + mt792x_pm_idle_timeout_set, "%lld\n"); |
| |
| static int mt7921_chip_reset(void *data, u64 val) |
| { |
| - struct mt7921_dev *dev = data; |
| + struct mt792x_dev *dev = data; |
| int ret = 0; |
| |
| switch (val) { |
| case 1: |
| /* Reset wifisys directly. */ |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| break; |
| default: |
| /* Collect the core dump before reset wifisys. */ |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| ret = mt76_connac_mcu_chip_config(&dev->mt76); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| break; |
| } |
| |
| @@ -414,7 +250,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_reset, NULL, mt7921_chip_reset, "%lld\n"); |
| static int |
| mt7921s_sched_quota_read(struct seq_file *s, void *data) |
| { |
| - struct mt7921_dev *dev = dev_get_drvdata(s->private); |
| + struct mt792x_dev *dev = dev_get_drvdata(s->private); |
| struct mt76_sdio *sdio = &dev->mt76.sdio; |
| |
| seq_printf(s, "pse_data_quota\t%d\n", sdio->sched.pse_data_quota); |
| @@ -425,7 +261,7 @@ mt7921s_sched_quota_read(struct seq_file *s, void *data) |
| return 0; |
| } |
| |
| -int mt7921_init_debugfs(struct mt7921_dev *dev) |
| +int mt7921_init_debugfs(struct mt792x_dev *dev) |
| { |
| struct dentry *dir; |
| |
| @@ -435,23 +271,23 @@ int mt7921_init_debugfs(struct mt7921_dev *dev) |
| |
| if (mt76_is_mmio(&dev->mt76)) |
| debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", |
| - dir, mt7921_queues_read); |
| + dir, mt792x_queues_read); |
| else |
| debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", |
| dir, mt76_queues_read); |
| |
| debugfs_create_devm_seqfile(dev->mt76.dev, "acq", dir, |
| - mt7921_queues_acq); |
| + mt792x_queues_acq); |
| debugfs_create_devm_seqfile(dev->mt76.dev, "txpower_sku", dir, |
| mt7921_txpwr); |
| - debugfs_create_file("tx_stats", 0400, dir, dev, &mt7921_tx_stats_fops); |
| + debugfs_create_file("tx_stats", 0400, dir, dev, &mt792x_tx_stats_fops); |
| debugfs_create_file("fw_debug", 0600, dir, dev, &fops_fw_debug); |
| debugfs_create_file("runtime-pm", 0600, dir, dev, &fops_pm); |
| debugfs_create_file("idle-timeout", 0600, dir, dev, |
| &fops_pm_idle_timeout); |
| debugfs_create_file("chip_reset", 0600, dir, dev, &fops_reset); |
| debugfs_create_devm_seqfile(dev->mt76.dev, "runtime_pm_stats", dir, |
| - mt7921_pm_stats); |
| + mt792x_pm_stats); |
| debugfs_create_file("deep-sleep", 0600, dir, dev, &fops_ds); |
| if (mt76_is_sdio(&dev->mt76)) |
| debugfs_create_devm_seqfile(dev->mt76.dev, "sched-quota", dir, |
| diff --git a/mt7921/init.c b/mt7921/init.c |
| index 94b7cdfd..ff63f37f 100644 |
| --- a/mt7921/init.c |
| +++ b/mt7921/init.c |
| @@ -10,63 +10,19 @@ |
| #include "../mt76_connac2_mac.h" |
| #include "mcu.h" |
| |
| -static const struct ieee80211_iface_limit if_limits[] = { |
| - { |
| - .max = MT7921_MAX_INTERFACES, |
| - .types = BIT(NL80211_IFTYPE_STATION) |
| - }, |
| - { |
| - .max = 1, |
| - .types = BIT(NL80211_IFTYPE_AP) |
| - } |
| -}; |
| - |
| -static const struct ieee80211_iface_combination if_comb[] = { |
| - { |
| - .limits = if_limits, |
| - .n_limits = ARRAY_SIZE(if_limits), |
| - .max_interfaces = MT7921_MAX_INTERFACES, |
| - .num_different_channels = 1, |
| - .beacon_int_infra_match = true, |
| - }, |
| -}; |
| - |
| -static const struct ieee80211_iface_limit if_limits_chanctx[] = { |
| - { |
| - .max = 2, |
| - .types = BIT(NL80211_IFTYPE_STATION) | |
| - BIT(NL80211_IFTYPE_P2P_CLIENT) |
| - }, |
| - { |
| - .max = 1, |
| - .types = BIT(NL80211_IFTYPE_AP) | |
| - BIT(NL80211_IFTYPE_P2P_GO) |
| - } |
| -}; |
| - |
| -static const struct ieee80211_iface_combination if_comb_chanctx[] = { |
| - { |
| - .limits = if_limits_chanctx, |
| - .n_limits = ARRAY_SIZE(if_limits_chanctx), |
| - .max_interfaces = 2, |
| - .num_different_channels = 2, |
| - .beacon_int_infra_match = false, |
| - } |
| -}; |
| - |
| static ssize_t mt7921_thermal_temp_show(struct device *dev, |
| struct device_attribute *attr, |
| char *buf) |
| { |
| switch (to_sensor_dev_attr(attr)->index) { |
| case 0: { |
| - struct mt7921_phy *phy = dev_get_drvdata(dev); |
| - struct mt7921_dev *mdev = phy->dev; |
| + struct mt792x_phy *phy = dev_get_drvdata(dev); |
| + struct mt792x_dev *mdev = phy->dev; |
| int temperature; |
| |
| - mt7921_mutex_acquire(mdev); |
| + mt792x_mutex_acquire(mdev); |
| temperature = mt7921_mcu_get_temperature(phy); |
| - mt7921_mutex_release(mdev); |
| + mt792x_mutex_release(mdev); |
| |
| if (temperature < 0) |
| return temperature; |
| @@ -85,7 +41,7 @@ static struct attribute *mt7921_hwmon_attrs[] = { |
| }; |
| ATTRIBUTE_GROUPS(mt7921_hwmon); |
| |
| -static int mt7921_thermal_init(struct mt7921_phy *phy) |
| +static int mt7921_thermal_init(struct mt792x_phy *phy) |
| { |
| struct wiphy *wiphy = phy->mt76->hw->wiphy; |
| struct device *hwmon; |
| @@ -110,206 +66,20 @@ mt7921_regd_notifier(struct wiphy *wiphy, |
| struct regulatory_request *request) |
| { |
| struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| |
| memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); |
| dev->mt76.region = request->dfs_region; |
| dev->country_ie_env = request->country_ie_env; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt7921_mcu_set_clc(dev, request->alpha2, request->country_ie_env); |
| mt76_connac_mcu_set_channel_domain(hw->priv); |
| mt7921_set_tx_sar_pwr(hw, NULL); |
| - mt7921_mutex_release(dev); |
| -} |
| - |
| -static int |
| -mt7921_init_wiphy(struct ieee80211_hw *hw) |
| -{ |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - struct mt7921_dev *dev = phy->dev; |
| - struct wiphy *wiphy = hw->wiphy; |
| - |
| - hw->queues = 4; |
| - hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; |
| - hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; |
| - hw->netdev_features = NETIF_F_RXCSUM; |
| - |
| - hw->radiotap_timestamp.units_pos = |
| - IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; |
| - |
| - phy->slottime = 9; |
| - |
| - hw->sta_data_size = sizeof(struct mt7921_sta); |
| - hw->vif_data_size = sizeof(struct mt7921_vif); |
| - |
| - if (dev->fw_features & MT7921_FW_CAP_CNM) { |
| - wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; |
| - wiphy->iface_combinations = if_comb_chanctx; |
| - wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_chanctx); |
| - } else { |
| - wiphy->flags &= ~WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; |
| - wiphy->iface_combinations = if_comb; |
| - wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); |
| - } |
| - wiphy->flags &= ~(WIPHY_FLAG_IBSS_RSN | WIPHY_FLAG_4ADDR_AP | |
| - WIPHY_FLAG_4ADDR_STATION); |
| - wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | |
| - BIT(NL80211_IFTYPE_AP) | |
| - BIT(NL80211_IFTYPE_P2P_CLIENT) | |
| - BIT(NL80211_IFTYPE_P2P_GO); |
| - wiphy->max_remain_on_channel_duration = 5000; |
| - wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN; |
| - wiphy->max_scan_ssids = 4; |
| - wiphy->max_sched_scan_plan_interval = |
| - MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL; |
| - wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN; |
| - wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID; |
| - wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH; |
| - wiphy->max_sched_scan_reqs = 1; |
| - wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH | |
| - WIPHY_FLAG_SPLIT_SCAN_6GHZ; |
| - wiphy->reg_notifier = mt7921_regd_notifier; |
| - |
| - wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR | |
| - NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; |
| - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); |
| - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY); |
| - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT); |
| - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); |
| - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); |
| - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT); |
| - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); |
| - |
| - ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); |
| - ieee80211_hw_set(hw, HAS_RATE_CONTROL); |
| - ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); |
| - ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); |
| - ieee80211_hw_set(hw, WANT_MONITOR_VIF); |
| - ieee80211_hw_set(hw, SUPPORTS_PS); |
| - ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); |
| - ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW); |
| - ieee80211_hw_set(hw, CONNECTION_MONITOR); |
| - |
| - if (dev->pm.enable) |
| - ieee80211_hw_set(hw, CONNECTION_MONITOR); |
| - |
| - hw->max_tx_fragments = 4; |
| - |
| - return 0; |
| -} |
| - |
| -static void |
| -mt7921_mac_init_band(struct mt7921_dev *dev, u8 band) |
| -{ |
| - u32 mask, set; |
| - |
| - mt76_rmw_field(dev, MT_TMAC_CTCR0(band), |
| - MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); |
| - mt76_set(dev, MT_TMAC_CTCR0(band), |
| - MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | |
| - MT_TMAC_CTCR0_INS_DDLMT_EN); |
| - |
| - mt76_set(dev, MT_WF_RMAC_MIB_TIME0(band), MT_WF_RMAC_MIB_RXTIME_EN); |
| - mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(band), MT_WF_RMAC_MIB_RXTIME_EN); |
| - |
| - /* enable MIB tx-rx time reporting */ |
| - mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_TXDUR_EN); |
| - mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_RXDUR_EN); |
| - |
| - mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 1536); |
| - /* disable rx rate report by default due to hw issues */ |
| - mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN); |
| - |
| - /* filter out non-resp frames and get instantaneous signal reporting */ |
| - mask = MT_WTBLOFF_TOP_RSCR_RCPI_MODE | MT_WTBLOFF_TOP_RSCR_RCPI_PARAM; |
| - set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) | |
| - FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3); |
| - mt76_rmw(dev, MT_WTBLOFF_TOP_RSCR(band), mask, set); |
| -} |
| - |
| -static u8 |
| -mt7921_get_offload_capability(struct device *dev, const char *fw_wm) |
| -{ |
| - const struct mt76_connac2_fw_trailer *hdr; |
| - struct mt7921_realease_info *rel_info; |
| - const struct firmware *fw; |
| - int ret, i, offset = 0; |
| - const u8 *data, *end; |
| - u8 offload_caps = 0; |
| - |
| - ret = request_firmware(&fw, fw_wm, dev); |
| - if (ret) |
| - return ret; |
| - |
| - if (!fw || !fw->data || fw->size < sizeof(*hdr)) { |
| - dev_err(dev, "Invalid firmware\n"); |
| - goto out; |
| - } |
| - |
| - data = fw->data; |
| - hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); |
| - |
| - for (i = 0; i < hdr->n_region; i++) { |
| - const struct mt76_connac2_fw_region *region; |
| - |
| - region = (const void *)((const u8 *)hdr - |
| - (hdr->n_region - i) * sizeof(*region)); |
| - offset += le32_to_cpu(region->len); |
| - } |
| - |
| - data += offset + 16; |
| - rel_info = (struct mt7921_realease_info *)data; |
| - data += sizeof(*rel_info); |
| - end = data + le16_to_cpu(rel_info->len); |
| - |
| - while (data < end) { |
| - rel_info = (struct mt7921_realease_info *)data; |
| - data += sizeof(*rel_info); |
| - |
| - if (rel_info->tag == MT7921_FW_TAG_FEATURE) { |
| - struct mt7921_fw_features *features; |
| - |
| - features = (struct mt7921_fw_features *)data; |
| - offload_caps = features->data; |
| - break; |
| - } |
| - |
| - data += le16_to_cpu(rel_info->len) + rel_info->pad_len; |
| - } |
| - |
| -out: |
| - release_firmware(fw); |
| - |
| - return offload_caps; |
| + mt792x_mutex_release(dev); |
| } |
| |
| -struct ieee80211_ops * |
| -mt7921_get_mac80211_ops(struct device *dev, void *drv_data, u8 *fw_features) |
| -{ |
| - struct ieee80211_ops *ops; |
| - |
| - ops = devm_kmemdup(dev, &mt7921_ops, sizeof(mt7921_ops), GFP_KERNEL); |
| - if (!ops) |
| - return NULL; |
| - |
| - *fw_features = mt7921_get_offload_capability(dev, drv_data); |
| - if (!(*fw_features & MT7921_FW_CAP_CNM)) { |
| - ops->remain_on_channel = NULL; |
| - ops->cancel_remain_on_channel = NULL; |
| - ops->add_chanctx = NULL; |
| - ops->remove_chanctx = NULL; |
| - ops->change_chanctx = NULL; |
| - ops->assign_vif_chanctx = NULL; |
| - ops->unassign_vif_chanctx = NULL; |
| - ops->mgd_prepare_tx = NULL; |
| - ops->mgd_complete_tx = NULL; |
| - } |
| - return ops; |
| -} |
| -EXPORT_SYMBOL_GPL(mt7921_get_mac80211_ops); |
| - |
| -int mt7921_mac_init(struct mt7921_dev *dev) |
| +int mt7921_mac_init(struct mt792x_dev *dev) |
| { |
| int i; |
| |
| @@ -319,17 +89,17 @@ int mt7921_mac_init(struct mt7921_dev *dev) |
| /* enable hardware rx header translation */ |
| mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_RX_HDR_TRANS_EN); |
| |
| - for (i = 0; i < MT7921_WTBL_SIZE; i++) |
| + for (i = 0; i < MT792x_WTBL_SIZE; i++) |
| mt7921_mac_wtbl_update(dev, i, |
| MT_WTBL_UPDATE_ADM_COUNT_CLEAR); |
| for (i = 0; i < 2; i++) |
| - mt7921_mac_init_band(dev, i); |
| + mt792x_mac_init_band(dev, i); |
| |
| return mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0); |
| } |
| EXPORT_SYMBOL_GPL(mt7921_mac_init); |
| |
| -static int __mt7921_init_hardware(struct mt7921_dev *dev) |
| +static int __mt7921_init_hardware(struct mt792x_dev *dev) |
| { |
| int ret; |
| |
| @@ -337,7 +107,7 @@ static int __mt7921_init_hardware(struct mt7921_dev *dev) |
| * which should be set before firmware download stage. |
| */ |
| mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); |
| - ret = mt7921_mcu_init(dev); |
| + ret = mt792x_mcu_init(dev); |
| if (ret) |
| goto out; |
| |
| @@ -352,21 +122,21 @@ out: |
| return ret; |
| } |
| |
| -static int mt7921_init_hardware(struct mt7921_dev *dev) |
| +static int mt7921_init_hardware(struct mt792x_dev *dev) |
| { |
| int ret, i; |
| |
| set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); |
| |
| - for (i = 0; i < MT7921_MCU_INIT_RETRY_COUNT; i++) { |
| + for (i = 0; i < MT792x_MCU_INIT_RETRY_COUNT; i++) { |
| ret = __mt7921_init_hardware(dev); |
| if (!ret) |
| break; |
| |
| - mt7921_init_reset(dev); |
| + mt792x_init_reset(dev); |
| } |
| |
| - if (i == MT7921_MCU_INIT_RETRY_COUNT) { |
| + if (i == MT792x_MCU_INIT_RETRY_COUNT) { |
| dev_err(dev->mt76.dev, "hardware init failed\n"); |
| return ret; |
| } |
| @@ -374,26 +144,9 @@ static int mt7921_init_hardware(struct mt7921_dev *dev) |
| return 0; |
| } |
| |
| -static int mt7921_init_wcid(struct mt7921_dev *dev) |
| -{ |
| - int idx; |
| - |
| - /* Beacon and mgmt frames should occupy wcid 0 */ |
| - idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7921_WTBL_STA - 1); |
| - if (idx) |
| - return -ENOSPC; |
| - |
| - dev->mt76.global_wcid.idx = idx; |
| - dev->mt76.global_wcid.hw_key_idx = -1; |
| - dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET; |
| - rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); |
| - |
| - return 0; |
| -} |
| - |
| static void mt7921_init_work(struct work_struct *work) |
| { |
| - struct mt7921_dev *dev = container_of(work, struct mt7921_dev, |
| + struct mt792x_dev *dev = container_of(work, struct mt792x_dev, |
| init_work); |
| int ret; |
| |
| @@ -429,7 +182,7 @@ static void mt7921_init_work(struct work_struct *work) |
| mt76_connac_mcu_set_deep_sleep(&dev->mt76, dev->pm.ds_enable); |
| } |
| |
| -int mt7921_register_device(struct mt7921_dev *dev) |
| +int mt7921_register_device(struct mt792x_dev *dev) |
| { |
| struct ieee80211_hw *hw = mt76_hw(dev); |
| int ret; |
| @@ -437,17 +190,17 @@ int mt7921_register_device(struct mt7921_dev *dev) |
| dev->phy.dev = dev; |
| dev->phy.mt76 = &dev->mt76.phy; |
| dev->mt76.phy.priv = &dev->phy; |
| - dev->mt76.tx_worker.fn = mt7921_tx_worker; |
| + dev->mt76.tx_worker.fn = mt792x_tx_worker; |
| |
| - INIT_DELAYED_WORK(&dev->pm.ps_work, mt7921_pm_power_save_work); |
| - INIT_WORK(&dev->pm.wake_work, mt7921_pm_wake_work); |
| + INIT_DELAYED_WORK(&dev->pm.ps_work, mt792x_pm_power_save_work); |
| + INIT_WORK(&dev->pm.wake_work, mt792x_pm_wake_work); |
| spin_lock_init(&dev->pm.wake.lock); |
| mutex_init(&dev->pm.mutex); |
| init_waitqueue_head(&dev->pm.wait); |
| if (mt76_is_sdio(&dev->mt76)) |
| init_waitqueue_head(&dev->mt76.sdio.wait); |
| spin_lock_init(&dev->pm.txq_lock); |
| - INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7921_mac_work); |
| + INIT_DELAYED_WORK(&dev->mphy.mac_work, mt792x_mac_work); |
| INIT_DELAYED_WORK(&dev->phy.scan_work, mt7921_scan_work); |
| INIT_DELAYED_WORK(&dev->coredump.work, mt7921_coredump_work); |
| #if IS_ENABLED(CONFIG_IPV6) |
| @@ -461,10 +214,10 @@ int mt7921_register_device(struct mt7921_dev *dev) |
| INIT_WORK(&dev->init_work, mt7921_init_work); |
| |
| INIT_WORK(&dev->phy.roc_work, mt7921_roc_work); |
| - timer_setup(&dev->phy.roc_timer, mt7921_roc_timer, 0); |
| + timer_setup(&dev->phy.roc_timer, mt792x_roc_timer, 0); |
| init_waitqueue_head(&dev->phy.roc_wait); |
| |
| - dev->pm.idle_timeout = MT7921_PM_TIMEOUT; |
| + dev->pm.idle_timeout = MT792x_PM_TIMEOUT; |
| dev->pm.stats.last_wake_event = jiffies; |
| dev->pm.stats.last_doze_event = jiffies; |
| if (!mt76_is_usb(&dev->mt76)) { |
| @@ -477,16 +230,17 @@ int mt7921_register_device(struct mt7921_dev *dev) |
| if (!mt76_is_mmio(&dev->mt76)) |
| hw->extra_tx_headroom += MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; |
| |
| - mt7921_init_acpi_sar(dev); |
| + mt792x_init_acpi_sar(dev); |
| |
| - ret = mt7921_init_wcid(dev); |
| + ret = mt792x_init_wcid(dev); |
| if (ret) |
| return ret; |
| |
| - ret = mt7921_init_wiphy(hw); |
| + ret = mt792x_init_wiphy(hw); |
| if (ret) |
| return ret; |
| |
| + hw->wiphy->reg_notifier = mt7921_regd_notifier; |
| dev->mphy.sband_2g.sband.ht_cap.cap |= |
| IEEE80211_HT_CAP_LDPC_CODING | |
| IEEE80211_HT_CAP_MAX_AMSDU; |
| diff --git a/mt7921/mac.c b/mt7921/mac.c |
| index 368f9271..21f93745 100644 |
| --- a/mt7921/mac.c |
| +++ b/mt7921/mac.c |
| @@ -15,35 +15,7 @@ |
| |
| #define MT_WTBL_AC0_CTT_OFFSET 20 |
| |
| -static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset) |
| -{ |
| - return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4; |
| -} |
| - |
| -static struct mt76_wcid *mt7921_rx_get_wcid(struct mt7921_dev *dev, |
| - u16 idx, bool unicast) |
| -{ |
| - struct mt7921_sta *sta; |
| - struct mt76_wcid *wcid; |
| - |
| - if (idx >= ARRAY_SIZE(dev->mt76.wcid)) |
| - return NULL; |
| - |
| - wcid = rcu_dereference(dev->mt76.wcid[idx]); |
| - if (unicast || !wcid) |
| - return wcid; |
| - |
| - if (!wcid->sta) |
| - return NULL; |
| - |
| - sta = container_of(wcid, struct mt7921_sta, wcid); |
| - if (!sta->vif) |
| - return NULL; |
| - |
| - return &sta->vif->sta.wcid; |
| -} |
| - |
| -bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask) |
| +bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask) |
| { |
| mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, |
| FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); |
| @@ -52,7 +24,12 @@ bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask) |
| 0, 5000); |
| } |
| |
| -static void mt7921_mac_sta_poll(struct mt7921_dev *dev) |
| +static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset) |
| +{ |
| + return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4; |
| +} |
| + |
| +static void mt7921_mac_sta_poll(struct mt792x_dev *dev) |
| { |
| static const u8 ac_to_tid[] = { |
| [IEEE80211_AC_BE] = 0, |
| @@ -61,7 +38,7 @@ static void mt7921_mac_sta_poll(struct mt7921_dev *dev) |
| [IEEE80211_AC_VO] = 6 |
| }; |
| struct ieee80211_sta *sta; |
| - struct mt7921_sta *msta; |
| + struct mt792x_sta *msta; |
| u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS]; |
| LIST_HEAD(sta_poll_list); |
| struct rate_info *rate; |
| @@ -84,7 +61,7 @@ static void mt7921_mac_sta_poll(struct mt7921_dev *dev) |
| break; |
| } |
| msta = list_first_entry(&sta_poll_list, |
| - struct mt7921_sta, wcid.poll_list); |
| + struct mt792x_sta, wcid.poll_list); |
| list_del_init(&msta->wcid.poll_list); |
| spin_unlock_bh(&dev->mt76.sta_poll_lock); |
| |
| @@ -184,54 +161,8 @@ static void mt7921_mac_sta_poll(struct mt7921_dev *dev) |
| } |
| } |
| |
| -static void |
| -mt7921_get_status_freq_info(struct mt7921_dev *dev, struct mt76_phy *mphy, |
| - struct mt76_rx_status *status, u8 chfreq) |
| -{ |
| - if (chfreq > 180) { |
| - status->band = NL80211_BAND_6GHZ; |
| - chfreq = (chfreq - 181) * 4 + 1; |
| - } else if (chfreq > 14) { |
| - status->band = NL80211_BAND_5GHZ; |
| - } else { |
| - status->band = NL80211_BAND_2GHZ; |
| - } |
| - status->freq = ieee80211_channel_to_frequency(chfreq, status->band); |
| -} |
| - |
| -static void |
| -mt7921_mac_rssi_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| -{ |
| - struct sk_buff *skb = priv; |
| - struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb); |
| - |
| - if (status->signal > 0) |
| - return; |
| - |
| - if (!ether_addr_equal(vif->addr, hdr->addr1)) |
| - return; |
| - |
| - ewma_rssi_add(&mvif->rssi, -status->signal); |
| -} |
| - |
| -static void |
| -mt7921_mac_assoc_rssi(struct mt7921_dev *dev, struct sk_buff *skb) |
| -{ |
| - struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb); |
| - |
| - if (!ieee80211_is_assoc_resp(hdr->frame_control) && |
| - !ieee80211_is_auth(hdr->frame_control)) |
| - return; |
| - |
| - ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev), |
| - IEEE80211_IFACE_ITER_RESUME_ALL, |
| - mt7921_mac_rssi_iter, skb); |
| -} |
| - |
| static int |
| -mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM; |
| struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; |
| @@ -240,7 +171,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
| u16 hdr_gap; |
| __le32 *rxv = NULL, *rxd = (__le32 *)skb->data; |
| struct mt76_phy *mphy = &dev->mt76.phy; |
| - struct mt7921_phy *phy = &dev->phy; |
| + struct mt792x_phy *phy = &dev->phy; |
| struct ieee80211_supported_band *sband; |
| u32 csum_status = *(u32 *)skb->cb; |
| u32 rxd0 = le32_to_cpu(rxd[0]); |
| @@ -248,7 +179,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
| u32 rxd2 = le32_to_cpu(rxd[2]); |
| u32 rxd3 = le32_to_cpu(rxd[3]); |
| u32 rxd4 = le32_to_cpu(rxd[4]); |
| - struct mt7921_sta *msta = NULL; |
| + struct mt792x_sta *msta = NULL; |
| u16 seq_ctrl = 0; |
| __le16 fc = 0; |
| u8 mode = 0; |
| @@ -276,10 +207,10 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
| chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3); |
| unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M; |
| idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1); |
| - status->wcid = mt7921_rx_get_wcid(dev, idx, unicast); |
| + status->wcid = mt792x_rx_get_wcid(dev, idx, unicast); |
| |
| if (status->wcid) { |
| - msta = container_of(status->wcid, struct mt7921_sta, wcid); |
| + msta = container_of(status->wcid, struct mt792x_sta, wcid); |
| spin_lock_bh(&dev->mt76.sta_poll_lock); |
| if (list_empty(&msta->wcid.poll_list)) |
| list_add_tail(&msta->wcid.poll_list, |
| @@ -287,7 +218,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
| spin_unlock_bh(&dev->mt76.sta_poll_lock); |
| } |
| |
| - mt7921_get_status_freq_info(dev, mphy, status, chfreq); |
| + mt792x_get_status_freq_info(status, chfreq); |
| |
| switch (status->band) { |
| case NL80211_BAND_5GHZ: |
| @@ -496,7 +427,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
| status->flag |= RX_FLAG_8023; |
| } |
| |
| - mt7921_mac_assoc_rssi(dev, skb); |
| + mt792x_mac_assoc_rssi(dev, skb); |
| |
| if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023)) |
| mt76_connac2_mac_decode_he_radiotap(&dev->mt76, skb, rxv, mode); |
| @@ -511,9 +442,9 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) |
| return 0; |
| } |
| |
| -void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data) |
| +void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data) |
| { |
| - struct mt7921_sta *msta = NULL; |
| + struct mt792x_sta *msta = NULL; |
| struct mt76_wcid *wcid; |
| __le32 *txs_data = data; |
| u16 wcidx; |
| @@ -528,7 +459,7 @@ void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data) |
| if (pid < MT_PACKET_ID_FIRST) |
| return; |
| |
| - if (wcidx >= MT7921_WTBL_SIZE) |
| + if (wcidx >= MT792x_WTBL_SIZE) |
| return; |
| |
| rcu_read_lock(); |
| @@ -537,7 +468,7 @@ void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data) |
| if (!wcid) |
| goto out; |
| |
| - msta = container_of(wcid, struct mt7921_sta, wcid); |
| + msta = container_of(wcid, struct mt792x_sta, wcid); |
| |
| mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data); |
| if (!wcid->sta) |
| @@ -552,7 +483,7 @@ out: |
| rcu_read_unlock(); |
| } |
| |
| -static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len) |
| +static void mt7921_mac_tx_free(struct mt792x_dev *dev, void *data, int len) |
| { |
| struct mt76_connac_tx_free *free = data; |
| __le32 *tx_info = (__le32 *)(data + sizeof(*free)); |
| @@ -582,7 +513,7 @@ static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len) |
| * 1'b0: msdu_id with the same 'wcid pair' as above. |
| */ |
| if (info & MT_TX_FREE_PAIR) { |
| - struct mt7921_sta *msta; |
| + struct mt792x_sta *msta; |
| u16 idx; |
| |
| count++; |
| @@ -592,7 +523,7 @@ static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len) |
| if (!sta) |
| continue; |
| |
| - msta = container_of(wcid, struct mt7921_sta, wcid); |
| + msta = container_of(wcid, struct mt792x_sta, wcid); |
| spin_lock_bh(&mdev->sta_poll_lock); |
| if (list_empty(&msta->wcid.poll_list)) |
| list_add_tail(&msta->wcid.poll_list, |
| @@ -634,7 +565,7 @@ static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len) |
| |
| bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| __le32 *rxd = (__le32 *)data; |
| __le32 *end = (__le32 *)&rxd[len / 4]; |
| enum rx_pkt_type type; |
| @@ -659,7 +590,7 @@ EXPORT_SYMBOL_GPL(mt7921_rx_check); |
| void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, |
| struct sk_buff *skb, u32 *info) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| __le32 *rxd = (__le32 *)skb->data; |
| __le32 *end = (__le32 *)&skb->data[skb->len]; |
| enum rx_pkt_type type; |
| @@ -699,128 +630,12 @@ void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, |
| } |
| EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb); |
| |
| -void mt7921_mac_reset_counters(struct mt7921_phy *phy) |
| -{ |
| - struct mt7921_dev *dev = phy->dev; |
| - int i; |
| - |
| - for (i = 0; i < 4; i++) { |
| - mt76_rr(dev, MT_TX_AGG_CNT(0, i)); |
| - mt76_rr(dev, MT_TX_AGG_CNT2(0, i)); |
| - } |
| - |
| - dev->mt76.phy.survey_time = ktime_get_boottime(); |
| - memset(phy->mt76->aggr_stats, 0, sizeof(phy->mt76->aggr_stats)); |
| - |
| - /* reset airtime counters */ |
| - mt76_rr(dev, MT_MIB_SDR9(0)); |
| - mt76_rr(dev, MT_MIB_SDR36(0)); |
| - mt76_rr(dev, MT_MIB_SDR37(0)); |
| - |
| - mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); |
| - mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); |
| -} |
| - |
| -void mt7921_mac_set_timing(struct mt7921_phy *phy) |
| -{ |
| - s16 coverage_class = phy->coverage_class; |
| - struct mt7921_dev *dev = phy->dev; |
| - u32 val, reg_offset; |
| - u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) | |
| - FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); |
| - u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) | |
| - FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28); |
| - bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; |
| - int sifs = is_2ghz ? 10 : 16, offset; |
| - |
| - if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) |
| - return; |
| - |
| - mt76_set(dev, MT_ARB_SCR(0), |
| - MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); |
| - udelay(1); |
| - |
| - offset = 3 * coverage_class; |
| - reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) | |
| - FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset); |
| - |
| - mt76_wr(dev, MT_TMAC_CDTR(0), cck + reg_offset); |
| - mt76_wr(dev, MT_TMAC_ODTR(0), ofdm + reg_offset); |
| - mt76_wr(dev, MT_TMAC_ICR0(0), |
| - FIELD_PREP(MT_IFS_EIFS, 360) | |
| - FIELD_PREP(MT_IFS_RIFS, 2) | |
| - FIELD_PREP(MT_IFS_SIFS, sifs) | |
| - FIELD_PREP(MT_IFS_SLOT, phy->slottime)); |
| - |
| - if (phy->slottime < 20 || !is_2ghz) |
| - val = MT7921_CFEND_RATE_DEFAULT; |
| - else |
| - val = MT7921_CFEND_RATE_11B; |
| - |
| - mt76_rmw_field(dev, MT_AGG_ACR0(0), MT_AGG_ACR_CFEND_RATE, val); |
| - mt76_clear(dev, MT_ARB_SCR(0), |
| - MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); |
| -} |
| - |
| -static u8 |
| -mt7921_phy_get_nf(struct mt7921_phy *phy, int idx) |
| -{ |
| - return 0; |
| -} |
| - |
| -static void |
| -mt7921_phy_update_channel(struct mt76_phy *mphy, int idx) |
| -{ |
| - struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76); |
| - struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv; |
| - struct mt76_channel_state *state; |
| - u64 busy_time, tx_time, rx_time, obss_time; |
| - int nf; |
| - |
| - busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx), |
| - MT_MIB_SDR9_BUSY_MASK); |
| - tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx), |
| - MT_MIB_SDR36_TXTIME_MASK); |
| - rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx), |
| - MT_MIB_SDR37_RXTIME_MASK); |
| - obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx), |
| - MT_MIB_OBSSTIME_MASK); |
| - |
| - nf = mt7921_phy_get_nf(phy, idx); |
| - if (!phy->noise) |
| - phy->noise = nf << 4; |
| - else if (nf) |
| - phy->noise += nf - (phy->noise >> 4); |
| - |
| - state = mphy->chan_state; |
| - state->cc_busy += busy_time; |
| - state->cc_tx += tx_time; |
| - state->cc_rx += rx_time + obss_time; |
| - state->cc_bss_rx += rx_time; |
| - state->noise = -(phy->noise >> 4); |
| -} |
| - |
| -void mt7921_update_channel(struct mt76_phy *mphy) |
| -{ |
| - struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76); |
| - |
| - if (mt76_connac_pm_wake(mphy, &dev->pm)) |
| - return; |
| - |
| - mt7921_phy_update_channel(mphy, 0); |
| - /* reset obss airtime */ |
| - mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); |
| - |
| - mt76_connac_power_save_sched(mphy, &dev->pm); |
| -} |
| -EXPORT_SYMBOL_GPL(mt7921_update_channel); |
| - |
| static void |
| mt7921_vif_connect_iter(void *priv, u8 *mac, |
| struct ieee80211_vif *vif) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mvif->phy->dev; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mvif->phy->dev; |
| struct ieee80211_hw *hw = mt76_hw(dev); |
| |
| if (vif->type == NL80211_IFTYPE_STATION) |
| @@ -841,7 +656,7 @@ mt7921_vif_connect_iter(void *priv, u8 *mac, |
| /* system error recovery */ |
| void mt7921_mac_reset_work(struct work_struct *work) |
| { |
| - struct mt7921_dev *dev = container_of(work, struct mt7921_dev, |
| + struct mt792x_dev *dev = container_of(work, struct mt792x_dev, |
| reset_work); |
| struct ieee80211_hw *hw = mt76_hw(dev); |
| struct mt76_connac_pm *pm = &dev->pm; |
| @@ -857,7 +672,7 @@ void mt7921_mac_reset_work(struct work_struct *work) |
| |
| for (i = 0; i < 10; i++) { |
| mutex_lock(&dev->mt76.mutex); |
| - ret = mt7921_dev_reset(dev); |
| + ret = mt792x_dev_reset(dev); |
| mutex_unlock(&dev->mt76.mutex); |
| |
| if (!ret) |
| @@ -884,185 +699,12 @@ void mt7921_mac_reset_work(struct work_struct *work) |
| mt76_connac_power_save_sched(&dev->mt76.phy, pm); |
| } |
| |
| -void mt7921_reset(struct mt76_dev *mdev) |
| -{ |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| - struct mt76_connac_pm *pm = &dev->pm; |
| - |
| - if (!dev->hw_init_done) |
| - return; |
| - |
| - if (dev->hw_full_reset) |
| - return; |
| - |
| - if (pm->suspended) |
| - return; |
| - |
| - queue_work(dev->mt76.wq, &dev->reset_work); |
| -} |
| -EXPORT_SYMBOL_GPL(mt7921_reset); |
| - |
| -void mt7921_mac_update_mib_stats(struct mt7921_phy *phy) |
| -{ |
| - struct mt76_mib_stats *mib = &phy->mib; |
| - struct mt7921_dev *dev = phy->dev; |
| - int i, aggr0 = 0, aggr1; |
| - u32 val; |
| - |
| - mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0), |
| - MT_MIB_SDR3_FCS_ERR_MASK); |
| - mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0), |
| - MT_MIB_ACK_FAIL_COUNT_MASK); |
| - mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0), |
| - MT_MIB_BA_FAIL_COUNT_MASK); |
| - mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0), |
| - MT_MIB_RTS_COUNT_MASK); |
| - mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0), |
| - MT_MIB_RTS_FAIL_COUNT_MASK); |
| - |
| - mib->tx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR12(0)); |
| - mib->tx_mpdu_attempts_cnt += mt76_rr(dev, MT_MIB_SDR14(0)); |
| - mib->tx_mpdu_success_cnt += mt76_rr(dev, MT_MIB_SDR15(0)); |
| - |
| - val = mt76_rr(dev, MT_MIB_SDR32(0)); |
| - mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR9_EBF_CNT_MASK, val); |
| - mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR9_IBF_CNT_MASK, val); |
| - |
| - val = mt76_rr(dev, MT_ETBF_TX_APP_CNT(0)); |
| - mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, val); |
| - mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, val); |
| - |
| - val = mt76_rr(dev, MT_ETBF_RX_FB_CNT(0)); |
| - mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, val); |
| - mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, val); |
| - mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, val); |
| - mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, val); |
| - |
| - mib->rx_mpdu_cnt += mt76_rr(dev, MT_MIB_SDR5(0)); |
| - mib->rx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR22(0)); |
| - mib->rx_ampdu_bytes_cnt += mt76_rr(dev, MT_MIB_SDR23(0)); |
| - mib->rx_ba_cnt += mt76_rr(dev, MT_MIB_SDR31(0)); |
| - |
| - for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { |
| - val = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i)); |
| - mib->tx_amsdu[i] += val; |
| - mib->tx_amsdu_cnt += val; |
| - } |
| - |
| - for (i = 0, aggr1 = aggr0 + 8; i < 4; i++) { |
| - u32 val2; |
| - |
| - val = mt76_rr(dev, MT_TX_AGG_CNT(0, i)); |
| - val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i)); |
| - |
| - phy->mt76->aggr_stats[aggr0++] += val & 0xffff; |
| - phy->mt76->aggr_stats[aggr0++] += val >> 16; |
| - phy->mt76->aggr_stats[aggr1++] += val2 & 0xffff; |
| - phy->mt76->aggr_stats[aggr1++] += val2 >> 16; |
| - } |
| -} |
| - |
| -void mt7921_mac_work(struct work_struct *work) |
| -{ |
| - struct mt7921_phy *phy; |
| - struct mt76_phy *mphy; |
| - |
| - mphy = (struct mt76_phy *)container_of(work, struct mt76_phy, |
| - mac_work.work); |
| - phy = mphy->priv; |
| - |
| - mt7921_mutex_acquire(phy->dev); |
| - |
| - mt76_update_survey(mphy); |
| - if (++mphy->mac_work_count == 2) { |
| - mphy->mac_work_count = 0; |
| - |
| - mt7921_mac_update_mib_stats(phy); |
| - } |
| - |
| - mt7921_mutex_release(phy->dev); |
| - |
| - mt76_tx_status_check(mphy->dev, false); |
| - ieee80211_queue_delayed_work(phy->mt76->hw, &mphy->mac_work, |
| - MT7921_WATCHDOG_TIME); |
| -} |
| - |
| -void mt7921_pm_wake_work(struct work_struct *work) |
| -{ |
| - struct mt7921_dev *dev; |
| - struct mt76_phy *mphy; |
| - |
| - dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev, |
| - pm.wake_work); |
| - mphy = dev->phy.mt76; |
| - |
| - if (!mt7921_mcu_drv_pmctrl(dev)) { |
| - struct mt76_dev *mdev = &dev->mt76; |
| - int i; |
| - |
| - if (mt76_is_sdio(mdev)) { |
| - mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); |
| - mt76_worker_schedule(&mdev->sdio.txrx_worker); |
| - } else { |
| - local_bh_disable(); |
| - mt76_for_each_q_rx(mdev, i) |
| - napi_schedule(&mdev->napi[i]); |
| - local_bh_enable(); |
| - mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); |
| - mt76_connac_tx_cleanup(mdev); |
| - } |
| - if (test_bit(MT76_STATE_RUNNING, &mphy->state)) |
| - ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work, |
| - MT7921_WATCHDOG_TIME); |
| - } |
| - |
| - ieee80211_wake_queues(mphy->hw); |
| - wake_up(&dev->pm.wait); |
| -} |
| - |
| -void mt7921_pm_power_save_work(struct work_struct *work) |
| -{ |
| - struct mt7921_dev *dev; |
| - unsigned long delta; |
| - struct mt76_phy *mphy; |
| - |
| - dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev, |
| - pm.ps_work.work); |
| - mphy = dev->phy.mt76; |
| - |
| - delta = dev->pm.idle_timeout; |
| - if (test_bit(MT76_HW_SCANNING, &mphy->state) || |
| - test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) || |
| - dev->fw_assert) |
| - goto out; |
| - |
| - if (mutex_is_locked(&dev->mt76.mutex)) |
| - /* if mt76 mutex is held we should not put the device |
| - * to sleep since we are currently accessing device |
| - * register map. We need to wait for the next power_save |
| - * trigger. |
| - */ |
| - goto out; |
| - |
| - if (time_is_after_jiffies(dev->pm.last_activity + delta)) { |
| - delta = dev->pm.last_activity + delta - jiffies; |
| - goto out; |
| - } |
| - |
| - if (!mt7921_mcu_fw_pmctrl(dev)) { |
| - cancel_delayed_work_sync(&mphy->mac_work); |
| - return; |
| - } |
| -out: |
| - queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta); |
| -} |
| - |
| void mt7921_coredump_work(struct work_struct *work) |
| { |
| - struct mt7921_dev *dev; |
| + struct mt792x_dev *dev; |
| char *dump, *data; |
| |
| - dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev, |
| + dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev, |
| coredump.work.work); |
| |
| if (time_is_after_jiffies(dev->coredump.last_activity + |
| @@ -1101,12 +743,12 @@ void mt7921_coredump_work(struct work_struct *work) |
| dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ, |
| GFP_KERNEL); |
| |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| } |
| |
| /* usb_sdio */ |
| static void |
| -mt7921_usb_sdio_write_txwi(struct mt7921_dev *dev, struct mt76_wcid *wcid, |
| +mt7921_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid, |
| enum mt76_txq_id qid, struct ieee80211_sta *sta, |
| struct ieee80211_key_conf *key, int pid, |
| struct sk_buff *skb) |
| @@ -1123,7 +765,7 @@ int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, |
| struct ieee80211_sta *sta, |
| struct mt76_tx_info *tx_info) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); |
| struct ieee80211_key_conf *key = info->control.hw_key; |
| struct sk_buff *skb = tx_info->skb; |
| @@ -1140,7 +782,7 @@ int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, |
| wcid = &dev->mt76.global_wcid; |
| |
| if (sta) { |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| |
| if (time_after(jiffies, msta->last_txs + HZ / 4)) { |
| info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; |
| @@ -1189,11 +831,11 @@ EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb); |
| |
| bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt7921_mac_sta_poll(dev); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return false; |
| } |
| @@ -1202,8 +844,8 @@ EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data); |
| #if IS_ENABLED(CONFIG_IPV6) |
| void mt7921_set_ipv6_ns_work(struct work_struct *work) |
| { |
| - struct mt7921_dev *dev = container_of(work, struct mt7921_dev, |
| - ipv6_ns_work); |
| + struct mt792x_dev *dev = container_of(work, struct mt792x_dev, |
| + ipv6_ns_work); |
| struct sk_buff *skb; |
| int ret = 0; |
| |
| @@ -1213,10 +855,10 @@ void mt7921_set_ipv6_ns_work(struct work_struct *work) |
| if (!skb) |
| break; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| MCU_UNI_CMD(OFFLOAD), true); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| } while (!ret); |
| |
| diff --git a/mt7921/main.c b/mt7921/main.c |
| index 87067ac3..0844d28b 100644 |
| --- a/mt7921/main.c |
| +++ b/mt7921/main.c |
| @@ -10,7 +10,7 @@ |
| #include "mcu.h" |
| |
| static int |
| -mt7921_init_he_caps(struct mt7921_phy *phy, enum nl80211_band band, |
| +mt7921_init_he_caps(struct mt792x_phy *phy, enum nl80211_band band, |
| struct ieee80211_sband_iftype_data *data) |
| { |
| int i, idx = 0; |
| @@ -185,7 +185,7 @@ mt7921_init_he_caps(struct mt7921_phy *phy, enum nl80211_band band, |
| return idx; |
| } |
| |
| -void mt7921_set_stream_he_caps(struct mt7921_phy *phy) |
| +void mt7921_set_stream_he_caps(struct mt792x_phy *phy) |
| { |
| struct ieee80211_sband_iftype_data *data; |
| struct ieee80211_supported_band *band; |
| @@ -219,7 +219,7 @@ void mt7921_set_stream_he_caps(struct mt7921_phy *phy) |
| } |
| } |
| |
| -int __mt7921_start(struct mt7921_phy *phy) |
| +int __mt7921_start(struct mt792x_phy *phy) |
| { |
| struct mt76_phy *mphy = phy->mt76; |
| int err; |
| @@ -240,11 +240,11 @@ int __mt7921_start(struct mt7921_phy *phy) |
| if (err) |
| return err; |
| |
| - mt7921_mac_reset_counters(phy); |
| + mt792x_mac_reset_counters(phy); |
| set_bit(MT76_STATE_RUNNING, &mphy->state); |
| |
| ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work, |
| - MT7921_WATCHDOG_TIME); |
| + MT792x_WATCHDOG_TIME); |
| |
| return 0; |
| } |
| @@ -252,20 +252,20 @@ EXPORT_SYMBOL_GPL(__mt7921_start); |
| |
| static int mt7921_start(struct ieee80211_hw *hw) |
| { |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| int err; |
| |
| - mt7921_mutex_acquire(phy->dev); |
| + mt792x_mutex_acquire(phy->dev); |
| err = __mt7921_start(phy); |
| - mt7921_mutex_release(phy->dev); |
| + mt792x_mutex_release(phy->dev); |
| |
| return err; |
| } |
| |
| void mt7921_stop(struct ieee80211_hw *hw) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| |
| cancel_delayed_work_sync(&phy->mt76->mac_work); |
| |
| @@ -274,26 +274,26 @@ void mt7921_stop(struct ieee80211_hw *hw) |
| cancel_work_sync(&dev->reset_work); |
| mt76_connac_free_pending_tx_skbs(&dev->pm, NULL); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| clear_bit(MT76_STATE_RUNNING, &phy->mt76->state); |
| mt76_connac_mcu_set_mac_enable(&dev->mt76, 0, false, false); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| EXPORT_SYMBOL_GPL(mt7921_stop); |
| |
| -static int mt7921_add_interface(struct ieee80211_hw *hw, |
| - struct ieee80211_vif *vif) |
| +static int |
| +mt7921_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| struct mt76_txq *mtxq; |
| int idx, ret = 0; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| mvif->mt76.idx = __ffs64(~dev->mt76.vif_mask); |
| - if (mvif->mt76.idx >= MT7921_MAX_INTERFACES) { |
| + if (mvif->mt76.idx >= MT792x_MAX_INTERFACES) { |
| ret = -ENOSPC; |
| goto out; |
| } |
| @@ -311,7 +311,7 @@ static int mt7921_add_interface(struct ieee80211_hw *hw, |
| dev->mt76.vif_mask |= BIT_ULL(mvif->mt76.idx); |
| phy->omac_mask |= BIT_ULL(mvif->mt76.omac_idx); |
| |
| - idx = MT7921_WTBL_RESERVED - mvif->mt76.idx; |
| + idx = MT792x_WTBL_RESERVED - mvif->mt76.idx; |
| |
| INIT_LIST_HEAD(&mvif->sta.wcid.poll_list); |
| mvif->sta.wcid.idx = idx; |
| @@ -333,89 +333,55 @@ static int mt7921_add_interface(struct ieee80211_hw *hw, |
| |
| vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER; |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return ret; |
| } |
| |
| -static void mt7921_remove_interface(struct ieee80211_hw *hw, |
| - struct ieee80211_vif *vif) |
| -{ |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_sta *msta = &mvif->sta; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - int idx = msta->wcid.idx; |
| - |
| - mt7921_mutex_acquire(dev); |
| - mt76_connac_free_pending_tx_skbs(&dev->pm, &msta->wcid); |
| - mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, false); |
| - |
| - rcu_assign_pointer(dev->mt76.wcid[idx], NULL); |
| - |
| - dev->mt76.vif_mask &= ~BIT_ULL(mvif->mt76.idx); |
| - phy->omac_mask &= ~BIT_ULL(mvif->mt76.omac_idx); |
| - mt7921_mutex_release(dev); |
| - |
| - spin_lock_bh(&dev->mt76.sta_poll_lock); |
| - if (!list_empty(&msta->wcid.poll_list)) |
| - list_del_init(&msta->wcid.poll_list); |
| - spin_unlock_bh(&dev->mt76.sta_poll_lock); |
| - |
| - mt76_packet_id_flush(&dev->mt76, &msta->wcid); |
| -} |
| - |
| static void mt7921_roc_iter(void *priv, u8 *mac, |
| struct ieee80211_vif *vif) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_phy *phy = priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_phy *phy = priv; |
| |
| mt7921_mcu_abort_roc(phy, mvif, phy->roc_token_id); |
| } |
| |
| void mt7921_roc_work(struct work_struct *work) |
| { |
| - struct mt7921_phy *phy; |
| + struct mt792x_phy *phy; |
| |
| - phy = (struct mt7921_phy *)container_of(work, struct mt7921_phy, |
| + phy = (struct mt792x_phy *)container_of(work, struct mt792x_phy, |
| roc_work); |
| |
| if (!test_and_clear_bit(MT76_STATE_ROC, &phy->mt76->state)) |
| return; |
| |
| - mt7921_mutex_acquire(phy->dev); |
| + mt792x_mutex_acquire(phy->dev); |
| ieee80211_iterate_active_interfaces(phy->mt76->hw, |
| IEEE80211_IFACE_ITER_RESUME_ALL, |
| mt7921_roc_iter, phy); |
| - mt7921_mutex_release(phy->dev); |
| + mt792x_mutex_release(phy->dev); |
| ieee80211_remain_on_channel_expired(phy->mt76->hw); |
| } |
| |
| -void mt7921_roc_timer(struct timer_list *timer) |
| -{ |
| - struct mt7921_phy *phy = from_timer(phy, timer, roc_timer); |
| - |
| - ieee80211_queue_work(phy->mt76->hw, &phy->roc_work); |
| -} |
| - |
| -static int mt7921_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif) |
| +static int mt7921_abort_roc(struct mt792x_phy *phy, struct mt792x_vif *vif) |
| { |
| int err = 0; |
| |
| del_timer_sync(&phy->roc_timer); |
| cancel_work_sync(&phy->roc_work); |
| |
| - mt7921_mutex_acquire(phy->dev); |
| + mt792x_mutex_acquire(phy->dev); |
| if (test_and_clear_bit(MT76_STATE_ROC, &phy->mt76->state)) |
| err = mt7921_mcu_abort_roc(phy, vif, phy->roc_token_id); |
| - mt7921_mutex_release(phy->dev); |
| + mt792x_mutex_release(phy->dev); |
| |
| return err; |
| } |
| |
| -static int mt7921_set_roc(struct mt7921_phy *phy, |
| - struct mt7921_vif *vif, |
| +static int mt7921_set_roc(struct mt792x_phy *phy, |
| + struct mt792x_vif *vif, |
| struct ieee80211_channel *chan, |
| int duration, |
| enum mt7921_roc_req type) |
| @@ -450,13 +416,13 @@ static int mt7921_remain_on_channel(struct ieee80211_hw *hw, |
| int duration, |
| enum ieee80211_roc_type type) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| int err; |
| |
| - mt7921_mutex_acquire(phy->dev); |
| + mt792x_mutex_acquire(phy->dev); |
| err = mt7921_set_roc(phy, mvif, chan, duration, MT7921_ROC_REQ_ROC); |
| - mt7921_mutex_release(phy->dev); |
| + mt792x_mutex_release(phy->dev); |
| |
| return err; |
| } |
| @@ -464,20 +430,20 @@ static int mt7921_remain_on_channel(struct ieee80211_hw *hw, |
| static int mt7921_cancel_remain_on_channel(struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| |
| return mt7921_abort_roc(phy, mvif); |
| } |
| |
| -static int mt7921_set_channel(struct mt7921_phy *phy) |
| +static int mt7921_set_channel(struct mt792x_phy *phy) |
| { |
| - struct mt7921_dev *dev = phy->dev; |
| + struct mt792x_dev *dev = phy->dev; |
| int ret; |
| |
| cancel_delayed_work_sync(&phy->mt76->mac_work); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| set_bit(MT76_RESET, &phy->mt76->state); |
| |
| mt76_set_channel(phy->mt76); |
| @@ -486,18 +452,18 @@ static int mt7921_set_channel(struct mt7921_phy *phy) |
| if (ret) |
| goto out; |
| |
| - mt7921_mac_set_timing(phy); |
| + mt792x_mac_set_timeing(phy); |
| |
| - mt7921_mac_reset_counters(phy); |
| + mt792x_mac_reset_counters(phy); |
| phy->noise = 0; |
| |
| out: |
| clear_bit(MT76_RESET, &phy->mt76->state); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| mt76_worker_schedule(&dev->mt76.tx_worker); |
| ieee80211_queue_delayed_work(phy->mt76->hw, &phy->mt76->mac_work, |
| - MT7921_WATCHDOG_TIME); |
| + MT792x_WATCHDOG_TIME); |
| |
| return ret; |
| } |
| @@ -506,9 +472,9 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
| struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
| struct ieee80211_key_conf *key) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_sta *msta = sta ? (struct mt7921_sta *)sta->drv_priv : |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_sta *msta = sta ? (struct mt792x_sta *)sta->drv_priv : |
| &mvif->sta; |
| struct mt76_wcid *wcid = &msta->wcid; |
| u8 *wcid_keyidx = &wcid->hw_key_idx; |
| @@ -546,7 +512,7 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
| return -EOPNOTSUPP; |
| } |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| if (cmd == SET_KEY) { |
| *wcid_keyidx = idx; |
| @@ -570,7 +536,7 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
| key, MCU_UNI_CMD(STA_REC_UPDATE), |
| &mvif->wep_sta->wcid, cmd); |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return err; |
| } |
| @@ -578,7 +544,7 @@ out: |
| static void |
| mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| { |
| - struct mt7921_dev *dev = priv; |
| + struct mt792x_dev *dev = priv; |
| struct ieee80211_hw *hw = mt76_hw(dev); |
| bool pm_enable = dev->pm.enable; |
| int err; |
| @@ -599,7 +565,7 @@ mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| static void |
| mt7921_sniffer_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| { |
| - struct mt7921_dev *dev = priv; |
| + struct mt792x_dev *dev = priv; |
| struct ieee80211_hw *hw = mt76_hw(dev); |
| struct mt76_connac_pm *pm = &dev->pm; |
| bool monitor = !!(hw->conf.flags & IEEE80211_CONF_MONITOR); |
| @@ -614,7 +580,7 @@ mt7921_sniffer_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| mt7921_mcu_set_beacon_filter(dev, vif, false); |
| } |
| |
| -void mt7921_set_runtime_pm(struct mt7921_dev *dev) |
| +void mt7921_set_runtime_pm(struct mt792x_dev *dev) |
| { |
| struct ieee80211_hw *hw = mt76_hw(dev); |
| struct mt76_connac_pm *pm = &dev->pm; |
| @@ -630,8 +596,8 @@ void mt7921_set_runtime_pm(struct mt7921_dev *dev) |
| |
| static int mt7921_config(struct ieee80211_hw *hw, u32 changed) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| int ret = 0; |
| |
| if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { |
| @@ -642,7 +608,7 @@ static int mt7921_config(struct ieee80211_hw *hw, u32 changed) |
| ieee80211_wake_queues(hw); |
| } |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| if (changed & IEEE80211_CONF_CHANGE_POWER) { |
| ret = mt7921_set_tx_sar_pwr(hw, NULL); |
| @@ -657,25 +623,11 @@ static int mt7921_config(struct ieee80211_hw *hw, u32 changed) |
| } |
| |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return ret; |
| } |
| |
| -static int |
| -mt7921_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| - unsigned int link_id, u16 queue, |
| - const struct ieee80211_tx_queue_params *params) |
| -{ |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - |
| - /* no need to update right away, we'll get BSS_CHANGED_QOS */ |
| - queue = mt76_connac_lmac_mapping(queue); |
| - mvif->queue_params[queue] = *params; |
| - |
| - return 0; |
| -} |
| - |
| static void mt7921_configure_filter(struct ieee80211_hw *hw, |
| unsigned int changed_flags, |
| unsigned int *total_flags, |
| @@ -686,7 +638,7 @@ static void mt7921_configure_filter(struct ieee80211_hw *hw, |
| #define MT7921_FILTER_OTHER_BSS BIT(6) |
| #define MT7921_FILTER_ENABLE BIT(31) |
| |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| u32 flags = MT7921_FILTER_ENABLE; |
| |
| #define MT7921_FILTER(_fif, _type) do { \ |
| @@ -698,9 +650,9 @@ static void mt7921_configure_filter(struct ieee80211_hw *hw, |
| MT7921_FILTER(FIF_CONTROL, CONTROL); |
| MT7921_FILTER(FIF_OTHER_BSS, OTHER_BSS); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt7921_mcu_set_rxfilter(dev, flags, 0, 0); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| *total_flags &= (FIF_OTHER_BSS | FIF_FCSFAIL | FIF_CONTROL); |
| } |
| @@ -710,17 +662,17 @@ static void mt7921_bss_info_changed(struct ieee80211_hw *hw, |
| struct ieee80211_bss_conf *info, |
| u64 changed) |
| { |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| if (changed & BSS_CHANGED_ERP_SLOT) { |
| int slottime = info->use_short_slot ? 9 : 20; |
| |
| if (slottime != phy->slottime) { |
| phy->slottime = slottime; |
| - mt7921_mac_set_timing(phy); |
| + mt792x_mac_set_timeing(phy); |
| } |
| } |
| |
| @@ -743,24 +695,24 @@ static void mt7921_bss_info_changed(struct ieee80211_hw *hw, |
| } |
| |
| if (changed & BSS_CHANGED_ARP_FILTER) { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| |
| mt76_connac_mcu_update_arp_filter(&dev->mt76, &mvif->mt76, |
| info); |
| } |
| |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| |
| int mt7921_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| int ret, idx; |
| |
| - idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7921_WTBL_STA - 1); |
| + idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT792x_WTBL_STA - 1); |
| if (idx < 0) |
| return -ENOSPC; |
| |
| @@ -796,11 +748,11 @@ EXPORT_SYMBOL_GPL(mt7921_mac_sta_add); |
| void mt7921_mac_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) |
| mt76_connac_mcu_uni_add_bss(&dev->mphy, vif, &mvif->sta.wcid, |
| @@ -814,15 +766,15 @@ void mt7921_mac_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| |
| mt7921_mcu_sta_update(dev, sta, vif, true, MT76_STA_INFO_STATE_ASSOC); |
| |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| EXPORT_SYMBOL_GPL(mt7921_mac_sta_assoc); |
| |
| void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| |
| mt76_connac_free_pending_tx_skbs(&dev->pm, &msta->wcid); |
| mt76_connac_pm_wake(&dev->mphy, &dev->pm); |
| @@ -832,7 +784,7 @@ void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| MT_WTBL_UPDATE_ADM_COUNT_CLEAR); |
| |
| if (vif->type == NL80211_IFTYPE_STATION) { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| |
| mvif->wep_sta = NULL; |
| ewma_rssi_init(&mvif->rssi); |
| @@ -851,67 +803,13 @@ void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| } |
| EXPORT_SYMBOL_GPL(mt7921_mac_sta_remove); |
| |
| -void mt7921_tx_worker(struct mt76_worker *w) |
| -{ |
| - struct mt7921_dev *dev = container_of(w, struct mt7921_dev, |
| - mt76.tx_worker); |
| - |
| - if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { |
| - queue_work(dev->mt76.wq, &dev->pm.wake_work); |
| - return; |
| - } |
| - |
| - mt76_txq_schedule_all(&dev->mphy); |
| - mt76_connac_pm_unref(&dev->mphy, &dev->pm); |
| -} |
| - |
| -static void mt7921_tx(struct ieee80211_hw *hw, |
| - struct ieee80211_tx_control *control, |
| - struct sk_buff *skb) |
| -{ |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt76_phy *mphy = hw->priv; |
| - struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
| - struct ieee80211_vif *vif = info->control.vif; |
| - struct mt76_wcid *wcid = &dev->mt76.global_wcid; |
| - int qid; |
| - |
| - if (control->sta) { |
| - struct mt7921_sta *sta; |
| - |
| - sta = (struct mt7921_sta *)control->sta->drv_priv; |
| - wcid = &sta->wcid; |
| - } |
| - |
| - if (vif && !control->sta) { |
| - struct mt7921_vif *mvif; |
| - |
| - mvif = (struct mt7921_vif *)vif->drv_priv; |
| - wcid = &mvif->sta.wcid; |
| - } |
| - |
| - if (mt76_connac_pm_ref(mphy, &dev->pm)) { |
| - mt76_tx(mphy, control->sta, wcid, skb); |
| - mt76_connac_pm_unref(mphy, &dev->pm); |
| - return; |
| - } |
| - |
| - qid = skb_get_queue_mapping(skb); |
| - if (qid >= MT_TXQ_PSD) { |
| - qid = IEEE80211_AC_BE; |
| - skb_set_queue_mapping(skb, qid); |
| - } |
| - |
| - mt76_connac_pm_queue_skb(hw, &dev->pm, wcid, skb); |
| -} |
| - |
| static int mt7921_set_rts_threshold(struct ieee80211_hw *hw, u32 val) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt76_connac_mcu_set_rts_thresh(&dev->mt76, val, 0); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| @@ -921,10 +819,10 @@ mt7921_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| struct ieee80211_ampdu_params *params) |
| { |
| enum ieee80211_ampdu_mlme_action action = params->action; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| struct ieee80211_sta *sta = params->sta; |
| struct ieee80211_txq *txq = sta->txq[params->tid]; |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| u16 tid = params->tid; |
| u16 ssn = params->ssn; |
| struct mt76_txq *mtxq; |
| @@ -935,7 +833,7 @@ mt7921_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| |
| mtxq = (struct mt76_txq *)txq->drv_priv; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| switch (action) { |
| case IEEE80211_AMPDU_RX_START: |
| mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn, |
| @@ -968,7 +866,7 @@ mt7921_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); |
| break; |
| } |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return ret; |
| } |
| @@ -979,293 +877,22 @@ static int mt7921_sta_state(struct ieee80211_hw *hw, |
| enum ieee80211_sta_state old_state, |
| enum ieee80211_sta_state new_state) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| |
| if (dev->pm.ds_enable) { |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt76_connac_sta_state_dp(&dev->mt76, old_state, new_state); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| |
| return mt76_sta_state(hw, vif, sta, old_state, new_state); |
| } |
| |
| -static int |
| -mt7921_get_stats(struct ieee80211_hw *hw, |
| - struct ieee80211_low_level_stats *stats) |
| -{ |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - struct mt76_mib_stats *mib = &phy->mib; |
| - |
| - mt7921_mutex_acquire(phy->dev); |
| - |
| - stats->dot11RTSSuccessCount = mib->rts_cnt; |
| - stats->dot11RTSFailureCount = mib->rts_retries_cnt; |
| - stats->dot11FCSErrorCount = mib->fcs_err_cnt; |
| - stats->dot11ACKFailureCount = mib->ack_fail_cnt; |
| - |
| - mt7921_mutex_release(phy->dev); |
| - |
| - return 0; |
| -} |
| - |
| -static const char mt7921_gstrings_stats[][ETH_GSTRING_LEN] = { |
| - /* tx counters */ |
| - "tx_ampdu_cnt", |
| - "tx_mpdu_attempts", |
| - "tx_mpdu_success", |
| - "tx_pkt_ebf_cnt", |
| - "tx_pkt_ibf_cnt", |
| - "tx_ampdu_len:0-1", |
| - "tx_ampdu_len:2-10", |
| - "tx_ampdu_len:11-19", |
| - "tx_ampdu_len:20-28", |
| - "tx_ampdu_len:29-37", |
| - "tx_ampdu_len:38-46", |
| - "tx_ampdu_len:47-55", |
| - "tx_ampdu_len:56-79", |
| - "tx_ampdu_len:80-103", |
| - "tx_ampdu_len:104-127", |
| - "tx_ampdu_len:128-151", |
| - "tx_ampdu_len:152-175", |
| - "tx_ampdu_len:176-199", |
| - "tx_ampdu_len:200-223", |
| - "tx_ampdu_len:224-247", |
| - "ba_miss_count", |
| - "tx_beamformer_ppdu_iBF", |
| - "tx_beamformer_ppdu_eBF", |
| - "tx_beamformer_rx_feedback_all", |
| - "tx_beamformer_rx_feedback_he", |
| - "tx_beamformer_rx_feedback_vht", |
| - "tx_beamformer_rx_feedback_ht", |
| - "tx_msdu_pack_1", |
| - "tx_msdu_pack_2", |
| - "tx_msdu_pack_3", |
| - "tx_msdu_pack_4", |
| - "tx_msdu_pack_5", |
| - "tx_msdu_pack_6", |
| - "tx_msdu_pack_7", |
| - "tx_msdu_pack_8", |
| - /* rx counters */ |
| - "rx_mpdu_cnt", |
| - "rx_ampdu_cnt", |
| - "rx_ampdu_bytes_cnt", |
| - "rx_ba_cnt", |
| - /* per vif counters */ |
| - "v_tx_mode_cck", |
| - "v_tx_mode_ofdm", |
| - "v_tx_mode_ht", |
| - "v_tx_mode_ht_gf", |
| - "v_tx_mode_vht", |
| - "v_tx_mode_he_su", |
| - "v_tx_mode_he_ext_su", |
| - "v_tx_mode_he_tb", |
| - "v_tx_mode_he_mu", |
| - "v_tx_bw_20", |
| - "v_tx_bw_40", |
| - "v_tx_bw_80", |
| - "v_tx_bw_160", |
| - "v_tx_mcs_0", |
| - "v_tx_mcs_1", |
| - "v_tx_mcs_2", |
| - "v_tx_mcs_3", |
| - "v_tx_mcs_4", |
| - "v_tx_mcs_5", |
| - "v_tx_mcs_6", |
| - "v_tx_mcs_7", |
| - "v_tx_mcs_8", |
| - "v_tx_mcs_9", |
| - "v_tx_mcs_10", |
| - "v_tx_mcs_11", |
| - "v_tx_nss_1", |
| - "v_tx_nss_2", |
| - "v_tx_nss_3", |
| - "v_tx_nss_4", |
| -}; |
| - |
| -static void |
| -mt7921_get_et_strings(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| - u32 sset, u8 *data) |
| -{ |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - |
| - if (sset != ETH_SS_STATS) |
| - return; |
| - |
| - memcpy(data, *mt7921_gstrings_stats, sizeof(mt7921_gstrings_stats)); |
| - |
| - if (mt76_is_sdio(&dev->mt76)) |
| - return; |
| - |
| - data += sizeof(mt7921_gstrings_stats); |
| - page_pool_ethtool_stats_get_strings(data); |
| -} |
| - |
| -static int |
| -mt7921_get_et_sset_count(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| - int sset) |
| -{ |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - |
| - if (sset != ETH_SS_STATS) |
| - return 0; |
| - |
| - if (mt76_is_sdio(&dev->mt76)) |
| - return ARRAY_SIZE(mt7921_gstrings_stats); |
| - |
| - return ARRAY_SIZE(mt7921_gstrings_stats) + |
| - page_pool_ethtool_stats_get_count(); |
| -} |
| - |
| -static void |
| -mt7921_ethtool_worker(void *wi_data, struct ieee80211_sta *sta) |
| -{ |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| - struct mt76_ethtool_worker_info *wi = wi_data; |
| - |
| - if (msta->vif->mt76.idx != wi->idx) |
| - return; |
| - |
| - mt76_ethtool_worker(wi, &msta->wcid.stats, false); |
| -} |
| - |
| -static |
| -void mt7921_get_et_stats(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| - struct ethtool_stats *stats, u64 *data) |
| -{ |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - int stats_size = ARRAY_SIZE(mt7921_gstrings_stats); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - struct mt7921_dev *dev = phy->dev; |
| - struct mt76_mib_stats *mib = &phy->mib; |
| - struct mt76_ethtool_worker_info wi = { |
| - .data = data, |
| - .idx = mvif->mt76.idx, |
| - }; |
| - int i, ei = 0; |
| - |
| - mt7921_mutex_acquire(dev); |
| - |
| - mt7921_mac_update_mib_stats(phy); |
| - |
| - data[ei++] = mib->tx_ampdu_cnt; |
| - data[ei++] = mib->tx_mpdu_attempts_cnt; |
| - data[ei++] = mib->tx_mpdu_success_cnt; |
| - data[ei++] = mib->tx_pkt_ebf_cnt; |
| - data[ei++] = mib->tx_pkt_ibf_cnt; |
| - |
| - /* Tx ampdu stat */ |
| - for (i = 0; i < 15; i++) |
| - data[ei++] = phy->mt76->aggr_stats[i]; |
| - |
| - data[ei++] = phy->mib.ba_miss_cnt; |
| - |
| - /* Tx Beamformer monitor */ |
| - data[ei++] = mib->tx_bf_ibf_ppdu_cnt; |
| - data[ei++] = mib->tx_bf_ebf_ppdu_cnt; |
| - |
| - /* Tx Beamformer Rx feedback monitor */ |
| - data[ei++] = mib->tx_bf_rx_fb_all_cnt; |
| - data[ei++] = mib->tx_bf_rx_fb_he_cnt; |
| - data[ei++] = mib->tx_bf_rx_fb_vht_cnt; |
| - data[ei++] = mib->tx_bf_rx_fb_ht_cnt; |
| - |
| - /* Tx amsdu info (pack-count histogram) */ |
| - for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) |
| - data[ei++] = mib->tx_amsdu[i]; |
| - |
| - /* rx counters */ |
| - data[ei++] = mib->rx_mpdu_cnt; |
| - data[ei++] = mib->rx_ampdu_cnt; |
| - data[ei++] = mib->rx_ampdu_bytes_cnt; |
| - data[ei++] = mib->rx_ba_cnt; |
| - |
| - /* Add values for all stations owned by this vif */ |
| - wi.initial_stat_idx = ei; |
| - ieee80211_iterate_stations_atomic(hw, mt7921_ethtool_worker, &wi); |
| - |
| - mt7921_mutex_release(dev); |
| - |
| - if (!wi.sta_count) |
| - return; |
| - |
| - ei += wi.worker_stat_count; |
| - |
| - if (!mt76_is_sdio(&dev->mt76)) { |
| - mt76_ethtool_page_pool_stats(&dev->mt76, &data[ei], &ei); |
| - stats_size += page_pool_ethtool_stats_get_count(); |
| - } |
| - |
| - if (ei != stats_size) |
| - dev_err(dev->mt76.dev, "ei: %d SSTATS_LEN: %d", ei, stats_size); |
| -} |
| - |
| -static u64 |
| -mt7921_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
| -{ |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - u8 omac_idx = mvif->mt76.omac_idx; |
| - union { |
| - u64 t64; |
| - u32 t32[2]; |
| - } tsf; |
| - u16 n; |
| - |
| - mt7921_mutex_acquire(dev); |
| - |
| - n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx; |
| - /* TSF software read */ |
| - mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_MODE); |
| - tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0(0)); |
| - tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1(0)); |
| - |
| - mt7921_mutex_release(dev); |
| - |
| - return tsf.t64; |
| -} |
| - |
| -static void |
| -mt7921_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| - u64 timestamp) |
| -{ |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - u8 omac_idx = mvif->mt76.omac_idx; |
| - union { |
| - u64 t64; |
| - u32 t32[2]; |
| - } tsf = { .t64 = timestamp, }; |
| - u16 n; |
| - |
| - mt7921_mutex_acquire(dev); |
| - |
| - n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx; |
| - mt76_wr(dev, MT_LPON_UTTR0(0), tsf.t32[0]); |
| - mt76_wr(dev, MT_LPON_UTTR1(0), tsf.t32[1]); |
| - /* TSF software overwrite */ |
| - mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_WRITE); |
| - |
| - mt7921_mutex_release(dev); |
| -} |
| - |
| -static void |
| -mt7921_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class) |
| -{ |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - struct mt7921_dev *dev = phy->dev; |
| - |
| - mt7921_mutex_acquire(dev); |
| - phy->coverage_class = max_t(s16, coverage_class, 0); |
| - mt7921_mac_set_timing(phy); |
| - mt7921_mutex_release(dev); |
| -} |
| - |
| void mt7921_scan_work(struct work_struct *work) |
| { |
| - struct mt7921_phy *phy; |
| + struct mt792x_phy *phy; |
| |
| - phy = (struct mt7921_phy *)container_of(work, struct mt7921_phy, |
| + phy = (struct mt792x_phy *)container_of(work, struct mt792x_phy, |
| scan_work.work); |
| |
| while (true) { |
| @@ -1298,13 +925,13 @@ static int |
| mt7921_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| struct ieee80211_scan_request *req) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| struct mt76_phy *mphy = hw->priv; |
| int err; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| err = mt76_connac_mcu_hw_scan(mphy, vif, req); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return err; |
| } |
| @@ -1312,12 +939,12 @@ mt7921_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| static void |
| mt7921_cancel_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| struct mt76_phy *mphy = hw->priv; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt76_connac_mcu_cancel_hw_scan(mphy, vif); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| |
| static int |
| @@ -1325,11 +952,11 @@ mt7921_start_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| struct cfg80211_sched_scan_request *req, |
| struct ieee80211_scan_ies *ies) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| struct mt76_phy *mphy = hw->priv; |
| int err; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| err = mt76_connac_mcu_sched_scan_req(mphy, vif, req); |
| if (err < 0) |
| @@ -1337,7 +964,7 @@ mt7921_start_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| |
| err = mt76_connac_mcu_sched_scan_enable(mphy, vif, true); |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return err; |
| } |
| @@ -1345,13 +972,13 @@ out: |
| static int |
| mt7921_stop_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| struct mt76_phy *mphy = hw->priv; |
| int err; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| err = mt76_connac_mcu_sched_scan_enable(mphy, vif, false); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return err; |
| } |
| @@ -1359,8 +986,8 @@ mt7921_stop_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
| static int |
| mt7921_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| int max_nss = hweight8(hw->wiphy->available_antennas_tx); |
| |
| if (!tx_ant || tx_ant != rx_ant || ffs(tx_ant) > max_nss) |
| @@ -1369,7 +996,7 @@ mt7921_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) |
| if ((BIT(hweight8(tx_ant)) - 1) != tx_ant) |
| return -EINVAL; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| phy->mt76->antenna_mask = tx_ant; |
| phy->mt76->chainmask = tx_ant; |
| @@ -1377,54 +1004,17 @@ mt7921_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) |
| mt76_set_stream_caps(phy->mt76, true); |
| mt7921_set_stream_he_caps(phy); |
| |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| |
| -static void mt7921_sta_statistics(struct ieee80211_hw *hw, |
| - struct ieee80211_vif *vif, |
| - struct ieee80211_sta *sta, |
| - struct station_info *sinfo) |
| -{ |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| - struct rate_info *txrate = &msta->wcid.rate; |
| - |
| - if (!txrate->legacy && !txrate->flags) |
| - return; |
| - |
| - if (txrate->legacy) { |
| - sinfo->txrate.legacy = txrate->legacy; |
| - } else { |
| - sinfo->txrate.mcs = txrate->mcs; |
| - sinfo->txrate.nss = txrate->nss; |
| - sinfo->txrate.bw = txrate->bw; |
| - sinfo->txrate.he_gi = txrate->he_gi; |
| - sinfo->txrate.he_dcm = txrate->he_dcm; |
| - sinfo->txrate.he_ru_alloc = txrate->he_ru_alloc; |
| - } |
| - sinfo->tx_failed = msta->wcid.stats.tx_failed; |
| - sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED); |
| - |
| - sinfo->tx_retries = msta->wcid.stats.tx_retries; |
| - sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_RETRIES); |
| - |
| - sinfo->txrate.flags = txrate->flags; |
| - sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); |
| - |
| - sinfo->ack_signal = (s8)msta->ack_signal; |
| - sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL); |
| - |
| - sinfo->avg_ack_signal = -(s8)ewma_avg_signal_read(&msta->avg_ack_signal); |
| - sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL_AVG); |
| -} |
| - |
| #ifdef CONFIG_PM |
| static int mt7921_suspend(struct ieee80211_hw *hw, |
| struct cfg80211_wowlan *wowlan) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| |
| cancel_delayed_work_sync(&phy->scan_work); |
| cancel_delayed_work_sync(&phy->mt76->mac_work); |
| @@ -1432,7 +1022,7 @@ static int mt7921_suspend(struct ieee80211_hw *hw, |
| cancel_delayed_work_sync(&dev->pm.ps_work); |
| mt76_connac_free_pending_tx_skbs(&dev->pm, NULL); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| clear_bit(MT76_STATE_RUNNING, &phy->mt76->state); |
| ieee80211_iterate_active_interfaces(hw, |
| @@ -1440,17 +1030,17 @@ static int mt7921_suspend(struct ieee80211_hw *hw, |
| mt7921_mcu_set_suspend_iter, |
| &dev->mphy); |
| |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| |
| static int mt7921_resume(struct ieee80211_hw *hw) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| set_bit(MT76_STATE_RUNNING, &phy->mt76->state); |
| ieee80211_iterate_active_interfaces(hw, |
| @@ -1459,51 +1049,34 @@ static int mt7921_resume(struct ieee80211_hw *hw) |
| &dev->mphy); |
| |
| ieee80211_queue_delayed_work(hw, &phy->mt76->mac_work, |
| - MT7921_WATCHDOG_TIME); |
| + MT792x_WATCHDOG_TIME); |
| |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return 0; |
| } |
| |
| -static void mt7921_set_wakeup(struct ieee80211_hw *hw, bool enabled) |
| -{ |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - struct mt76_dev *mdev = &dev->mt76; |
| - |
| - device_set_wakeup_enable(mdev->dev, enabled); |
| -} |
| - |
| static void mt7921_set_rekey_data(struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| struct cfg80211_gtk_rekey_data *data) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt76_connac_mcu_update_gtk_rekey(hw, vif, data); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| #endif /* CONFIG_PM */ |
| |
| -static void mt7921_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| - u32 queues, bool drop) |
| -{ |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - |
| - wait_event_timeout(dev->mt76.tx_wait, !mt76_has_tx_pending(&dev->mphy), |
| - HZ / 2); |
| -} |
| - |
| static void mt7921_sta_set_decap_offload(struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta, |
| bool enabled) |
| { |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| if (enabled) |
| set_bit(MT_WCID_FLAG_HDR_TRANS, &msta->wcid.flags); |
| @@ -1513,7 +1086,7 @@ static void mt7921_sta_set_decap_offload(struct ieee80211_hw *hw, |
| mt76_connac_mcu_sta_update_hdr_trans(&dev->mt76, vif, &msta->wcid, |
| MCU_UNI_CMD(STA_REC_UPDATE)); |
| |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| |
| #if IS_ENABLED(CONFIG_IPV6) |
| @@ -1521,8 +1094,8 @@ static void mt7921_ipv6_addr_change(struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| struct inet6_dev *idev) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mvif->phy->dev; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mvif->phy->dev; |
| struct inet6_ifaddr *ifa; |
| struct in6_addr ns_addrs[IEEE80211_BSS_ARP_ADDR_LIST_LEN]; |
| struct sk_buff *skb; |
| @@ -1580,28 +1153,25 @@ int mt7921_set_tx_sar_pwr(struct ieee80211_hw *hw, |
| const struct cfg80211_sar_specs *sar) |
| { |
| struct mt76_phy *mphy = hw->priv; |
| - int err; |
| |
| if (sar) { |
| - err = mt76_init_sar_power(hw, sar); |
| + int err = mt76_init_sar_power(hw, sar); |
| + |
| if (err) |
| return err; |
| } |
| + mt792x_init_acpi_sar_power(mt792x_hw_phy(hw), !sar); |
| |
| - mt7921_init_acpi_sar_power(mt7921_hw_phy(hw), !sar); |
| - |
| - err = mt76_connac_mcu_set_rate_txpower(mphy); |
| - |
| - return err; |
| + return mt76_connac_mcu_set_rate_txpower(mphy); |
| } |
| |
| static int mt7921_set_sar_specs(struct ieee80211_hw *hw, |
| const struct cfg80211_sar_specs *sar) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| int err; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| err = mt7921_mcu_set_clc(dev, dev->mt76.alpha2, |
| dev->country_ie_env); |
| if (err < 0) |
| @@ -1609,7 +1179,7 @@ static int mt7921_set_sar_specs(struct ieee80211_hw *hw, |
| |
| err = mt7921_set_tx_sar_pwr(hw, sar); |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return err; |
| } |
| @@ -1619,23 +1189,23 @@ mt7921_channel_switch_beacon(struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| struct cfg80211_chan_def *chandef) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| |
| static int |
| mt7921_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| struct ieee80211_bss_conf *link_conf) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| int err; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| err = mt76_connac_mcu_uni_add_bss(phy->mt76, vif, &mvif->sta.wcid, |
| true, mvif->ctx); |
| @@ -1649,7 +1219,7 @@ mt7921_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| err = mt7921_mcu_sta_update(dev, NULL, vif, true, |
| MT76_STA_INFO_STATE_NONE); |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| |
| return err; |
| } |
| @@ -1658,12 +1228,12 @@ static void |
| mt7921_stop_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| struct ieee80211_bss_conf *link_conf) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| int err; |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| |
| err = mt7921_mcu_set_bss_pm(dev, vif, false); |
| if (err) |
| @@ -1673,7 +1243,7 @@ mt7921_stop_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| mvif->ctx); |
| |
| out: |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| |
| static int |
| @@ -1692,7 +1262,7 @@ mt7921_remove_chanctx(struct ieee80211_hw *hw, |
| static void mt7921_ctx_iter(void *priv, u8 *mac, |
| struct ieee80211_vif *vif) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| struct ieee80211_chanctx_conf *ctx = priv; |
| |
| if (ctx != mvif->ctx) |
| @@ -1709,77 +1279,47 @@ mt7921_change_chanctx(struct ieee80211_hw *hw, |
| struct ieee80211_chanctx_conf *ctx, |
| u32 changed) |
| { |
| - struct mt7921_phy *phy = mt7921_hw_phy(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| |
| - mt7921_mutex_acquire(phy->dev); |
| + mt792x_mutex_acquire(phy->dev); |
| ieee80211_iterate_active_interfaces(phy->mt76->hw, |
| IEEE80211_IFACE_ITER_ACTIVE, |
| mt7921_ctx_iter, ctx); |
| - mt7921_mutex_release(phy->dev); |
| -} |
| - |
| -static int |
| -mt7921_assign_vif_chanctx(struct ieee80211_hw *hw, |
| - struct ieee80211_vif *vif, |
| - struct ieee80211_bss_conf *link_conf, |
| - struct ieee80211_chanctx_conf *ctx) |
| -{ |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - |
| - mutex_lock(&dev->mt76.mutex); |
| - mvif->ctx = ctx; |
| - mutex_unlock(&dev->mt76.mutex); |
| - |
| - return 0; |
| -} |
| - |
| -static void |
| -mt7921_unassign_vif_chanctx(struct ieee80211_hw *hw, |
| - struct ieee80211_vif *vif, |
| - struct ieee80211_bss_conf *link_conf, |
| - struct ieee80211_chanctx_conf *ctx) |
| -{ |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| - |
| - mutex_lock(&dev->mt76.mutex); |
| - mvif->ctx = NULL; |
| - mutex_unlock(&dev->mt76.mutex); |
| + mt792x_mutex_release(phy->dev); |
| } |
| |
| static void mt7921_mgd_prepare_tx(struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| struct ieee80211_prep_tx_info *info) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| u16 duration = info->duration ? info->duration : |
| jiffies_to_msecs(HZ); |
| |
| - mt7921_mutex_acquire(dev); |
| + mt792x_mutex_acquire(dev); |
| mt7921_set_roc(mvif->phy, mvif, mvif->ctx->def.chan, duration, |
| MT7921_ROC_REQ_JOIN); |
| - mt7921_mutex_release(dev); |
| + mt792x_mutex_release(dev); |
| } |
| |
| static void mt7921_mgd_complete_tx(struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| struct ieee80211_prep_tx_info *info) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| |
| mt7921_abort_roc(mvif->phy, mvif); |
| } |
| |
| const struct ieee80211_ops mt7921_ops = { |
| - .tx = mt7921_tx, |
| + .tx = mt792x_tx, |
| .start = mt7921_start, |
| .stop = mt7921_stop, |
| .add_interface = mt7921_add_interface, |
| - .remove_interface = mt7921_remove_interface, |
| + .remove_interface = mt792x_remove_interface, |
| .config = mt7921_config, |
| - .conf_tx = mt7921_conf_tx, |
| + .conf_tx = mt792x_conf_tx, |
| .configure_filter = mt7921_configure_filter, |
| .bss_info_changed = mt7921_bss_info_changed, |
| .start_ap = mt7921_start_ap, |
| @@ -1797,19 +1337,19 @@ const struct ieee80211_ops mt7921_ops = { |
| .release_buffered_frames = mt76_release_buffered_frames, |
| .channel_switch_beacon = mt7921_channel_switch_beacon, |
| .get_txpower = mt76_get_txpower, |
| - .get_stats = mt7921_get_stats, |
| - .get_et_sset_count = mt7921_get_et_sset_count, |
| - .get_et_strings = mt7921_get_et_strings, |
| - .get_et_stats = mt7921_get_et_stats, |
| - .get_tsf = mt7921_get_tsf, |
| - .set_tsf = mt7921_set_tsf, |
| + .get_stats = mt792x_get_stats, |
| + .get_et_sset_count = mt792x_get_et_sset_count, |
| + .get_et_strings = mt792x_get_et_strings, |
| + .get_et_stats = mt792x_get_et_stats, |
| + .get_tsf = mt792x_get_tsf, |
| + .set_tsf = mt792x_set_tsf, |
| .get_survey = mt76_get_survey, |
| .get_antenna = mt76_get_antenna, |
| .set_antenna = mt7921_set_antenna, |
| - .set_coverage_class = mt7921_set_coverage_class, |
| + .set_coverage_class = mt792x_set_coverage_class, |
| .hw_scan = mt7921_hw_scan, |
| .cancel_hw_scan = mt7921_cancel_hw_scan, |
| - .sta_statistics = mt7921_sta_statistics, |
| + .sta_statistics = mt792x_sta_statistics, |
| .sched_scan_start = mt7921_start_sched_scan, |
| .sched_scan_stop = mt7921_stop_sched_scan, |
| CFG80211_TESTMODE_CMD(mt7921_testmode_cmd) |
| @@ -1817,18 +1357,18 @@ const struct ieee80211_ops mt7921_ops = { |
| #ifdef CONFIG_PM |
| .suspend = mt7921_suspend, |
| .resume = mt7921_resume, |
| - .set_wakeup = mt7921_set_wakeup, |
| + .set_wakeup = mt792x_set_wakeup, |
| .set_rekey_data = mt7921_set_rekey_data, |
| #endif /* CONFIG_PM */ |
| - .flush = mt7921_flush, |
| + .flush = mt792x_flush, |
| .set_sar_specs = mt7921_set_sar_specs, |
| .remain_on_channel = mt7921_remain_on_channel, |
| .cancel_remain_on_channel = mt7921_cancel_remain_on_channel, |
| .add_chanctx = mt7921_add_chanctx, |
| .remove_chanctx = mt7921_remove_chanctx, |
| .change_chanctx = mt7921_change_chanctx, |
| - .assign_vif_chanctx = mt7921_assign_vif_chanctx, |
| - .unassign_vif_chanctx = mt7921_unassign_vif_chanctx, |
| + .assign_vif_chanctx = mt792x_assign_vif_chanctx, |
| + .unassign_vif_chanctx = mt792x_unassign_vif_chanctx, |
| .mgd_prepare_tx = mt7921_mgd_prepare_tx, |
| .mgd_complete_tx = mt7921_mgd_complete_tx, |
| }; |
| diff --git a/mt7921/mcu.c b/mt7921/mcu.c |
| index a0ad18c7..90c93970 100644 |
| --- a/mt7921/mcu.c |
| +++ b/mt7921/mcu.c |
| @@ -4,9 +4,9 @@ |
| #include <linux/fs.h> |
| #include <linux/firmware.h> |
| #include "mt7921.h" |
| -#include "mt7921_trace.h" |
| #include "mcu.h" |
| #include "../mt76_connac2_mac.h" |
| +#include "../mt792x_trace.h" |
| |
| #define MT_STA_BFER BIT(0) |
| #define MT_STA_BFEE BIT(1) |
| @@ -25,7 +25,7 @@ int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd, |
| if (!skb) { |
| dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", |
| cmd, seq); |
| - mt7921_reset(mdev); |
| + mt792x_reset(mdev); |
| |
| return -ETIMEDOUT; |
| } |
| @@ -69,7 +69,7 @@ int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd, |
| } |
| EXPORT_SYMBOL_GPL(mt7921_mcu_parse_response); |
| |
| -static int mt7921_mcu_read_eeprom(struct mt7921_dev *dev, u32 offset, u8 *val) |
| +static int mt7921_mcu_read_eeprom(struct mt792x_dev *dev, u32 offset, u8 *val) |
| { |
| struct mt7921_mcu_eeprom_info *res, req = { |
| .addr = cpu_to_le32(round_down(offset, |
| @@ -96,7 +96,7 @@ static int |
| mt7921_mcu_set_ipv6_ns_filter(struct mt76_dev *dev, |
| struct ieee80211_vif *vif, bool suspend) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| struct { |
| struct { |
| u8 bss_idx; |
| @@ -134,7 +134,7 @@ void mt7921_mcu_set_suspend_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| #endif /* CONFIG_PM */ |
| |
| static void |
| -mt7921_mcu_uni_roc_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mcu_uni_roc_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt7921_roc_grant_tlv *grant; |
| struct mt76_connac2_mcu_rxd *rxd; |
| @@ -157,17 +157,17 @@ mt7921_mcu_uni_roc_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| } |
| |
| static void |
| -mt7921_mcu_scan_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mcu_scan_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt76_phy *mphy = &dev->mt76.phy; |
| - struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv; |
| + struct mt792x_phy *phy = (struct mt792x_phy *)mphy->priv; |
| |
| spin_lock_bh(&dev->mt76.lock); |
| __skb_queue_tail(&phy->scan_event_list, skb); |
| spin_unlock_bh(&dev->mt76.lock); |
| |
| ieee80211_queue_delayed_work(mphy->hw, &phy->scan_work, |
| - MT7921_HW_SCAN_TIMEOUT); |
| + MT792x_HW_SCAN_TIMEOUT); |
| } |
| |
| static void |
| @@ -188,7 +188,7 @@ mt7921_mcu_connection_loss_iter(void *priv, u8 *mac, |
| } |
| |
| static void |
| -mt7921_mcu_connection_loss_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mcu_connection_loss_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt76_connac_beacon_loss_event *event; |
| struct mt76_phy *mphy = &dev->mt76.phy; |
| @@ -202,7 +202,7 @@ mt7921_mcu_connection_loss_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| } |
| |
| static void |
| -mt7921_mcu_debug_msg_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mcu_debug_msg_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt7921_debug_msg { |
| __le16 id; |
| @@ -229,7 +229,7 @@ mt7921_mcu_debug_msg_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| } |
| |
| static void |
| -mt7921_mcu_low_power_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mcu_low_power_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt7921_mcu_lp_event { |
| u8 state; |
| @@ -243,7 +243,7 @@ mt7921_mcu_low_power_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| } |
| |
| static void |
| -mt7921_mcu_tx_done_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mcu_tx_done_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt7921_mcu_tx_done_event *event; |
| |
| @@ -254,7 +254,7 @@ mt7921_mcu_tx_done_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| } |
| |
| static void |
| -mt7921_mcu_rx_unsolicited_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +mt7921_mcu_rx_unsolicited_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt76_connac2_mcu_rxd *rxd; |
| |
| @@ -288,7 +288,7 @@ mt7921_mcu_rx_unsolicited_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| } |
| |
| static void |
| -mt7921_mcu_uni_rx_unsolicited_event(struct mt7921_dev *dev, |
| +mt7921_mcu_uni_rx_unsolicited_event(struct mt792x_dev *dev, |
| struct sk_buff *skb) |
| { |
| struct mt76_connac2_mcu_rxd *rxd; |
| @@ -305,7 +305,7 @@ mt7921_mcu_uni_rx_unsolicited_event(struct mt7921_dev *dev, |
| dev_kfree_skb(skb); |
| } |
| |
| -void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| +void mt7921_mcu_rx_event(struct mt792x_dev *dev, struct sk_buff *skb) |
| { |
| struct mt76_connac2_mcu_rxd *rxd; |
| |
| @@ -339,11 +339,11 @@ void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb) |
| } |
| |
| /** starec & wtbl **/ |
| -int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev, |
| +int mt7921_mcu_uni_tx_ba(struct mt792x_dev *dev, |
| struct ieee80211_ampdu_params *params, |
| bool enable) |
| { |
| - struct mt7921_sta *msta = (struct mt7921_sta *)params->sta->drv_priv; |
| + struct mt792x_sta *msta = (struct mt792x_sta *)params->sta->drv_priv; |
| |
| if (enable && !params->amsdu) |
| msta->wcid.amsdu = false; |
| @@ -353,48 +353,24 @@ int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev, |
| enable, true); |
| } |
| |
| -int mt7921_mcu_uni_rx_ba(struct mt7921_dev *dev, |
| +int mt7921_mcu_uni_rx_ba(struct mt792x_dev *dev, |
| struct ieee80211_ampdu_params *params, |
| bool enable) |
| { |
| - struct mt7921_sta *msta = (struct mt7921_sta *)params->sta->drv_priv; |
| + struct mt792x_sta *msta = (struct mt792x_sta *)params->sta->drv_priv; |
| |
| return mt76_connac_mcu_sta_ba(&dev->mt76, &msta->vif->mt76, params, |
| MCU_UNI_CMD(STA_REC_UPDATE), |
| enable, false); |
| } |
| |
| -static char *mt7921_patch_name(struct mt7921_dev *dev) |
| -{ |
| - char *ret; |
| - |
| - if (is_mt7922(&dev->mt76)) |
| - ret = MT7922_ROM_PATCH; |
| - else |
| - ret = MT7921_ROM_PATCH; |
| - |
| - return ret; |
| -} |
| - |
| -static char *mt7921_ram_name(struct mt7921_dev *dev) |
| -{ |
| - char *ret; |
| - |
| - if (is_mt7922(&dev->mt76)) |
| - ret = MT7922_FIRMWARE_WM; |
| - else |
| - ret = MT7921_FIRMWARE_WM; |
| - |
| - return ret; |
| -} |
| - |
| -static int mt7921_load_clc(struct mt7921_dev *dev, const char *fw_name) |
| +static int mt7921_load_clc(struct mt792x_dev *dev, const char *fw_name) |
| { |
| const struct mt76_connac2_fw_trailer *hdr; |
| const struct mt76_connac2_fw_region *region; |
| const struct mt7921_clc *clc; |
| struct mt76_dev *mdev = &dev->mt76; |
| - struct mt7921_phy *phy = &dev->phy; |
| + struct mt792x_phy *phy = &dev->phy; |
| const struct firmware *fw; |
| int ret, i, len, offset = 0; |
| u8 *clc_base = NULL, hw_encap = 0; |
| @@ -472,42 +448,7 @@ out: |
| return ret; |
| } |
| |
| -static int mt7921_load_firmware(struct mt7921_dev *dev) |
| -{ |
| - int ret; |
| - |
| - ret = mt76_connac2_load_patch(&dev->mt76, mt7921_patch_name(dev)); |
| - if (ret) |
| - return ret; |
| - |
| - if (mt76_is_sdio(&dev->mt76)) { |
| - /* activate again */ |
| - ret = __mt7921_mcu_fw_pmctrl(dev); |
| - if (!ret) |
| - ret = __mt7921_mcu_drv_pmctrl(dev); |
| - } |
| - |
| - ret = mt76_connac2_load_ram(&dev->mt76, mt7921_ram_name(dev), NULL); |
| - if (ret) |
| - return ret; |
| - |
| - if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY, |
| - MT_TOP_MISC2_FW_N9_RDY, 1500)) { |
| - dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); |
| - |
| - return -EIO; |
| - } |
| - |
| -#ifdef CONFIG_PM |
| - dev->mt76.hw->wiphy->wowlan = &mt76_connac_wowlan_support; |
| -#endif /* CONFIG_PM */ |
| - |
| - dev_dbg(dev->mt76.dev, "Firmware init done\n"); |
| - |
| - return 0; |
| -} |
| - |
| -int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl) |
| +int mt7921_mcu_fw_log_2_host(struct mt792x_dev *dev, u8 ctrl) |
| { |
| struct { |
| u8 ctrl_val; |
| @@ -520,11 +461,11 @@ int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl) |
| &data, sizeof(data), false); |
| } |
| |
| -int mt7921_run_firmware(struct mt7921_dev *dev) |
| +int mt7921_run_firmware(struct mt792x_dev *dev) |
| { |
| int err; |
| |
| - err = mt7921_load_firmware(dev); |
| + err = mt792x_load_firmware(dev); |
| if (err) |
| return err; |
| |
| @@ -533,7 +474,7 @@ int mt7921_run_firmware(struct mt7921_dev *dev) |
| return err; |
| |
| set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); |
| - err = mt7921_load_clc(dev, mt7921_ram_name(dev)); |
| + err = mt7921_load_clc(dev, mt792x_ram_name(dev)); |
| if (err) |
| return err; |
| |
| @@ -541,9 +482,9 @@ int mt7921_run_firmware(struct mt7921_dev *dev) |
| } |
| EXPORT_SYMBOL_GPL(mt7921_run_firmware); |
| |
| -int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif) |
| +int mt7921_mcu_set_tx(struct mt792x_dev *dev, struct ieee80211_vif *vif) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| struct edca { |
| __le16 cw_min; |
| __le16 cw_max; |
| @@ -635,12 +576,12 @@ int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif) |
| &req_mu, sizeof(req_mu), false); |
| } |
| |
| -int mt7921_mcu_set_roc(struct mt7921_phy *phy, struct mt7921_vif *vif, |
| +int mt7921_mcu_set_roc(struct mt792x_phy *phy, struct mt792x_vif *vif, |
| struct ieee80211_channel *chan, int duration, |
| enum mt7921_roc_req type, u8 token_id) |
| { |
| int center_ch = ieee80211_frequency_to_channel(chan->center_freq); |
| - struct mt7921_dev *dev = phy->dev; |
| + struct mt792x_dev *dev = phy->dev; |
| struct { |
| struct { |
| u8 rsv[4]; |
| @@ -702,10 +643,10 @@ int mt7921_mcu_set_roc(struct mt7921_phy *phy, struct mt7921_vif *vif, |
| &req, sizeof(req), false); |
| } |
| |
| -int mt7921_mcu_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif, |
| +int mt7921_mcu_abort_roc(struct mt792x_phy *phy, struct mt792x_vif *vif, |
| u8 token_id) |
| { |
| - struct mt7921_dev *dev = phy->dev; |
| + struct mt792x_dev *dev = phy->dev; |
| struct { |
| struct { |
| u8 rsv[4]; |
| @@ -732,9 +673,9 @@ int mt7921_mcu_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif, |
| &req, sizeof(req), false); |
| } |
| |
| -int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd) |
| +int mt7921_mcu_set_chan_info(struct mt792x_phy *phy, int cmd) |
| { |
| - struct mt7921_dev *dev = phy->dev; |
| + struct mt792x_dev *dev = phy->dev; |
| struct cfg80211_chan_def *chandef = &phy->mt76->chandef; |
| int freq1 = chandef->center_freq1; |
| struct { |
| @@ -791,7 +732,7 @@ int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd) |
| return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true); |
| } |
| |
| -int mt7921_mcu_set_eeprom(struct mt7921_dev *dev) |
| +int mt7921_mcu_set_eeprom(struct mt792x_dev *dev) |
| { |
| struct req_hdr { |
| u8 buffer_mode; |
| @@ -807,9 +748,9 @@ int mt7921_mcu_set_eeprom(struct mt7921_dev *dev) |
| } |
| EXPORT_SYMBOL_GPL(mt7921_mcu_set_eeprom); |
| |
| -int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif) |
| +int mt7921_mcu_uni_bss_ps(struct mt792x_dev *dev, struct ieee80211_vif *vif) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| struct { |
| struct { |
| u8 bss_idx; |
| @@ -845,10 +786,10 @@ int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif) |
| } |
| |
| static int |
| -mt7921_mcu_uni_bss_bcnft(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| +mt7921_mcu_uni_bss_bcnft(struct mt792x_dev *dev, struct ieee80211_vif *vif, |
| bool enable) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| struct { |
| struct { |
| u8 bss_idx; |
| @@ -881,10 +822,10 @@ mt7921_mcu_uni_bss_bcnft(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| } |
| |
| int |
| -mt7921_mcu_set_bss_pm(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| +mt7921_mcu_set_bss_pm(struct mt792x_dev *dev, struct ieee80211_vif *vif, |
| bool enable) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| struct { |
| u8 bss_idx; |
| u8 dtim_period; |
| @@ -918,11 +859,11 @@ mt7921_mcu_set_bss_pm(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| &req, sizeof(req), false); |
| } |
| |
| -int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta, |
| +int mt7921_mcu_sta_update(struct mt792x_dev *dev, struct ieee80211_sta *sta, |
| struct ieee80211_vif *vif, bool enable, |
| enum mt76_sta_info_state state) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| int rssi = -ewma_rssi_read(&mvif->rssi); |
| struct mt76_sta_cmd_info info = { |
| .sta = sta, |
| @@ -933,60 +874,16 @@ int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta, |
| .offload_fw = true, |
| .rcpi = to_rcpi(rssi), |
| }; |
| - struct mt7921_sta *msta; |
| + struct mt792x_sta *msta; |
| |
| - msta = sta ? (struct mt7921_sta *)sta->drv_priv : NULL; |
| + msta = sta ? (struct mt792x_sta *)sta->drv_priv : NULL; |
| info.wcid = msta ? &msta->wcid : &mvif->sta.wcid; |
| info.newly = msta ? state != MT76_STA_INFO_STATE_ASSOC : true; |
| |
| return mt76_connac_mcu_sta_cmd(&dev->mphy, &info); |
| } |
| |
| -int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| -{ |
| - struct mt76_phy *mphy = &dev->mt76.phy; |
| - struct mt76_connac_pm *pm = &dev->pm; |
| - int err = 0; |
| - |
| - mutex_lock(&pm->mutex); |
| - |
| - if (!test_bit(MT76_STATE_PM, &mphy->state)) |
| - goto out; |
| - |
| - err = __mt7921_mcu_drv_pmctrl(dev); |
| -out: |
| - mutex_unlock(&pm->mutex); |
| - |
| - if (err) |
| - mt7921_reset(&dev->mt76); |
| - |
| - return err; |
| -} |
| -EXPORT_SYMBOL_GPL(mt7921_mcu_drv_pmctrl); |
| - |
| -int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev) |
| -{ |
| - struct mt76_phy *mphy = &dev->mt76.phy; |
| - struct mt76_connac_pm *pm = &dev->pm; |
| - int err = 0; |
| - |
| - mutex_lock(&pm->mutex); |
| - |
| - if (mt76_connac_skip_fw_pmctrl(mphy, pm)) |
| - goto out; |
| - |
| - err = __mt7921_mcu_fw_pmctrl(dev); |
| -out: |
| - mutex_unlock(&pm->mutex); |
| - |
| - if (err) |
| - mt7921_reset(&dev->mt76); |
| - |
| - return err; |
| -} |
| -EXPORT_SYMBOL_GPL(mt7921_mcu_fw_pmctrl); |
| - |
| -int mt7921_mcu_set_beacon_filter(struct mt7921_dev *dev, |
| +int mt7921_mcu_set_beacon_filter(struct mt792x_dev *dev, |
| struct ieee80211_vif *vif, |
| bool enable) |
| { |
| @@ -1021,7 +918,7 @@ int mt7921_mcu_set_beacon_filter(struct mt7921_dev *dev, |
| return 0; |
| } |
| |
| -int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr) |
| +int mt7921_get_txpwr_info(struct mt792x_dev *dev, struct mt7921_txpwr *txpwr) |
| { |
| struct mt7921_txpwr_event *event; |
| struct mt7921_txpwr_req req = { |
| @@ -1044,7 +941,7 @@ int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr) |
| return 0; |
| } |
| |
| -int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| +int mt7921_mcu_set_sniffer(struct mt792x_dev *dev, struct ieee80211_vif *vif, |
| bool enable) |
| { |
| struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; |
| @@ -1074,7 +971,7 @@ int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| true); |
| } |
| |
| -int mt7921_mcu_config_sniffer(struct mt7921_vif *vif, |
| +int mt7921_mcu_config_sniffer(struct mt792x_vif *vif, |
| struct ieee80211_chanctx_conf *ctx) |
| { |
| struct cfg80211_chan_def *chandef = &ctx->def; |
| @@ -1143,12 +1040,12 @@ int mt7921_mcu_config_sniffer(struct mt7921_vif *vif, |
| } |
| |
| int |
| -mt7921_mcu_uni_add_beacon_offload(struct mt7921_dev *dev, |
| +mt7921_mcu_uni_add_beacon_offload(struct mt792x_dev *dev, |
| struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| bool enable) |
| { |
| - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| struct mt76_wcid *wcid = &dev->mt76.global_wcid; |
| struct ieee80211_mutable_offsets offs; |
| struct { |
| @@ -1221,7 +1118,7 @@ mt7921_mcu_uni_add_beacon_offload(struct mt7921_dev *dev, |
| } |
| |
| static |
| -int __mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2, |
| +int __mt7921_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2, |
| enum environment_cap env_cap, |
| struct mt7921_clc *clc, |
| u8 idx) |
| @@ -1241,7 +1138,7 @@ int __mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2, |
| } __packed req = { |
| .idx = idx, |
| .env = env_cap, |
| - .acpi_conf = mt7921_acpi_get_flags(&dev->phy), |
| + .acpi_conf = mt792x_acpi_get_flags(&dev->phy), |
| }; |
| int ret, valid_cnt = 0; |
| u8 i, *pos; |
| @@ -1283,10 +1180,10 @@ int __mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2, |
| return 0; |
| } |
| |
| -int mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2, |
| +int mt7921_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2, |
| enum environment_cap env_cap) |
| { |
| - struct mt7921_phy *phy = (struct mt7921_phy *)&dev->phy; |
| + struct mt792x_phy *phy = (struct mt792x_phy *)&dev->phy; |
| int i, ret; |
| |
| /* submit all clc config */ |
| @@ -1305,9 +1202,9 @@ int mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2, |
| return 0; |
| } |
| |
| -int mt7921_mcu_get_temperature(struct mt7921_phy *phy) |
| +int mt7921_mcu_get_temperature(struct mt792x_phy *phy) |
| { |
| - struct mt7921_dev *dev = phy->dev; |
| + struct mt792x_dev *dev = phy->dev; |
| struct { |
| u8 ctrl_id; |
| u8 action; |
| @@ -1322,7 +1219,7 @@ int mt7921_mcu_get_temperature(struct mt7921_phy *phy) |
| sizeof(req), true); |
| } |
| |
| -int mt7921_mcu_set_rxfilter(struct mt7921_dev *dev, u32 fif, |
| +int mt7921_mcu_set_rxfilter(struct mt792x_dev *dev, u32 fif, |
| u8 bit_op, u32 bit_map) |
| { |
| struct { |
| diff --git a/mt7921/mt7921.h b/mt7921/mt7921.h |
| index ec987965..87dd0685 100644 |
| --- a/mt7921/mt7921.h |
| +++ b/mt7921/mt7921.h |
| @@ -4,21 +4,8 @@ |
| #ifndef __MT7921_H |
| #define __MT7921_H |
| |
| -#include <linux/interrupt.h> |
| -#include <linux/ktime.h> |
| -#include "../mt76_connac_mcu.h" |
| +#include "../mt792x.h" |
| #include "regs.h" |
| -#include "acpi_sar.h" |
| - |
| -#define MT7921_MAX_INTERFACES 4 |
| -#define MT7921_WTBL_SIZE 20 |
| -#define MT7921_WTBL_RESERVED (MT7921_WTBL_SIZE - 1) |
| -#define MT7921_WTBL_STA (MT7921_WTBL_RESERVED - \ |
| - MT7921_MAX_INTERFACES) |
| - |
| -#define MT7921_PM_TIMEOUT (HZ / 12) |
| -#define MT7921_HW_SCAN_TIMEOUT (HZ / 10) |
| -#define MT7921_WATCHDOG_TIME (HZ / 4) |
| |
| #define MT7921_TX_RING_SIZE 2048 |
| #define MT7921_TX_MCU_RING_SIZE 256 |
| @@ -27,27 +14,11 @@ |
| #define MT7921_RX_RING_SIZE 1536 |
| #define MT7921_RX_MCU_RING_SIZE 512 |
| |
| -#define MT7921_DRV_OWN_RETRY_COUNT 10 |
| -#define MT7921_MCU_INIT_RETRY_COUNT 10 |
| -#define MT7921_WFSYS_INIT_RETRY_COUNT 2 |
| - |
| -#define MT7921_FW_TAG_FEATURE 4 |
| -#define MT7921_FW_CAP_CNM BIT(7) |
| - |
| -#define MT7921_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7961_1.bin" |
| -#define MT7921_ROM_PATCH "mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin" |
| - |
| -#define MT7922_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7922_1.bin" |
| -#define MT7922_ROM_PATCH "mediatek/WIFI_MT7922_patch_mcu_1_1_hdr.bin" |
| - |
| #define MT7921_EEPROM_SIZE 3584 |
| #define MT7921_TOKEN_SIZE 8192 |
| |
| #define MT7921_EEPROM_BLOCK_SIZE 16 |
| |
| -#define MT7921_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ |
| -#define MT7921_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ |
| - |
| #define MT7921_SKU_RATE_NUM 161 |
| #define MT7921_SKU_MAX_DELTA_IDX MT7921_SKU_RATE_NUM |
| #define MT7921_SKU_TABLE_SIZE (MT7921_SKU_RATE_NUM + 1) |
| @@ -127,9 +98,6 @@ struct mt7921_sdio_intr { |
| #define to_rssi(field, rxv) ((FIELD_GET(field, rxv) - 220) / 2) |
| #define to_rcpi(rssi) (2 * (rssi) + 220) |
| |
| -struct mt7921_vif; |
| -struct mt7921_sta; |
| - |
| enum mt7921_txq_id { |
| MT7921_TXQ_BAND0, |
| MT7921_TXQ_BAND1, |
| @@ -143,39 +111,6 @@ enum mt7921_rxq_id { |
| MT7921_RXQ_MCU_WM = 0, |
| }; |
| |
| -DECLARE_EWMA(avg_signal, 10, 8) |
| - |
| -struct mt7921_sta { |
| - struct mt76_wcid wcid; /* must be first */ |
| - |
| - struct mt7921_vif *vif; |
| - |
| - u32 airtime_ac[8]; |
| - |
| - int ack_signal; |
| - struct ewma_avg_signal avg_ack_signal; |
| - |
| - unsigned long last_txs; |
| - |
| - struct mt76_connac_sta_key_conf bip; |
| -}; |
| - |
| -DECLARE_EWMA(rssi, 10, 8); |
| - |
| -struct mt7921_vif { |
| - struct mt76_vif mt76; /* must be first */ |
| - |
| - struct mt7921_sta sta; |
| - struct mt7921_sta *wep_sta; |
| - |
| - struct mt7921_phy *phy; |
| - |
| - struct ewma_rssi rssi; |
| - |
| - struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; |
| - struct ieee80211_chanctx_conf *ctx; |
| -}; |
| - |
| enum { |
| MT7921_CLC_POWER, |
| MT7921_CLC_CHAN, |
| @@ -199,41 +134,6 @@ struct mt7921_clc { |
| u8 data[]; |
| } __packed; |
| |
| -struct mt7921_phy { |
| - struct mt76_phy *mt76; |
| - struct mt7921_dev *dev; |
| - |
| - struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; |
| - |
| - u64 omac_mask; |
| - |
| - u16 noise; |
| - |
| - s16 coverage_class; |
| - u8 slottime; |
| - |
| - u32 rx_ampdu_ts; |
| - u32 ampdu_ref; |
| - |
| - struct mt76_mib_stats mib; |
| - |
| - u8 sta_work_count; |
| - |
| - struct sk_buff_head scan_event_list; |
| - struct delayed_work scan_work; |
| -#ifdef CONFIG_ACPI |
| - struct mt7921_acpi_sar *acpisar; |
| -#endif |
| - |
| - struct mt7921_clc *clc[MT7921_CLC_MAX_NUM]; |
| - |
| - struct work_struct roc_work; |
| - struct timer_list roc_timer; |
| - wait_queue_head_t roc_wait; |
| - u8 roc_token_id; |
| - bool roc_grant; |
| -}; |
| - |
| enum mt7921_eeprom_field { |
| MT_EE_CHIP_ID = 0x000, |
| MT_EE_VERSION = 0x002, |
| @@ -245,49 +145,6 @@ enum mt7921_eeprom_field { |
| |
| #define MT_EE_HW_TYPE_ENCAP BIT(0) |
| |
| -#define mt7921_init_reset(dev) ((dev)->hif_ops->init_reset(dev)) |
| -#define mt7921_dev_reset(dev) ((dev)->hif_ops->reset(dev)) |
| -#define mt7921_mcu_init(dev) ((dev)->hif_ops->mcu_init(dev)) |
| -#define __mt7921_mcu_drv_pmctrl(dev) ((dev)->hif_ops->drv_own(dev)) |
| -#define __mt7921_mcu_fw_pmctrl(dev) ((dev)->hif_ops->fw_own(dev)) |
| -struct mt7921_hif_ops { |
| - int (*init_reset)(struct mt7921_dev *dev); |
| - int (*reset)(struct mt7921_dev *dev); |
| - int (*mcu_init)(struct mt7921_dev *dev); |
| - int (*drv_own)(struct mt7921_dev *dev); |
| - int (*fw_own)(struct mt7921_dev *dev); |
| -}; |
| - |
| -struct mt7921_dev { |
| - union { /* must be first */ |
| - struct mt76_dev mt76; |
| - struct mt76_phy mphy; |
| - }; |
| - |
| - const struct mt76_bus_ops *bus_ops; |
| - struct mt7921_phy phy; |
| - |
| - struct work_struct reset_work; |
| - bool hw_full_reset:1; |
| - bool hw_init_done:1; |
| - bool fw_assert:1; |
| - |
| - struct work_struct init_work; |
| - |
| - u8 fw_debug; |
| - u8 fw_features; |
| - |
| - struct mt76_connac_pm pm; |
| - struct mt76_connac_coredump coredump; |
| - const struct mt7921_hif_ops *hif_ops; |
| - |
| - struct work_struct ipv6_ns_work; |
| - /* IPv6 addresses for WoWLAN */ |
| - struct sk_buff_head ipv6_ns_list; |
| - |
| - enum environment_cap country_ie_env; |
| -}; |
| - |
| enum { |
| TXPWR_USER, |
| TXPWR_EEPROM, |
| @@ -318,56 +175,31 @@ struct mt7921_txpwr { |
| } data[TXPWR_MAX_NUM]; |
| }; |
| |
| -static inline struct mt7921_phy * |
| -mt7921_hw_phy(struct ieee80211_hw *hw) |
| -{ |
| - struct mt76_phy *phy = hw->priv; |
| - |
| - return phy->priv; |
| -} |
| - |
| -static inline struct mt7921_dev * |
| -mt7921_hw_dev(struct ieee80211_hw *hw) |
| -{ |
| - struct mt76_phy *phy = hw->priv; |
| - |
| - return container_of(phy->dev, struct mt7921_dev, mt76); |
| -} |
| - |
| -#define mt7921_mutex_acquire(dev) \ |
| - mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm) |
| -#define mt7921_mutex_release(dev) \ |
| - mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm) |
| - |
| extern const struct ieee80211_ops mt7921_ops; |
| |
| -u32 mt7921_reg_map(struct mt7921_dev *dev, u32 addr); |
| - |
| -int __mt7921_start(struct mt7921_phy *phy); |
| -int mt7921_register_device(struct mt7921_dev *dev); |
| -void mt7921_unregister_device(struct mt7921_dev *dev); |
| -int mt7921_dma_init(struct mt7921_dev *dev); |
| -int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force); |
| -int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev); |
| -void mt7921_dma_cleanup(struct mt7921_dev *dev); |
| -int mt7921_run_firmware(struct mt7921_dev *dev); |
| -int mt7921_mcu_set_bss_pm(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| +u32 mt7921_reg_map(struct mt792x_dev *dev, u32 addr); |
| + |
| +int __mt7921_start(struct mt792x_phy *phy); |
| +int mt7921_register_device(struct mt792x_dev *dev); |
| +void mt7921_unregister_device(struct mt792x_dev *dev); |
| +int mt7921_run_firmware(struct mt792x_dev *dev); |
| +int mt7921_mcu_set_bss_pm(struct mt792x_dev *dev, struct ieee80211_vif *vif, |
| bool enable); |
| -int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta, |
| +int mt7921_mcu_sta_update(struct mt792x_dev *dev, struct ieee80211_sta *sta, |
| struct ieee80211_vif *vif, bool enable, |
| enum mt76_sta_info_state state); |
| -int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd); |
| -int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif); |
| -int mt7921_mcu_set_eeprom(struct mt7921_dev *dev); |
| -int mt7921_mcu_get_rx_rate(struct mt7921_phy *phy, struct ieee80211_vif *vif, |
| +int mt7921_mcu_set_chan_info(struct mt792x_phy *phy, int cmd); |
| +int mt7921_mcu_set_tx(struct mt792x_dev *dev, struct ieee80211_vif *vif); |
| +int mt7921_mcu_set_eeprom(struct mt792x_dev *dev); |
| +int mt7921_mcu_get_rx_rate(struct mt792x_phy *phy, struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta, struct rate_info *rate); |
| -int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl); |
| -void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb); |
| -int mt7921_mcu_set_rxfilter(struct mt7921_dev *dev, u32 fif, |
| +int mt7921_mcu_fw_log_2_host(struct mt792x_dev *dev, u8 ctrl); |
| +void mt7921_mcu_rx_event(struct mt792x_dev *dev, struct sk_buff *skb); |
| +int mt7921_mcu_set_rxfilter(struct mt792x_dev *dev, u32 fif, |
| u8 bit_op, u32 bit_map); |
| |
| static inline u32 |
| -mt7921_reg_map_l1(struct mt7921_dev *dev, u32 addr) |
| +mt7921_reg_map_l1(struct mt792x_dev *dev, u32 addr) |
| { |
| u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr); |
| u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr); |
| @@ -380,19 +212,19 @@ mt7921_reg_map_l1(struct mt7921_dev *dev, u32 addr) |
| } |
| |
| static inline u32 |
| -mt7921_l1_rr(struct mt7921_dev *dev, u32 addr) |
| +mt7921_l1_rr(struct mt792x_dev *dev, u32 addr) |
| { |
| return mt76_rr(dev, mt7921_reg_map_l1(dev, addr)); |
| } |
| |
| static inline void |
| -mt7921_l1_wr(struct mt7921_dev *dev, u32 addr, u32 val) |
| +mt7921_l1_wr(struct mt792x_dev *dev, u32 addr, u32 val) |
| { |
| mt76_wr(dev, mt7921_reg_map_l1(dev, addr), val); |
| } |
| |
| static inline u32 |
| -mt7921_l1_rmw(struct mt7921_dev *dev, u32 addr, u32 mask, u32 val) |
| +mt7921_l1_rmw(struct mt792x_dev *dev, u32 addr, u32 mask, u32 val) |
| { |
| val |= mt7921_l1_rr(dev, addr) & ~mask; |
| mt7921_l1_wr(dev, addr, val); |
| @@ -403,13 +235,8 @@ mt7921_l1_rmw(struct mt7921_dev *dev, u32 addr, u32 mask, u32 val) |
| #define mt7921_l1_set(dev, addr, val) mt7921_l1_rmw(dev, addr, 0, val) |
| #define mt7921_l1_clear(dev, addr, val) mt7921_l1_rmw(dev, addr, val, 0) |
| |
| -static inline bool mt7921_dma_need_reinit(struct mt7921_dev *dev) |
| -{ |
| - return !mt76_get_field(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); |
| -} |
| - |
| static inline void |
| -mt7921_skb_add_usb_sdio_hdr(struct mt7921_dev *dev, struct sk_buff *skb, |
| +mt7921_skb_add_usb_sdio_hdr(struct mt792x_dev *dev, struct sk_buff *skb, |
| int type) |
| { |
| u32 hdr, len; |
| @@ -422,54 +249,41 @@ mt7921_skb_add_usb_sdio_hdr(struct mt7921_dev *dev, struct sk_buff *skb, |
| } |
| |
| void mt7921_stop(struct ieee80211_hw *hw); |
| -int mt7921_mac_init(struct mt7921_dev *dev); |
| -bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask); |
| -void mt7921_mac_reset_counters(struct mt7921_phy *phy); |
| -void mt7921_mac_set_timing(struct mt7921_phy *phy); |
| +int mt7921_mac_init(struct mt792x_dev *dev); |
| +bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask); |
| int mt7921_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta); |
| void mt7921_mac_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta); |
| void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, |
| struct ieee80211_sta *sta); |
| -void mt7921_mac_work(struct work_struct *work); |
| void mt7921_mac_reset_work(struct work_struct *work); |
| -void mt7921_mac_update_mib_stats(struct mt7921_phy *phy); |
| -void mt7921_reset(struct mt76_dev *mdev); |
| int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, |
| enum mt76_txq_id qid, struct mt76_wcid *wcid, |
| struct ieee80211_sta *sta, |
| struct mt76_tx_info *tx_info); |
| |
| -void mt7921_tx_worker(struct mt76_worker *w); |
| bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len); |
| void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, |
| struct sk_buff *skb, u32 *info); |
| void mt7921_stats_work(struct work_struct *work); |
| -void mt7921_set_stream_he_caps(struct mt7921_phy *phy); |
| -void mt7921_update_channel(struct mt76_phy *mphy); |
| -int mt7921_init_debugfs(struct mt7921_dev *dev); |
| +void mt7921_set_stream_he_caps(struct mt792x_phy *phy); |
| +int mt7921_init_debugfs(struct mt792x_dev *dev); |
| |
| -int mt7921_mcu_set_beacon_filter(struct mt7921_dev *dev, |
| +int mt7921_mcu_set_beacon_filter(struct mt792x_dev *dev, |
| struct ieee80211_vif *vif, |
| bool enable); |
| -int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev, |
| +int mt7921_mcu_uni_tx_ba(struct mt792x_dev *dev, |
| struct ieee80211_ampdu_params *params, |
| bool enable); |
| -int mt7921_mcu_uni_rx_ba(struct mt7921_dev *dev, |
| +int mt7921_mcu_uni_rx_ba(struct mt792x_dev *dev, |
| struct ieee80211_ampdu_params *params, |
| bool enable); |
| void mt7921_scan_work(struct work_struct *work); |
| void mt7921_roc_work(struct work_struct *work); |
| -void mt7921_roc_timer(struct timer_list *timer); |
| -int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif); |
| -int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev); |
| -int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev); |
| -void mt7921_pm_wake_work(struct work_struct *work); |
| -void mt7921_pm_power_save_work(struct work_struct *work); |
| +int mt7921_mcu_uni_bss_ps(struct mt792x_dev *dev, struct ieee80211_vif *vif); |
| void mt7921_coredump_work(struct work_struct *work); |
| -int mt7921_wfsys_reset(struct mt7921_dev *dev); |
| -int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr); |
| +int mt7921_get_txpwr_info(struct mt792x_dev *dev, struct mt7921_txpwr *txpwr); |
| int mt7921_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| void *data, int len); |
| int mt7921_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, |
| @@ -477,30 +291,27 @@ int mt7921_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, |
| int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd, |
| struct sk_buff *skb, int seq); |
| |
| -int mt7921e_driver_own(struct mt7921_dev *dev); |
| -int mt7921e_mac_reset(struct mt7921_dev *dev); |
| -int mt7921e_mcu_init(struct mt7921_dev *dev); |
| -int mt7921s_wfsys_reset(struct mt7921_dev *dev); |
| -int mt7921s_mac_reset(struct mt7921_dev *dev); |
| -int mt7921s_init_reset(struct mt7921_dev *dev); |
| -int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev); |
| -int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev); |
| -int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev); |
| - |
| -int mt7921s_mcu_init(struct mt7921_dev *dev); |
| -int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev); |
| -int mt7921s_mcu_fw_pmctrl(struct mt7921_dev *dev); |
| -void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data); |
| -void mt7921_set_runtime_pm(struct mt7921_dev *dev); |
| +int mt7921e_driver_own(struct mt792x_dev *dev); |
| +int mt7921e_mac_reset(struct mt792x_dev *dev); |
| +int mt7921e_mcu_init(struct mt792x_dev *dev); |
| +int mt7921s_wfsys_reset(struct mt792x_dev *dev); |
| +int mt7921s_mac_reset(struct mt792x_dev *dev); |
| +int mt7921s_init_reset(struct mt792x_dev *dev); |
| + |
| +int mt7921s_mcu_init(struct mt792x_dev *dev); |
| +int mt7921s_mcu_drv_pmctrl(struct mt792x_dev *dev); |
| +int mt7921s_mcu_fw_pmctrl(struct mt792x_dev *dev); |
| +void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data); |
| +void mt7921_set_runtime_pm(struct mt792x_dev *dev); |
| void mt7921_mcu_set_suspend_iter(void *priv, u8 *mac, |
| struct ieee80211_vif *vif); |
| void mt7921_set_ipv6_ns_work(struct work_struct *work); |
| |
| -int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif, |
| +int mt7921_mcu_set_sniffer(struct mt792x_dev *dev, struct ieee80211_vif *vif, |
| bool enable); |
| -int mt7921_mcu_config_sniffer(struct mt7921_vif *vif, |
| +int mt7921_mcu_config_sniffer(struct mt792x_vif *vif, |
| struct ieee80211_chanctx_conf *ctx); |
| -int mt7921_mcu_get_temperature(struct mt7921_phy *phy); |
| +int mt7921_mcu_get_temperature(struct mt792x_phy *phy); |
| |
| int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, |
| enum mt76_txq_id qid, struct mt76_wcid *wcid, |
| @@ -511,51 +322,18 @@ void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, |
| bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update); |
| |
| /* usb */ |
| -#define MT_USB_TYPE_VENDOR (USB_TYPE_VENDOR | 0x1f) |
| -#define MT_USB_TYPE_UHW_VENDOR (USB_TYPE_VENDOR | 0x1e) |
| - |
| -int mt7921u_mcu_power_on(struct mt7921_dev *dev); |
| -int mt7921u_wfsys_reset(struct mt7921_dev *dev); |
| -int mt7921u_dma_init(struct mt7921_dev *dev, bool resume); |
| -int mt7921u_init_reset(struct mt7921_dev *dev); |
| -int mt7921u_mac_reset(struct mt7921_dev *dev); |
| -int mt7921_mcu_uni_add_beacon_offload(struct mt7921_dev *dev, |
| +int mt7921_mcu_uni_add_beacon_offload(struct mt792x_dev *dev, |
| struct ieee80211_hw *hw, |
| struct ieee80211_vif *vif, |
| bool enable); |
| -#ifdef CONFIG_ACPI |
| -int mt7921_init_acpi_sar(struct mt7921_dev *dev); |
| -int mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default); |
| -u8 mt7921_acpi_get_flags(struct mt7921_phy *phy); |
| -#else |
| -static inline int |
| -mt7921_init_acpi_sar(struct mt7921_dev *dev) |
| -{ |
| - return 0; |
| -} |
| - |
| -static inline int |
| -mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default) |
| -{ |
| - return 0; |
| -} |
| - |
| -static inline u8 |
| -mt7921_acpi_get_flags(struct mt7921_phy *phy) |
| -{ |
| - return 0; |
| -} |
| -#endif |
| int mt7921_set_tx_sar_pwr(struct ieee80211_hw *hw, |
| const struct cfg80211_sar_specs *sar); |
| |
| -int mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2, |
| +int mt7921_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2, |
| enum environment_cap env_cap); |
| -int mt7921_mcu_set_roc(struct mt7921_phy *phy, struct mt7921_vif *vif, |
| +int mt7921_mcu_set_roc(struct mt792x_phy *phy, struct mt792x_vif *vif, |
| struct ieee80211_channel *chan, int duration, |
| enum mt7921_roc_req type, u8 token_id); |
| -int mt7921_mcu_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif, |
| +int mt7921_mcu_abort_roc(struct mt792x_phy *phy, struct mt792x_vif *vif, |
| u8 token_id); |
| -struct ieee80211_ops *mt7921_get_mac80211_ops(struct device *dev, |
| - void *drv_data, u8 *fw_features); |
| #endif |
| diff --git a/mt7921/pci.c b/mt7921/pci.c |
| index 7c8bf719..d869aab7 100644 |
| --- a/mt7921/pci.c |
| +++ b/mt7921/pci.c |
| @@ -9,8 +9,8 @@ |
| |
| #include "mt7921.h" |
| #include "../mt76_connac2_mac.h" |
| +#include "../dma.h" |
| #include "mcu.h" |
| -#include "../trace.h" |
| |
| static const struct pci_device_id mt7921_pci_device_table[] = { |
| { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7961), |
| @@ -28,81 +28,12 @@ static bool mt7921_disable_aspm; |
| module_param_named(disable_aspm, mt7921_disable_aspm, bool, 0644); |
| MODULE_PARM_DESC(disable_aspm, "disable PCI ASPM support"); |
| |
| -static void |
| -mt7921_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) |
| +static int mt7921e_init_reset(struct mt792x_dev *dev) |
| { |
| - if (q == MT_RXQ_MAIN) |
| - mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_DATA); |
| - else if (q == MT_RXQ_MCU_WA) |
| - mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM2); |
| - else |
| - mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM); |
| + return mt792x_wpdma_reset(dev, true); |
| } |
| |
| -static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance) |
| -{ |
| - struct mt7921_dev *dev = dev_instance; |
| - |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); |
| - |
| - if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) |
| - return IRQ_NONE; |
| - |
| - tasklet_schedule(&dev->mt76.irq_tasklet); |
| - |
| - return IRQ_HANDLED; |
| -} |
| - |
| -static void mt7921_irq_tasklet(unsigned long data) |
| -{ |
| - struct mt7921_dev *dev = (struct mt7921_dev *)data; |
| - u32 intr, mask = 0; |
| - |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); |
| - |
| - intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA); |
| - intr &= dev->mt76.mmio.irqmask; |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr); |
| - |
| - trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); |
| - |
| - mask |= intr & MT_INT_RX_DONE_ALL; |
| - if (intr & MT_INT_TX_DONE_MCU) |
| - mask |= MT_INT_TX_DONE_MCU; |
| - |
| - if (intr & MT_INT_MCU_CMD) { |
| - u32 intr_sw; |
| - |
| - intr_sw = mt76_rr(dev, MT_MCU_CMD); |
| - /* ack MCU2HOST_SW_INT_STA */ |
| - mt76_wr(dev, MT_MCU_CMD, intr_sw); |
| - if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) { |
| - mask |= MT_INT_RX_DONE_DATA; |
| - intr |= MT_INT_RX_DONE_DATA; |
| - } |
| - } |
| - |
| - mt76_set_irq_mask(&dev->mt76, MT_WFDMA0_HOST_INT_ENA, mask, 0); |
| - |
| - if (intr & MT_INT_TX_DONE_ALL) |
| - napi_schedule(&dev->mt76.tx_napi); |
| - |
| - if (intr & MT_INT_RX_DONE_WM) |
| - napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); |
| - |
| - if (intr & MT_INT_RX_DONE_WM2) |
| - napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); |
| - |
| - if (intr & MT_INT_RX_DONE_DATA) |
| - napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); |
| -} |
| - |
| -static int mt7921e_init_reset(struct mt7921_dev *dev) |
| -{ |
| - return mt7921_wpdma_reset(dev, true); |
| -} |
| - |
| -static void mt7921e_unregister_device(struct mt7921_dev *dev) |
| +static void mt7921e_unregister_device(struct mt792x_dev *dev) |
| { |
| int i; |
| struct mt76_connac_pm *pm = &dev->pm; |
| @@ -116,15 +47,15 @@ static void mt7921e_unregister_device(struct mt7921_dev *dev) |
| cancel_work_sync(&dev->reset_work); |
| |
| mt76_connac2_tx_token_put(&dev->mt76); |
| - __mt7921_mcu_drv_pmctrl(dev); |
| - mt7921_dma_cleanup(dev); |
| - mt7921_wfsys_reset(dev); |
| + __mt792x_mcu_drv_pmctrl(dev); |
| + mt792x_dma_cleanup(dev); |
| + mt792x_wfsys_reset(dev); |
| skb_queue_purge(&dev->mt76.mcu.res_q); |
| |
| tasklet_disable(&dev->mt76.irq_tasklet); |
| } |
| |
| -static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr) |
| +static u32 __mt7921_reg_addr(struct mt792x_dev *dev, u32 addr) |
| { |
| static const struct mt76_connac_reg_map fixed_map[] = { |
| { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ |
| @@ -203,7 +134,7 @@ static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr) |
| |
| static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| u32 addr = __mt7921_reg_addr(dev, offset); |
| |
| return dev->bus_ops->rr(mdev, addr); |
| @@ -211,7 +142,7 @@ static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset) |
| |
| static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| u32 addr = __mt7921_reg_addr(dev, offset); |
| |
| dev->bus_ops->wr(mdev, addr, val); |
| @@ -219,12 +150,77 @@ static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val) |
| |
| static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| u32 addr = __mt7921_reg_addr(dev, offset); |
| |
| return dev->bus_ops->rmw(mdev, addr, mask, val); |
| } |
| |
| +static int mt7921_dma_init(struct mt792x_dev *dev) |
| +{ |
| + int ret; |
| + |
| + mt76_dma_attach(&dev->mt76); |
| + |
| + ret = mt792x_dma_disable(dev, true); |
| + if (ret) |
| + return ret; |
| + |
| + /* init tx queue */ |
| + ret = mt76_connac_init_tx_queues(dev->phy.mt76, MT7921_TXQ_BAND0, |
| + MT7921_TX_RING_SIZE, |
| + MT_TX_RING_BASE, 0); |
| + if (ret) |
| + return ret; |
| + |
| + mt76_wr(dev, MT_WFDMA0_TX_RING0_EXT_CTRL, 0x4); |
| + |
| + /* command to WM */ |
| + ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7921_TXQ_MCU_WM, |
| + MT7921_TX_MCU_RING_SIZE, MT_TX_RING_BASE); |
| + if (ret) |
| + return ret; |
| + |
| + /* firmware download */ |
| + ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7921_TXQ_FWDL, |
| + MT7921_TX_FWDL_RING_SIZE, MT_TX_RING_BASE); |
| + if (ret) |
| + return ret; |
| + |
| + /* event from WM before firmware download */ |
| + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU], |
| + MT7921_RXQ_MCU_WM, |
| + MT7921_RX_MCU_RING_SIZE, |
| + MT_RX_BUF_SIZE, MT_RX_EVENT_RING_BASE); |
| + if (ret) |
| + return ret; |
| + |
| + /* Change mcu queue after firmware download */ |
| + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU_WA], |
| + MT7921_RXQ_MCU_WM, |
| + MT7921_RX_MCU_RING_SIZE, |
| + MT_RX_BUF_SIZE, MT_WFDMA0(0x540)); |
| + if (ret) |
| + return ret; |
| + |
| + /* rx data */ |
| + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], |
| + MT7921_RXQ_BAND0, MT7921_RX_RING_SIZE, |
| + MT_RX_BUF_SIZE, MT_RX_DATA_RING_BASE); |
| + if (ret) |
| + return ret; |
| + |
| + ret = mt76_init_queues(dev, mt792x_poll_rx); |
| + if (ret < 0) |
| + return ret; |
| + |
| + netif_napi_add_tx(&dev->mt76.tx_napi_dev, &dev->mt76.tx_napi, |
| + mt792x_poll_tx); |
| + napi_enable(&dev->mt76.tx_napi); |
| + |
| + return mt792x_dma_enable(dev); |
| +} |
| + |
| static int mt7921_pci_probe(struct pci_dev *pdev, |
| const struct pci_device_id *id) |
| { |
| @@ -241,22 +237,34 @@ static int mt7921_pci_probe(struct pci_dev *pdev, |
| .tx_complete_skb = mt76_connac_tx_complete_skb, |
| .rx_check = mt7921_rx_check, |
| .rx_skb = mt7921_queue_rx_skb, |
| - .rx_poll_complete = mt7921_rx_poll_complete, |
| + .rx_poll_complete = mt792x_rx_poll_complete, |
| .sta_add = mt7921_mac_sta_add, |
| .sta_assoc = mt7921_mac_sta_assoc, |
| .sta_remove = mt7921_mac_sta_remove, |
| - .update_survey = mt7921_update_channel, |
| + .update_survey = mt792x_update_channel, |
| }; |
| - static const struct mt7921_hif_ops mt7921_pcie_ops = { |
| + static const struct mt792x_hif_ops mt7921_pcie_ops = { |
| .init_reset = mt7921e_init_reset, |
| .reset = mt7921e_mac_reset, |
| .mcu_init = mt7921e_mcu_init, |
| - .drv_own = mt7921e_mcu_drv_pmctrl, |
| - .fw_own = mt7921e_mcu_fw_pmctrl, |
| + .drv_own = mt792xe_mcu_drv_pmctrl, |
| + .fw_own = mt792xe_mcu_fw_pmctrl, |
| + }; |
| + static const struct mt792x_irq_map irq_map = { |
| + .host_irq_enable = MT_WFDMA0_HOST_INT_ENA, |
| + .tx = { |
| + .all_complete_mask = MT_INT_TX_DONE_ALL, |
| + .mcu_complete_mask = MT_INT_TX_DONE_MCU, |
| + }, |
| + .rx = { |
| + .data_complete_mask = MT_INT_RX_DONE_DATA, |
| + .wm_complete_mask = MT_INT_RX_DONE_WM, |
| + .wm2_complete_mask = MT_INT_RX_DONE_WM2, |
| + }, |
| }; |
| struct ieee80211_ops *ops; |
| struct mt76_bus_ops *bus_ops; |
| - struct mt7921_dev *dev; |
| + struct mt792x_dev *dev; |
| struct mt76_dev *mdev; |
| u8 features; |
| int ret; |
| @@ -288,8 +296,8 @@ static int mt7921_pci_probe(struct pci_dev *pdev, |
| if (mt7921_disable_aspm) |
| mt76_pci_disable_aspm(pdev); |
| |
| - ops = mt7921_get_mac80211_ops(&pdev->dev, (void *)id->driver_data, |
| - &features); |
| + ops = mt792x_get_mac80211_ops(&pdev->dev, &mt7921_ops, |
| + (void *)id->driver_data, &features); |
| if (!ops) { |
| ret = -ENOMEM; |
| goto err_free_pci_vec; |
| @@ -303,11 +311,12 @@ static int mt7921_pci_probe(struct pci_dev *pdev, |
| |
| pci_set_drvdata(pdev, mdev); |
| |
| - dev = container_of(mdev, struct mt7921_dev, mt76); |
| + dev = container_of(mdev, struct mt792x_dev, mt76); |
| dev->fw_features = features; |
| dev->hif_ops = &mt7921_pcie_ops; |
| + dev->irq_map = &irq_map; |
| mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); |
| - tasklet_init(&mdev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev); |
| + tasklet_init(&mdev->irq_tasklet, mt792x_irq_tasklet, (unsigned long)dev); |
| |
| dev->phy.dev = dev; |
| dev->phy.mt76 = &dev->mt76.phy; |
| @@ -325,11 +334,11 @@ static int mt7921_pci_probe(struct pci_dev *pdev, |
| bus_ops->rmw = mt7921_rmw; |
| dev->mt76.bus = bus_ops; |
| |
| - ret = mt7921e_mcu_fw_pmctrl(dev); |
| + ret = mt792xe_mcu_fw_pmctrl(dev); |
| if (ret) |
| goto err_free_dev; |
| |
| - ret = __mt7921e_mcu_drv_pmctrl(dev); |
| + ret = __mt792xe_mcu_drv_pmctrl(dev); |
| if (ret) |
| goto err_free_dev; |
| |
| @@ -337,15 +346,15 @@ static int mt7921_pci_probe(struct pci_dev *pdev, |
| (mt7921_l1_rr(dev, MT_HW_REV) & 0xff); |
| dev_info(mdev->dev, "ASIC revision: %04x\n", mdev->rev); |
| |
| - ret = mt7921_wfsys_reset(dev); |
| + ret = mt792x_wfsys_reset(dev); |
| if (ret) |
| goto err_free_dev; |
| |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); |
| + mt76_wr(dev, irq_map.host_irq_enable, 0); |
| |
| mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); |
| |
| - ret = devm_request_irq(mdev->dev, pdev->irq, mt7921_irq_handler, |
| + ret = devm_request_irq(mdev->dev, pdev->irq, mt792x_irq_handler, |
| IRQF_SHARED, KBUILD_MODNAME, dev); |
| if (ret) |
| goto err_free_dev; |
| @@ -373,7 +382,7 @@ err_free_pci_vec: |
| static void mt7921_pci_remove(struct pci_dev *pdev) |
| { |
| struct mt76_dev *mdev = pci_get_drvdata(pdev); |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| |
| mt7921e_unregister_device(dev); |
| devm_free_irq(&pdev->dev, pdev->irq, dev); |
| @@ -385,7 +394,7 @@ static int mt7921_pci_suspend(struct device *device) |
| { |
| struct pci_dev *pdev = to_pci_dev(device); |
| struct mt76_dev *mdev = pci_get_drvdata(pdev); |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| struct mt76_connac_pm *pm = &dev->pm; |
| int i, err; |
| |
| @@ -394,7 +403,7 @@ static int mt7921_pci_suspend(struct device *device) |
| cancel_delayed_work_sync(&pm->ps_work); |
| cancel_work_sync(&pm->wake_work); |
| |
| - err = mt7921_mcu_drv_pmctrl(dev); |
| + err = mt792x_mcu_drv_pmctrl(dev); |
| if (err < 0) |
| goto restore_suspend; |
| |
| @@ -424,12 +433,12 @@ static int mt7921_pci_suspend(struct device *device) |
| MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
| |
| /* disable interrupt */ |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); |
| + mt76_wr(dev, dev->irq_map->host_irq_enable, 0); |
| mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0); |
| synchronize_irq(pdev->irq); |
| tasklet_kill(&mdev->irq_tasklet); |
| |
| - err = mt7921_mcu_fw_pmctrl(dev); |
| + err = mt792x_mcu_fw_pmctrl(dev); |
| if (err) |
| goto restore_napi; |
| |
| @@ -450,7 +459,7 @@ restore_suspend: |
| pm->suspended = false; |
| |
| if (err < 0) |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| |
| return err; |
| } |
| @@ -459,21 +468,21 @@ static int mt7921_pci_resume(struct device *device) |
| { |
| struct pci_dev *pdev = to_pci_dev(device); |
| struct mt76_dev *mdev = pci_get_drvdata(pdev); |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| struct mt76_connac_pm *pm = &dev->pm; |
| int i, err; |
| |
| - err = mt7921_mcu_drv_pmctrl(dev); |
| + err = mt792x_mcu_drv_pmctrl(dev); |
| if (err < 0) |
| goto failed; |
| |
| - mt7921_wpdma_reinit_cond(dev); |
| + mt792x_wpdma_reinit_cond(dev); |
| |
| /* enable interrupt */ |
| mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); |
| mt76_connac_irq_enable(&dev->mt76, |
| - MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | |
| - MT_INT_MCU_CMD); |
| + dev->irq_map->tx.all_complete_mask | |
| + MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD); |
| mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE); |
| |
| /* put dma enabled */ |
| @@ -500,7 +509,7 @@ failed: |
| pm->suspended = false; |
| |
| if (err < 0) |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| |
| return err; |
| } |
| diff --git a/mt7921/pci_mac.c b/mt7921/pci_mac.c |
| index 978c90a0..e7a995e7 100644 |
| --- a/mt7921/pci_mac.c |
| +++ b/mt7921/pci_mac.c |
| @@ -10,7 +10,7 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, |
| struct ieee80211_sta *sta, |
| struct mt76_tx_info *tx_info) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); |
| struct ieee80211_key_conf *key = info->control.hw_key; |
| struct mt76_connac_hw_txp *txp; |
| @@ -32,7 +32,7 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, |
| return id; |
| |
| if (sta) { |
| - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| |
| if (time_after(jiffies, msta->last_txs + HZ / 4)) { |
| info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; |
| @@ -53,15 +53,15 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, |
| return 0; |
| } |
| |
| -int mt7921e_mac_reset(struct mt7921_dev *dev) |
| +int mt7921e_mac_reset(struct mt792x_dev *dev) |
| { |
| int i, err; |
| |
| - mt7921e_mcu_drv_pmctrl(dev); |
| + mt792xe_mcu_drv_pmctrl(dev); |
| |
| mt76_connac_free_pending_tx_skbs(&dev->pm, NULL); |
| |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); |
| + mt76_wr(dev, dev->irq_map->host_irq_enable, 0); |
| mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0); |
| |
| set_bit(MT76_RESET, &dev->mphy.state); |
| @@ -80,7 +80,7 @@ int mt7921e_mac_reset(struct mt7921_dev *dev) |
| mt76_connac2_tx_token_put(&dev->mt76); |
| idr_init(&dev->mt76.token); |
| |
| - mt7921_wpdma_reset(dev, true); |
| + mt792x_wpdma_reset(dev, true); |
| |
| local_bh_disable(); |
| mt76_for_each_q_rx(&dev->mt76, i) { |
| @@ -92,9 +92,9 @@ int mt7921e_mac_reset(struct mt7921_dev *dev) |
| dev->fw_assert = false; |
| clear_bit(MT76_MCU_RESET, &dev->mphy.state); |
| |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, |
| - MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | |
| - MT_INT_MCU_CMD); |
| + mt76_wr(dev, dev->irq_map->host_irq_enable, |
| + dev->irq_map->tx.all_complete_mask | |
| + MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD); |
| mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); |
| |
| err = mt7921e_driver_own(dev); |
| diff --git a/mt7921/pci_mcu.c b/mt7921/pci_mcu.c |
| index 1aefbb6c..4cf1f2f0 100644 |
| --- a/mt7921/pci_mcu.c |
| +++ b/mt7921/pci_mcu.c |
| @@ -4,7 +4,7 @@ |
| #include "mt7921.h" |
| #include "mcu.h" |
| |
| -int mt7921e_driver_own(struct mt7921_dev *dev) |
| +int mt7921e_driver_own(struct mt792x_dev *dev) |
| { |
| u32 reg = mt7921_reg_map_l1(dev, MT_TOP_LPCR_HOST_BAND0); |
| |
| @@ -22,7 +22,7 @@ static int |
| mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| int cmd, int *seq) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| enum mt76_mcuq_id txq = MT_MCUQ_WM; |
| int ret; |
| |
| @@ -38,7 +38,7 @@ mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[txq], skb, 0); |
| } |
| |
| -int mt7921e_mcu_init(struct mt7921_dev *dev) |
| +int mt7921e_mcu_init(struct mt792x_dev *dev) |
| { |
| static const struct mt76_mcu_ops mt7921_mcu_ops = { |
| .headroom = sizeof(struct mt76_connac2_mcu_txd), |
| @@ -61,68 +61,3 @@ int mt7921e_mcu_init(struct mt7921_dev *dev) |
| |
| return err; |
| } |
| - |
| -int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| -{ |
| - int i, err = 0; |
| - |
| - for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { |
| - mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN); |
| - if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL, |
| - PCIE_LPCR_HOST_OWN_SYNC, 0, 50, 1)) |
| - break; |
| - } |
| - |
| - if (i == MT7921_DRV_OWN_RETRY_COUNT) { |
| - dev_err(dev->mt76.dev, "driver own failed\n"); |
| - err = -EIO; |
| - } |
| - |
| - return err; |
| -} |
| - |
| -int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| -{ |
| - struct mt76_phy *mphy = &dev->mt76.phy; |
| - struct mt76_connac_pm *pm = &dev->pm; |
| - int err; |
| - |
| - err = __mt7921e_mcu_drv_pmctrl(dev); |
| - if (err < 0) |
| - goto out; |
| - |
| - mt7921_wpdma_reinit_cond(dev); |
| - clear_bit(MT76_STATE_PM, &mphy->state); |
| - |
| - pm->stats.last_wake_event = jiffies; |
| - pm->stats.doze_time += pm->stats.last_wake_event - |
| - pm->stats.last_doze_event; |
| -out: |
| - return err; |
| -} |
| - |
| -int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev) |
| -{ |
| - struct mt76_phy *mphy = &dev->mt76.phy; |
| - struct mt76_connac_pm *pm = &dev->pm; |
| - int i; |
| - |
| - for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { |
| - mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN); |
| - if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL, |
| - PCIE_LPCR_HOST_OWN_SYNC, 4, 50, 1)) |
| - break; |
| - } |
| - |
| - if (i == MT7921_DRV_OWN_RETRY_COUNT) { |
| - dev_err(dev->mt76.dev, "firmware own failed\n"); |
| - clear_bit(MT76_STATE_PM, &mphy->state); |
| - return -EIO; |
| - } |
| - |
| - pm->stats.last_doze_event = jiffies; |
| - pm->stats.awake_time += pm->stats.last_doze_event - |
| - pm->stats.last_wake_event; |
| - |
| - return 0; |
| -} |
| diff --git a/mt7921/regs.h b/mt7921/regs.h |
| index b1801425..43427a3a 100644 |
| --- a/mt7921/regs.h |
| +++ b/mt7921/regs.h |
| @@ -4,26 +4,7 @@ |
| #ifndef __MT7921_REGS_H |
| #define __MT7921_REGS_H |
| |
| -/* MCU WFDMA1 */ |
| -#define MT_MCU_WFDMA1_BASE 0x3000 |
| -#define MT_MCU_WFDMA1(ofs) (MT_MCU_WFDMA1_BASE + (ofs)) |
| - |
| -#define MT_MCU_INT_EVENT MT_MCU_WFDMA1(0x108) |
| -#define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0) |
| -#define MT_MCU_INT_EVENT_DMA_INIT BIT(1) |
| -#define MT_MCU_INT_EVENT_SER_TRIGGER BIT(2) |
| -#define MT_MCU_INT_EVENT_RESET_DONE BIT(3) |
| - |
| -#define MT_PLE_BASE 0x820c0000 |
| -#define MT_PLE(ofs) (MT_PLE_BASE + (ofs)) |
| - |
| -#define MT_PLE_FL_Q0_CTRL MT_PLE(0x3e0) |
| -#define MT_PLE_FL_Q1_CTRL MT_PLE(0x3e4) |
| -#define MT_PLE_FL_Q2_CTRL MT_PLE(0x3e8) |
| -#define MT_PLE_FL_Q3_CTRL MT_PLE(0x3ec) |
| - |
| -#define MT_PLE_AC_QEMPTY(_n) MT_PLE(0x500 + 0x40 * (_n)) |
| -#define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2)) |
| +#include "../mt792x_regs.h" |
| |
| #define MT_MDP_BASE 0x820cd000 |
| #define MT_MDP(ofs) (MT_MDP_BASE + (ofs)) |
| @@ -47,279 +28,7 @@ |
| #define MT_MDP_TO_HIF 0 |
| #define MT_MDP_TO_WM 1 |
| |
| -/* TMAC: band 0(0x21000), band 1(0xa1000) */ |
| -#define MT_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000) |
| -#define MT_WF_TMAC(_band, ofs) (MT_WF_TMAC_BASE(_band) + (ofs)) |
| - |
| -#define MT_TMAC_TCR0(_band) MT_WF_TMAC(_band, 0) |
| -#define MT_TMAC_TCR0_TBTT_STOP_CTRL BIT(25) |
| - |
| -#define MT_TMAC_CDTR(_band) MT_WF_TMAC(_band, 0x090) |
| -#define MT_TMAC_ODTR(_band) MT_WF_TMAC(_band, 0x094) |
| -#define MT_TIMEOUT_VAL_PLCP GENMASK(15, 0) |
| -#define MT_TIMEOUT_VAL_CCA GENMASK(31, 16) |
| - |
| -#define MT_TMAC_ICR0(_band) MT_WF_TMAC(_band, 0x0a4) |
| -#define MT_IFS_EIFS GENMASK(8, 0) |
| -#define MT_IFS_RIFS GENMASK(14, 10) |
| -#define MT_IFS_SIFS GENMASK(22, 16) |
| -#define MT_IFS_SLOT GENMASK(30, 24) |
| - |
| -#define MT_TMAC_CTCR0(_band) MT_WF_TMAC(_band, 0x0f4) |
| -#define MT_TMAC_CTCR0_INS_DDLMT_REFTIME GENMASK(5, 0) |
| -#define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17) |
| -#define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18) |
| - |
| -#define MT_TMAC_TRCR0(_band) MT_WF_TMAC(_band, 0x09c) |
| -#define MT_TMAC_TFCR0(_band) MT_WF_TMAC(_band, 0x1e0) |
| - |
| -#define MT_WF_DMA_BASE(_band) ((_band) ? 0x820f7000 : 0x820e7000) |
| -#define MT_WF_DMA(_band, ofs) (MT_WF_DMA_BASE(_band) + (ofs)) |
| - |
| -#define MT_DMA_DCR0(_band) MT_WF_DMA(_band, 0x000) |
| -#define MT_DMA_DCR0_MAX_RX_LEN GENMASK(15, 3) |
| -#define MT_DMA_DCR0_RXD_G5_EN BIT(23) |
| - |
| -/* WTBLOFF TOP: band 0(0x820e9000),band 1(0x820f9000) */ |
| -#define MT_WTBLOFF_TOP_BASE(_band) ((_band) ? 0x820f9000 : 0x820e9000) |
| -#define MT_WTBLOFF_TOP(_band, ofs) (MT_WTBLOFF_TOP_BASE(_band) + (ofs)) |
| - |
| -#define MT_WTBLOFF_TOP_RSCR(_band) MT_WTBLOFF_TOP(_band, 0x008) |
| -#define MT_WTBLOFF_TOP_RSCR_RCPI_MODE GENMASK(31, 30) |
| -#define MT_WTBLOFF_TOP_RSCR_RCPI_PARAM GENMASK(25, 24) |
| - |
| -/* LPON: band 0(0x24200), band 1(0xa4200) */ |
| -#define MT_WF_LPON_BASE(_band) ((_band) ? 0x820fb000 : 0x820eb000) |
| -#define MT_WF_LPON(_band, ofs) (MT_WF_LPON_BASE(_band) + (ofs)) |
| - |
| -#define MT_LPON_UTTR0(_band) MT_WF_LPON(_band, 0x080) |
| -#define MT_LPON_UTTR1(_band) MT_WF_LPON(_band, 0x084) |
| - |
| -#define MT_LPON_TCR(_band, n) MT_WF_LPON(_band, 0x0a8 + (n) * 4) |
| -#define MT_LPON_TCR_SW_MODE GENMASK(1, 0) |
| -#define MT_LPON_TCR_SW_WRITE BIT(0) |
| - |
| -/* ETBF: band 0(0x24000), band 1(0xa4000) */ |
| -#define MT_WF_ETBF_BASE(_band) ((_band) ? 0x820fa000 : 0x820ea000) |
| -#define MT_WF_ETBF(_band, ofs) (MT_WF_ETBF_BASE(_band) + (ofs)) |
| - |
| -#define MT_ETBF_TX_APP_CNT(_band) MT_WF_ETBF(_band, 0x150) |
| -#define MT_ETBF_TX_IBF_CNT GENMASK(31, 16) |
| -#define MT_ETBF_TX_EBF_CNT GENMASK(15, 0) |
| - |
| -#define MT_ETBF_RX_FB_CNT(_band) MT_WF_ETBF(_band, 0x158) |
| -#define MT_ETBF_RX_FB_ALL GENMASK(31, 24) |
| -#define MT_ETBF_RX_FB_HE GENMASK(23, 16) |
| -#define MT_ETBF_RX_FB_VHT GENMASK(15, 8) |
| -#define MT_ETBF_RX_FB_HT GENMASK(7, 0) |
| - |
| -/* MIB: band 0(0x24800), band 1(0xa4800) */ |
| -#define MT_WF_MIB_BASE(_band) ((_band) ? 0x820fd000 : 0x820ed000) |
| -#define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs)) |
| - |
| -#define MT_MIB_SCR1(_band) MT_WF_MIB(_band, 0x004) |
| -#define MT_MIB_TXDUR_EN BIT(8) |
| -#define MT_MIB_RXDUR_EN BIT(9) |
| - |
| -#define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x698) |
| -#define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(31, 16) |
| - |
| -#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, 0x780) |
| - |
| -#define MT_MIB_SDR9(_band) MT_WF_MIB(_band, 0x02c) |
| -#define MT_MIB_SDR9_BUSY_MASK GENMASK(23, 0) |
| - |
| -#define MT_MIB_SDR12(_band) MT_WF_MIB(_band, 0x558) |
| -#define MT_MIB_SDR14(_band) MT_WF_MIB(_band, 0x564) |
| -#define MT_MIB_SDR15(_band) MT_WF_MIB(_band, 0x568) |
| - |
| -#define MT_MIB_SDR16(_band) MT_WF_MIB(_band, 0x048) |
| -#define MT_MIB_SDR16_BUSY_MASK GENMASK(23, 0) |
| - |
| -#define MT_MIB_SDR22(_band) MT_WF_MIB(_band, 0x770) |
| -#define MT_MIB_SDR23(_band) MT_WF_MIB(_band, 0x774) |
| -#define MT_MIB_SDR31(_band) MT_WF_MIB(_band, 0x55c) |
| - |
| -#define MT_MIB_SDR32(_band) MT_WF_MIB(_band, 0x7a8) |
| -#define MT_MIB_SDR9_IBF_CNT_MASK GENMASK(31, 16) |
| -#define MT_MIB_SDR9_EBF_CNT_MASK GENMASK(15, 0) |
| - |
| -#define MT_MIB_SDR34(_band) MT_WF_MIB(_band, 0x090) |
| -#define MT_MIB_MU_BF_TX_CNT GENMASK(15, 0) |
| - |
| -#define MT_MIB_SDR36(_band) MT_WF_MIB(_band, 0x054) |
| -#define MT_MIB_SDR36_TXTIME_MASK GENMASK(23, 0) |
| -#define MT_MIB_SDR37(_band) MT_WF_MIB(_band, 0x058) |
| -#define MT_MIB_SDR37_RXTIME_MASK GENMASK(23, 0) |
| - |
| -#define MT_MIB_DR8(_band) MT_WF_MIB(_band, 0x0c0) |
| -#define MT_MIB_DR9(_band) MT_WF_MIB(_band, 0x0c4) |
| -#define MT_MIB_DR11(_band) MT_WF_MIB(_band, 0x0cc) |
| - |
| -#define MT_MIB_MB_SDR0(_band, n) MT_WF_MIB(_band, 0x100 + ((n) << 4)) |
| -#define MT_MIB_RTS_RETRIES_COUNT_MASK GENMASK(31, 16) |
| - |
| -#define MT_MIB_MB_BSDR0(_band) MT_WF_MIB(_band, 0x688) |
| -#define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0) |
| -#define MT_MIB_MB_BSDR1(_band) MT_WF_MIB(_band, 0x690) |
| -#define MT_MIB_RTS_FAIL_COUNT_MASK GENMASK(15, 0) |
| -#define MT_MIB_MB_BSDR2(_band) MT_WF_MIB(_band, 0x518) |
| -#define MT_MIB_BA_FAIL_COUNT_MASK GENMASK(15, 0) |
| -#define MT_MIB_MB_BSDR3(_band) MT_WF_MIB(_band, 0x520) |
| -#define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(15, 0) |
| - |
| -#define MT_MIB_MB_SDR2(_band, n) MT_WF_MIB(_band, 0x108 + ((n) << 4)) |
| -#define MT_MIB_FRAME_RETRIES_COUNT_MASK GENMASK(15, 0) |
| - |
| -#define MT_TX_AGG_CNT(_band, n) MT_WF_MIB(_band, 0x7dc + ((n) << 2)) |
| -#define MT_TX_AGG_CNT2(_band, n) MT_WF_MIB(_band, 0x7ec + ((n) << 2)) |
| -#define MT_MIB_ARNG(_band, n) MT_WF_MIB(_band, 0x0b0 + ((n) << 2)) |
| -#define MT_MIB_ARNCR_RANGE(val, n) (((val) >> ((n) << 3)) & GENMASK(7, 0)) |
| - |
| -#define MT_WTBLON_TOP_BASE 0x820d4000 |
| -#define MT_WTBLON_TOP(ofs) (MT_WTBLON_TOP_BASE + (ofs)) |
| -#define MT_WTBLON_TOP_WDUCR MT_WTBLON_TOP(0x200) |
| -#define MT_WTBLON_TOP_WDUCR_GROUP GENMASK(2, 0) |
| - |
| -#define MT_WTBL_UPDATE MT_WTBLON_TOP(0x230) |
| -#define MT_WTBL_UPDATE_WLAN_IDX GENMASK(9, 0) |
| -#define MT_WTBL_UPDATE_ADM_COUNT_CLEAR BIT(12) |
| -#define MT_WTBL_UPDATE_BUSY BIT(31) |
| - |
| -#define MT_WTBL_BASE 0x820d8000 |
| -#define MT_WTBL_LMAC_ID GENMASK(14, 8) |
| -#define MT_WTBL_LMAC_DW GENMASK(7, 2) |
| -#define MT_WTBL_LMAC_OFFS(_id, _dw) (MT_WTBL_BASE | \ |
| - FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \ |
| - FIELD_PREP(MT_WTBL_LMAC_DW, _dw)) |
| - |
| -/* AGG: band 0(0x20800), band 1(0xa0800) */ |
| -#define MT_WF_AGG_BASE(_band) ((_band) ? 0x820f2000 : 0x820e2000) |
| -#define MT_WF_AGG(_band, ofs) (MT_WF_AGG_BASE(_band) + (ofs)) |
| - |
| -#define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, 0x05c + (_n) * 4) |
| -#define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, 0x06c + (_n) * 4) |
| -#define MT_AGG_PCR0_MM_PROT BIT(0) |
| -#define MT_AGG_PCR0_GF_PROT BIT(1) |
| -#define MT_AGG_PCR0_BW20_PROT BIT(2) |
| -#define MT_AGG_PCR0_BW40_PROT BIT(4) |
| -#define MT_AGG_PCR0_BW80_PROT BIT(6) |
| -#define MT_AGG_PCR0_ERP_PROT GENMASK(12, 8) |
| -#define MT_AGG_PCR0_VHT_PROT BIT(13) |
| -#define MT_AGG_PCR0_PTA_WIN_DIS BIT(15) |
| - |
| -#define MT_AGG_PCR1_RTS0_NUM_THRES GENMASK(31, 23) |
| -#define MT_AGG_PCR1_RTS0_LEN_THRES GENMASK(19, 0) |
| - |
| -#define MT_AGG_ACR0(_band) MT_WF_AGG(_band, 0x084) |
| -#define MT_AGG_ACR_CFEND_RATE GENMASK(13, 0) |
| -#define MT_AGG_ACR_BAR_RATE GENMASK(29, 16) |
| - |
| -#define MT_AGG_MRCR(_band) MT_WF_AGG(_band, 0x098) |
| -#define MT_AGG_MRCR_BAR_CNT_LIMIT GENMASK(15, 12) |
| -#define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6) |
| -#define MT_AGG_MRCR_RTS_FAIL_LIMIT GENMASK(11, 7) |
| -#define MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT GENMASK(28, 24) |
| - |
| -#define MT_AGG_ATCR1(_band) MT_WF_AGG(_band, 0x0f0) |
| -#define MT_AGG_ATCR3(_band) MT_WF_AGG(_band, 0x0f4) |
| - |
| -/* ARB: band 0(0x20c00), band 1(0xa0c00) */ |
| -#define MT_WF_ARB_BASE(_band) ((_band) ? 0x820f3000 : 0x820e3000) |
| -#define MT_WF_ARB(_band, ofs) (MT_WF_ARB_BASE(_band) + (ofs)) |
| - |
| -#define MT_ARB_SCR(_band) MT_WF_ARB(_band, 0x080) |
| -#define MT_ARB_SCR_TX_DISABLE BIT(8) |
| -#define MT_ARB_SCR_RX_DISABLE BIT(9) |
| - |
| -#define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, 0x194 + (_n) * 4) |
| - |
| -/* RMAC: band 0(0x21400), band 1(0xa1400) */ |
| -#define MT_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820e5000) |
| -#define MT_WF_RMAC(_band, ofs) (MT_WF_RMAC_BASE(_band) + (ofs)) |
| - |
| -#define MT_WF_RFCR(_band) MT_WF_RMAC(_band, 0x000) |
| -#define MT_WF_RFCR_DROP_STBC_MULTI BIT(0) |
| -#define MT_WF_RFCR_DROP_FCSFAIL BIT(1) |
| -#define MT_WF_RFCR_DROP_VERSION BIT(3) |
| -#define MT_WF_RFCR_DROP_PROBEREQ BIT(4) |
| -#define MT_WF_RFCR_DROP_MCAST BIT(5) |
| -#define MT_WF_RFCR_DROP_BCAST BIT(6) |
| -#define MT_WF_RFCR_DROP_MCAST_FILTERED BIT(7) |
| -#define MT_WF_RFCR_DROP_A3_MAC BIT(8) |
| -#define MT_WF_RFCR_DROP_A3_BSSID BIT(9) |
| -#define MT_WF_RFCR_DROP_A2_BSSID BIT(10) |
| -#define MT_WF_RFCR_DROP_OTHER_BEACON BIT(11) |
| -#define MT_WF_RFCR_DROP_FRAME_REPORT BIT(12) |
| -#define MT_WF_RFCR_DROP_CTL_RSV BIT(13) |
| -#define MT_WF_RFCR_DROP_CTS BIT(14) |
| -#define MT_WF_RFCR_DROP_RTS BIT(15) |
| -#define MT_WF_RFCR_DROP_DUPLICATE BIT(16) |
| -#define MT_WF_RFCR_DROP_OTHER_BSS BIT(17) |
| -#define MT_WF_RFCR_DROP_OTHER_UC BIT(18) |
| -#define MT_WF_RFCR_DROP_OTHER_TIM BIT(19) |
| -#define MT_WF_RFCR_DROP_NDPA BIT(20) |
| -#define MT_WF_RFCR_DROP_UNWANTED_CTL BIT(21) |
| - |
| -#define MT_WF_RFCR1(_band) MT_WF_RMAC(_band, 0x004) |
| -#define MT_WF_RFCR1_DROP_ACK BIT(4) |
| -#define MT_WF_RFCR1_DROP_BF_POLL BIT(5) |
| -#define MT_WF_RFCR1_DROP_BA BIT(6) |
| -#define MT_WF_RFCR1_DROP_CFEND BIT(7) |
| -#define MT_WF_RFCR1_DROP_CFACK BIT(8) |
| - |
| -#define MT_WF_RMAC_MIB_TIME0(_band) MT_WF_RMAC(_band, 0x03c4) |
| -#define MT_WF_RMAC_MIB_RXTIME_CLR BIT(31) |
| -#define MT_WF_RMAC_MIB_RXTIME_EN BIT(30) |
| - |
| -#define MT_WF_RMAC_MIB_AIRTIME14(_band) MT_WF_RMAC(_band, 0x03b8) |
| -#define MT_MIB_OBSSTIME_MASK GENMASK(23, 0) |
| -#define MT_WF_RMAC_MIB_AIRTIME0(_band) MT_WF_RMAC(_band, 0x0380) |
| - |
| -/* WFDMA0 */ |
| -#define MT_WFDMA0_BASE 0xd4000 |
| -#define MT_WFDMA0(ofs) (MT_WFDMA0_BASE + (ofs)) |
| - |
| -#define MT_WFDMA0_RST MT_WFDMA0(0x100) |
| -#define MT_WFDMA0_RST_LOGIC_RST BIT(4) |
| -#define MT_WFDMA0_RST_DMASHDL_ALL_RST BIT(5) |
| - |
| -#define MT_WFDMA0_BUSY_ENA MT_WFDMA0(0x13c) |
| -#define MT_WFDMA0_BUSY_ENA_TX_FIFO0 BIT(0) |
| -#define MT_WFDMA0_BUSY_ENA_TX_FIFO1 BIT(1) |
| -#define MT_WFDMA0_BUSY_ENA_RX_FIFO BIT(2) |
| - |
| -#define MT_MCU_CMD MT_WFDMA0(0x1f0) |
| -#define MT_MCU_CMD_WAKE_RX_PCIE BIT(0) |
| -#define MT_MCU_CMD_STOP_DMA_FW_RELOAD BIT(1) |
| -#define MT_MCU_CMD_STOP_DMA BIT(2) |
| -#define MT_MCU_CMD_RESET_DONE BIT(3) |
| -#define MT_MCU_CMD_RECOVERY_DONE BIT(4) |
| -#define MT_MCU_CMD_NORMAL_STATE BIT(5) |
| -#define MT_MCU_CMD_ERROR_MASK GENMASK(5, 1) |
| - |
| -#define MT_MCU2HOST_SW_INT_ENA MT_WFDMA0(0x1f4) |
| - |
| -#define MT_WFDMA0_HOST_INT_STA MT_WFDMA0(0x200) |
| -#define HOST_RX_DONE_INT_STS0 BIT(0) /* Rx mcu */ |
| -#define HOST_RX_DONE_INT_STS2 BIT(2) /* Rx data */ |
| -#define HOST_RX_DONE_INT_STS4 BIT(22) /* Rx mcu after fw downloaded */ |
| -#define HOST_TX_DONE_INT_STS16 BIT(26) |
| -#define HOST_TX_DONE_INT_STS17 BIT(27) /* MCU tx done*/ |
| - |
| #define MT_WFDMA0_HOST_INT_ENA MT_WFDMA0(0x204) |
| -#define HOST_RX_DONE_INT_ENA0 BIT(0) |
| -#define HOST_RX_DONE_INT_ENA1 BIT(1) |
| -#define HOST_RX_DONE_INT_ENA2 BIT(2) |
| -#define HOST_RX_DONE_INT_ENA3 BIT(3) |
| -#define HOST_TX_DONE_INT_ENA0 BIT(4) |
| -#define HOST_TX_DONE_INT_ENA1 BIT(5) |
| -#define HOST_TX_DONE_INT_ENA2 BIT(6) |
| -#define HOST_TX_DONE_INT_ENA3 BIT(7) |
| -#define HOST_TX_DONE_INT_ENA4 BIT(8) |
| -#define HOST_TX_DONE_INT_ENA5 BIT(9) |
| -#define HOST_TX_DONE_INT_ENA6 BIT(10) |
| -#define HOST_TX_DONE_INT_ENA7 BIT(11) |
| #define HOST_TX_DONE_INT_ENA8 BIT(12) |
| #define HOST_TX_DONE_INT_ENA9 BIT(13) |
| #define HOST_TX_DONE_INT_ENA10 BIT(14) |
| @@ -327,14 +36,10 @@ |
| #define HOST_TX_DONE_INT_ENA12 BIT(16) |
| #define HOST_TX_DONE_INT_ENA13 BIT(17) |
| #define HOST_TX_DONE_INT_ENA14 BIT(18) |
| -#define HOST_RX_COHERENT_EN BIT(20) |
| -#define HOST_TX_COHERENT_EN BIT(21) |
| #define HOST_RX_DONE_INT_ENA4 BIT(22) |
| #define HOST_RX_DONE_INT_ENA5 BIT(23) |
| #define HOST_TX_DONE_INT_ENA16 BIT(26) |
| #define HOST_TX_DONE_INT_ENA17 BIT(27) |
| -#define MCU2HOST_SW_INT_ENA BIT(29) |
| -#define HOST_TX_DONE_INT_ENA18 BIT(30) |
| |
| /* WFDMA interrupt */ |
| #define MT_INT_RX_DONE_DATA HOST_RX_DONE_INT_ENA2 |
| @@ -346,7 +51,6 @@ |
| #define MT_INT_TX_DONE_MCU_WM HOST_TX_DONE_INT_ENA17 |
| #define MT_INT_TX_DONE_FWDL HOST_TX_DONE_INT_ENA16 |
| #define MT_INT_TX_DONE_BAND0 HOST_TX_DONE_INT_ENA0 |
| -#define MT_INT_MCU_CMD MCU2HOST_SW_INT_ENA |
| |
| #define MT_INT_TX_DONE_MCU (MT_INT_TX_DONE_MCU_WM | \ |
| MT_INT_TX_DONE_FWDL) |
| @@ -354,56 +58,8 @@ |
| MT_INT_TX_DONE_BAND0 | \ |
| GENMASK(18, 4)) |
| |
| -#define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208) |
| -#define MT_WFDMA0_GLO_CFG_TX_DMA_EN BIT(0) |
| -#define MT_WFDMA0_GLO_CFG_TX_DMA_BUSY BIT(1) |
| -#define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2) |
| -#define MT_WFDMA0_GLO_CFG_RX_DMA_BUSY BIT(3) |
| -#define MT_WFDMA0_GLO_CFG_TX_WB_DDONE BIT(6) |
| -#define MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL BIT(9) |
| -#define MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12) |
| -#define MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN BIT(15) |
| -#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21) |
| -#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO BIT(27) |
| -#define MT_WFDMA0_GLO_CFG_OMIT_TX_INFO BIT(28) |
| -#define MT_WFDMA0_GLO_CFG_CLK_GAT_DIS BIT(30) |
| - |
| -#define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c) |
| -#define MT_WFDMA0_GLO_CFG_EXT0 MT_WFDMA0(0x2b0) |
| -#define MT_WFDMA0_CSR_TX_DMASHDL_ENABLE BIT(6) |
| -#define MT_WFDMA0_PRI_DLY_INT_CFG0 MT_WFDMA0(0x2f0) |
| - |
| #define MT_RX_DATA_RING_BASE MT_WFDMA0(0x520) |
| |
| -#define MT_WFDMA0_TX_RING0_EXT_CTRL MT_WFDMA0(0x600) |
| -#define MT_WFDMA0_TX_RING1_EXT_CTRL MT_WFDMA0(0x604) |
| -#define MT_WFDMA0_TX_RING2_EXT_CTRL MT_WFDMA0(0x608) |
| -#define MT_WFDMA0_TX_RING3_EXT_CTRL MT_WFDMA0(0x60c) |
| -#define MT_WFDMA0_TX_RING4_EXT_CTRL MT_WFDMA0(0x610) |
| -#define MT_WFDMA0_TX_RING5_EXT_CTRL MT_WFDMA0(0x614) |
| -#define MT_WFDMA0_TX_RING6_EXT_CTRL MT_WFDMA0(0x618) |
| -#define MT_WFDMA0_TX_RING16_EXT_CTRL MT_WFDMA0(0x640) |
| -#define MT_WFDMA0_TX_RING17_EXT_CTRL MT_WFDMA0(0x644) |
| - |
| -#define MT_WPDMA0_MAX_CNT_MASK GENMASK(7, 0) |
| -#define MT_WPDMA0_BASE_PTR_MASK GENMASK(31, 16) |
| - |
| -#define MT_WFDMA0_RX_RING0_EXT_CTRL MT_WFDMA0(0x680) |
| -#define MT_WFDMA0_RX_RING1_EXT_CTRL MT_WFDMA0(0x684) |
| -#define MT_WFDMA0_RX_RING2_EXT_CTRL MT_WFDMA0(0x688) |
| -#define MT_WFDMA0_RX_RING3_EXT_CTRL MT_WFDMA0(0x68c) |
| -#define MT_WFDMA0_RX_RING4_EXT_CTRL MT_WFDMA0(0x690) |
| -#define MT_WFDMA0_RX_RING5_EXT_CTRL MT_WFDMA0(0x694) |
| - |
| -#define MT_TX_RING_BASE MT_WFDMA0(0x300) |
| -#define MT_RX_EVENT_RING_BASE MT_WFDMA0(0x500) |
| - |
| -/* WFDMA CSR */ |
| -#define MT_WFDMA_EXT_CSR_BASE 0xd7000 |
| -#define MT_WFDMA_EXT_CSR(ofs) (MT_WFDMA_EXT_CSR_BASE + (ofs)) |
| -#define MT_WFDMA_EXT_CSR_HIF_MISC MT_WFDMA_EXT_CSR(0x44) |
| -#define MT_WFDMA_EXT_CSR_HIF_MISC_BUSY BIT(0) |
| - |
| #define MT_INFRA_CFG_BASE 0xfe000 |
| #define MT_INFRA(ofs) (MT_INFRA_CFG_BASE + (ofs)) |
| |
| @@ -413,121 +69,13 @@ |
| #define MT_HIF_REMAP_L1_BASE GENMASK(31, 16) |
| #define MT_HIF_REMAP_BASE_L1 0x40000 |
| |
| -#define MT_SWDEF_BASE 0x41f200 |
| -#define MT_SWDEF(ofs) (MT_SWDEF_BASE + (ofs)) |
| -#define MT_SWDEF_MODE MT_SWDEF(0x3c) |
| -#define MT_SWDEF_NORMAL_MODE 0 |
| -#define MT_SWDEF_ICAP_MODE 1 |
| -#define MT_SWDEF_SPECTRUM_MODE 2 |
| - |
| -#define MT_TOP_BASE 0x18060000 |
| -#define MT_TOP(ofs) (MT_TOP_BASE + (ofs)) |
| - |
| -#define MT_TOP_LPCR_HOST_BAND0 MT_TOP(0x10) |
| -#define MT_TOP_LPCR_HOST_FW_OWN BIT(0) |
| -#define MT_TOP_LPCR_HOST_DRV_OWN BIT(1) |
| - |
| -#define MT_TOP_MISC MT_TOP(0xf0) |
| -#define MT_TOP_MISC_FW_STATE GENMASK(2, 0) |
| - |
| -#define MT_MCU_WPDMA0_BASE 0x54000000 |
| -#define MT_MCU_WPDMA0(ofs) (MT_MCU_WPDMA0_BASE + (ofs)) |
| - |
| -#define MT_WFDMA_DUMMY_CR MT_MCU_WPDMA0(0x120) |
| -#define MT_WFDMA_NEED_REINIT BIT(1) |
| - |
| -#define MT_CBTOP_RGU(ofs) (0x70002000 + (ofs)) |
| -#define MT_CBTOP_RGU_WF_SUBSYS_RST MT_CBTOP_RGU(0x600) |
| -#define MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH BIT(0) |
| - |
| -#define MT_HW_BOUND 0x70010020 |
| -#define MT_HW_CHIPID 0x70010200 |
| -#define MT_HW_REV 0x70010204 |
| - |
| -#define MT_PCIE_MAC_BASE 0x10000 |
| -#define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs)) |
| -#define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188) |
| -#define MT_PCIE_MAC_PM MT_PCIE_MAC(0x194) |
| -#define MT_PCIE_MAC_PM_L0S_DIS BIT(8) |
| - |
| -#define MT_DMA_SHDL(ofs) (0x7c026000 + (ofs)) |
| -#define MT_DMASHDL_SW_CONTROL MT_DMA_SHDL(0x004) |
| -#define MT_DMASHDL_DMASHDL_BYPASS BIT(28) |
| -#define MT_DMASHDL_OPTIONAL MT_DMA_SHDL(0x008) |
| -#define MT_DMASHDL_PAGE MT_DMA_SHDL(0x00c) |
| -#define MT_DMASHDL_GROUP_SEQ_ORDER BIT(16) |
| -#define MT_DMASHDL_REFILL MT_DMA_SHDL(0x010) |
| -#define MT_DMASHDL_REFILL_MASK GENMASK(31, 16) |
| -#define MT_DMASHDL_PKT_MAX_SIZE MT_DMA_SHDL(0x01c) |
| -#define MT_DMASHDL_PKT_MAX_SIZE_PLE GENMASK(11, 0) |
| -#define MT_DMASHDL_PKT_MAX_SIZE_PSE GENMASK(27, 16) |
| - |
| -#define MT_DMASHDL_GROUP_QUOTA(_n) MT_DMA_SHDL(0x020 + ((_n) << 2)) |
| -#define MT_DMASHDL_GROUP_QUOTA_MIN GENMASK(11, 0) |
| -#define MT_DMASHDL_GROUP_QUOTA_MAX GENMASK(27, 16) |
| - |
| -#define MT_DMASHDL_Q_MAP(_n) MT_DMA_SHDL(0x060 + ((_n) << 2)) |
| -#define MT_DMASHDL_Q_MAP_MASK GENMASK(3, 0) |
| -#define MT_DMASHDL_Q_MAP_SHIFT(_n) (4 * ((_n) % 8)) |
| - |
| -#define MT_DMASHDL_SCHED_SET(_n) MT_DMA_SHDL(0x070 + ((_n) << 2)) |
| - |
| -#define MT_WFDMA_HOST_CONFIG 0x7c027030 |
| -#define MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN BIT(6) |
| - |
| -#define MT_UMAC(ofs) (0x74000000 + (ofs)) |
| -#define MT_UDMA_TX_QSEL MT_UMAC(0x008) |
| -#define MT_FW_DL_EN BIT(3) |
| - |
| -#define MT_UDMA_WLCFG_1 MT_UMAC(0x00c) |
| -#define MT_WL_RX_AGG_PKT_LMT GENMASK(7, 0) |
| -#define MT_WL_TX_TMOUT_LMT GENMASK(27, 8) |
| - |
| -#define MT_UDMA_WLCFG_0 MT_UMAC(0x18) |
| -#define MT_WL_RX_AGG_TO GENMASK(7, 0) |
| -#define MT_WL_RX_AGG_LMT GENMASK(15, 8) |
| -#define MT_WL_TX_TMOUT_FUNC_EN BIT(16) |
| -#define MT_WL_TX_DPH_CHK_EN BIT(17) |
| -#define MT_WL_RX_MPSZ_PAD0 BIT(18) |
| -#define MT_WL_RX_FLUSH BIT(19) |
| -#define MT_TICK_1US_EN BIT(20) |
| -#define MT_WL_RX_AGG_EN BIT(21) |
| -#define MT_WL_RX_EN BIT(22) |
| -#define MT_WL_TX_EN BIT(23) |
| -#define MT_WL_RX_BUSY BIT(30) |
| -#define MT_WL_TX_BUSY BIT(31) |
| - |
| -#define MT_UDMA_CONN_INFRA_STATUS MT_UMAC(0xa20) |
| -#define MT_UDMA_CONN_WFSYS_INIT_DONE BIT(22) |
| -#define MT_UDMA_CONN_INFRA_STATUS_SEL MT_UMAC(0xa24) |
| - |
| -#define MT_SSUSB_EPCTL_CSR(ofs) (0x74011800 + (ofs)) |
| -#define MT_SSUSB_EPCTL_CSR_EP_RST_OPT MT_SSUSB_EPCTL_CSR(0x090) |
| - |
| -#define MT_UWFDMA0(ofs) (0x7c024000 + (ofs)) |
| -#define MT_UWFDMA0_GLO_CFG MT_UWFDMA0(0x208) |
| -#define MT_UWFDMA0_GLO_CFG_EXT0 MT_UWFDMA0(0x2b0) |
| -#define MT_UWFDMA0_TX_RING_EXT_CTRL(_n) MT_UWFDMA0(0x600 + ((_n) << 2)) |
| - |
| -#define MT_CONN_STATUS 0x7c053c10 |
| -#define MT_WIFI_PATCH_DL_STATE BIT(0) |
| - |
| -#define MT_CONN_ON_LPCTL 0x7c060010 |
| -#define PCIE_LPCR_HOST_OWN_SYNC BIT(2) |
| -#define PCIE_LPCR_HOST_CLR_OWN BIT(1) |
| -#define PCIE_LPCR_HOST_SET_OWN BIT(0) |
| - |
| #define MT_WFSYS_SW_RST_B 0x18000140 |
| -#define WFSYS_SW_RST_B BIT(0) |
| -#define WFSYS_SW_INIT_DONE BIT(4) |
| |
| -#define MT_CONN_ON_MISC 0x7c0600f0 |
| -#define MT_TOP_MISC2_FW_PWR_ON BIT(0) |
| -#define MT_TOP_MISC2_FW_N9_RDY GENMASK(1, 0) |
| +#define MT_WTBLON_TOP_WDUCR MT_WTBLON_TOP(0x200) |
| +#define MT_WTBLON_TOP_WDUCR_GROUP GENMASK(2, 0) |
| |
| -#define MT_WF_SW_DEF_CR(ofs) (0x401a00 + (ofs)) |
| -#define MT_WF_SW_DEF_CR_USB_MCU_EVENT MT_WF_SW_DEF_CR(0x028) |
| -#define MT_WF_SW_SER_TRIGGER_SUSPEND BIT(6) |
| -#define MT_WF_SW_SER_DONE_SUSPEND BIT(7) |
| +#define MT_WTBL_UPDATE MT_WTBLON_TOP(0x230) |
| +#define MT_WTBL_UPDATE_WLAN_IDX GENMASK(9, 0) |
| +#define MT_WTBL_UPDATE_ADM_COUNT_CLEAR BIT(12) |
| |
| #endif |
| diff --git a/mt7921/sdio.c b/mt7921/sdio.c |
| index e2e4b2c6..b192d2fa 100644 |
| --- a/mt7921/sdio.c |
| +++ b/mt7921/sdio.c |
| @@ -27,7 +27,7 @@ static void mt7921s_txrx_worker(struct mt76_worker *w) |
| struct mt76_sdio *sdio = container_of(w, struct mt76_sdio, |
| txrx_worker); |
| struct mt76_dev *mdev = container_of(sdio, struct mt76_dev, sdio); |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| |
| if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { |
| queue_work(mdev->wq, &dev->pm.wake_work); |
| @@ -38,7 +38,7 @@ static void mt7921s_txrx_worker(struct mt76_worker *w) |
| mt76_connac_pm_unref(&dev->mphy, &dev->pm); |
| } |
| |
| -static void mt7921s_unregister_device(struct mt7921_dev *dev) |
| +static void mt7921s_unregister_device(struct mt792x_dev *dev) |
| { |
| struct mt76_connac_pm *pm = &dev->pm; |
| |
| @@ -102,7 +102,7 @@ static int mt7921s_probe(struct sdio_func *func, |
| .sta_add = mt7921_mac_sta_add, |
| .sta_assoc = mt7921_mac_sta_assoc, |
| .sta_remove = mt7921_mac_sta_remove, |
| - .update_survey = mt7921_update_channel, |
| + .update_survey = mt792x_update_channel, |
| }; |
| static const struct mt76_bus_ops mt7921s_ops = { |
| .rr = mt76s_rr, |
| @@ -114,7 +114,7 @@ static int mt7921s_probe(struct sdio_func *func, |
| .rd_rp = mt76s_rd_rp, |
| .type = MT76_BUS_SDIO, |
| }; |
| - static const struct mt7921_hif_ops mt7921_sdio_ops = { |
| + static const struct mt792x_hif_ops mt7921_sdio_ops = { |
| .init_reset = mt7921s_init_reset, |
| .reset = mt7921s_mac_reset, |
| .mcu_init = mt7921s_mcu_init, |
| @@ -122,13 +122,13 @@ static int mt7921s_probe(struct sdio_func *func, |
| .fw_own = mt7921s_mcu_fw_pmctrl, |
| }; |
| struct ieee80211_ops *ops; |
| - struct mt7921_dev *dev; |
| + struct mt792x_dev *dev; |
| struct mt76_dev *mdev; |
| u8 features; |
| int ret; |
| |
| - ops = mt7921_get_mac80211_ops(&func->dev, (void *)id->driver_data, |
| - &features); |
| + ops = mt792x_get_mac80211_ops(&func->dev, &mt7921_ops, |
| + (void *)id->driver_data, &features); |
| if (!ops) |
| return -ENOMEM; |
| |
| @@ -136,7 +136,7 @@ static int mt7921s_probe(struct sdio_func *func, |
| if (!mdev) |
| return -ENOMEM; |
| |
| - dev = container_of(mdev, struct mt7921_dev, mt76); |
| + dev = container_of(mdev, struct mt792x_dev, mt76); |
| dev->fw_features = features; |
| dev->hif_ops = &mt7921_sdio_ops; |
| sdio_set_drvdata(func, dev); |
| @@ -196,7 +196,7 @@ error: |
| |
| static void mt7921s_remove(struct sdio_func *func) |
| { |
| - struct mt7921_dev *dev = sdio_get_drvdata(func); |
| + struct mt792x_dev *dev = sdio_get_drvdata(func); |
| |
| mt7921s_unregister_device(dev); |
| } |
| @@ -205,7 +205,7 @@ static void mt7921s_remove(struct sdio_func *func) |
| static int mt7921s_suspend(struct device *__dev) |
| { |
| struct sdio_func *func = dev_to_sdio_func(__dev); |
| - struct mt7921_dev *dev = sdio_get_drvdata(func); |
| + struct mt792x_dev *dev = sdio_get_drvdata(func); |
| struct mt76_connac_pm *pm = &dev->pm; |
| struct mt76_dev *mdev = &dev->mt76; |
| int err; |
| @@ -217,7 +217,7 @@ static int mt7921s_suspend(struct device *__dev) |
| cancel_delayed_work_sync(&pm->ps_work); |
| cancel_work_sync(&pm->wake_work); |
| |
| - err = mt7921_mcu_drv_pmctrl(dev); |
| + err = mt792x_mcu_drv_pmctrl(dev); |
| if (err < 0) |
| goto restore_suspend; |
| |
| @@ -245,7 +245,7 @@ static int mt7921s_suspend(struct device *__dev) |
| mt76_worker_disable(&mdev->sdio.txrx_worker); |
| mt76_worker_disable(&mdev->sdio.net_worker); |
| |
| - err = mt7921_mcu_fw_pmctrl(dev); |
| + err = mt792x_mcu_fw_pmctrl(dev); |
| if (err) |
| goto restore_txrx_worker; |
| |
| @@ -270,7 +270,7 @@ restore_suspend: |
| pm->suspended = false; |
| |
| if (err < 0) |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| |
| return err; |
| } |
| @@ -278,14 +278,14 @@ restore_suspend: |
| static int mt7921s_resume(struct device *__dev) |
| { |
| struct sdio_func *func = dev_to_sdio_func(__dev); |
| - struct mt7921_dev *dev = sdio_get_drvdata(func); |
| + struct mt792x_dev *dev = sdio_get_drvdata(func); |
| struct mt76_connac_pm *pm = &dev->pm; |
| struct mt76_dev *mdev = &dev->mt76; |
| int err; |
| |
| clear_bit(MT76_STATE_SUSPEND, &mdev->phy.state); |
| |
| - err = mt7921_mcu_drv_pmctrl(dev); |
| + err = mt792x_mcu_drv_pmctrl(dev); |
| if (err < 0) |
| goto failed; |
| |
| @@ -303,7 +303,7 @@ failed: |
| pm->suspended = false; |
| |
| if (err < 0) |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| |
| return err; |
| } |
| diff --git a/mt7921/sdio_mac.c b/mt7921/sdio_mac.c |
| index cff9925c..8edd0291 100644 |
| --- a/mt7921/sdio_mac.c |
| +++ b/mt7921/sdio_mac.c |
| @@ -30,7 +30,7 @@ static u32 mt7921s_read_whcr(struct mt76_dev *dev) |
| return sdio_readl(dev->sdio.func, MCR_WHCR, NULL); |
| } |
| |
| -int mt7921s_wfsys_reset(struct mt7921_dev *dev) |
| +int mt7921s_wfsys_reset(struct mt792x_dev *dev) |
| { |
| struct mt76_sdio *sdio = &dev->mt76.sdio; |
| u32 val, status; |
| @@ -71,7 +71,7 @@ int mt7921s_wfsys_reset(struct mt7921_dev *dev) |
| return 0; |
| } |
| |
| -int mt7921s_init_reset(struct mt7921_dev *dev) |
| +int mt7921s_init_reset(struct mt792x_dev *dev) |
| { |
| set_bit(MT76_MCU_RESET, &dev->mphy.state); |
| |
| @@ -91,7 +91,7 @@ int mt7921s_init_reset(struct mt7921_dev *dev) |
| return 0; |
| } |
| |
| -int mt7921s_mac_reset(struct mt7921_dev *dev) |
| +int mt7921s_mac_reset(struct mt792x_dev *dev) |
| { |
| int err; |
| |
| diff --git a/mt7921/sdio_mcu.c b/mt7921/sdio_mcu.c |
| index 177679ce..310eeca0 100644 |
| --- a/mt7921/sdio_mcu.c |
| +++ b/mt7921/sdio_mcu.c |
| @@ -16,14 +16,14 @@ static int |
| mt7921s_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| int cmd, int *seq) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| enum mt7921_sdio_pkt_type type = MT7921_SDIO_CMD; |
| enum mt76_mcuq_id txq = MT_MCUQ_WM; |
| int ret, pad; |
| |
| /* We just return in case firmware assertion to avoid blocking the |
| * common workqueue to run, for example, the coredump work might be |
| - * blocked by mt7921_mac_work that is excuting register access via sdio |
| + * blocked by mt792x_mac_work that is excuting register access via sdio |
| * bus. |
| */ |
| if (dev->fw_assert) |
| @@ -51,14 +51,14 @@ mt7921s_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| return ret; |
| } |
| |
| -static u32 mt7921s_read_rm3r(struct mt7921_dev *dev) |
| +static u32 mt7921s_read_rm3r(struct mt792x_dev *dev) |
| { |
| struct mt76_sdio *sdio = &dev->mt76.sdio; |
| |
| return sdio_readl(sdio->func, MCR_D2HRM3R, NULL); |
| } |
| |
| -static u32 mt7921s_clear_rm3r_drv_own(struct mt7921_dev *dev) |
| +static u32 mt7921s_clear_rm3r_drv_own(struct mt792x_dev *dev) |
| { |
| struct mt76_sdio *sdio = &dev->mt76.sdio; |
| u32 val; |
| @@ -71,7 +71,7 @@ static u32 mt7921s_clear_rm3r_drv_own(struct mt7921_dev *dev) |
| return val; |
| } |
| |
| -int mt7921s_mcu_init(struct mt7921_dev *dev) |
| +int mt7921s_mcu_init(struct mt792x_dev *dev) |
| { |
| static const struct mt76_mcu_ops mt7921s_mcu_ops = { |
| .headroom = MT_SDIO_HDR_SIZE + |
| @@ -97,7 +97,7 @@ int mt7921s_mcu_init(struct mt7921_dev *dev) |
| return 0; |
| } |
| |
| -int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| +int mt7921s_mcu_drv_pmctrl(struct mt792x_dev *dev) |
| { |
| struct sdio_func *func = dev->mt76.sdio.func; |
| struct mt76_phy *mphy = &dev->mt76.phy; |
| @@ -133,7 +133,7 @@ int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| return 0; |
| } |
| |
| -int mt7921s_mcu_fw_pmctrl(struct mt7921_dev *dev) |
| +int mt7921s_mcu_fw_pmctrl(struct mt792x_dev *dev) |
| { |
| struct sdio_func *func = dev->mt76.sdio.func; |
| struct mt76_phy *mphy = &dev->mt76.phy; |
| diff --git a/mt7921/testmode.c b/mt7921/testmode.c |
| index 7f408212..e838d934 100644 |
| --- a/mt7921/testmode.c |
| +++ b/mt7921/testmode.c |
| @@ -31,7 +31,7 @@ static const struct nla_policy mt7921_tm_policy[NUM_MT7921_TM_ATTRS] = { |
| }; |
| |
| static int |
| -mt7921_tm_set(struct mt7921_dev *dev, struct mt7921_tm_cmd *req) |
| +mt7921_tm_set(struct mt792x_dev *dev, struct mt7921_tm_cmd *req) |
| { |
| struct mt7921_rftest_cmd cmd = { |
| .action = req->action, |
| @@ -57,7 +57,7 @@ mt7921_tm_set(struct mt7921_dev *dev, struct mt7921_tm_cmd *req) |
| pm->enable = false; |
| cancel_delayed_work_sync(&pm->ps_work); |
| cancel_work_sync(&pm->wake_work); |
| - __mt7921_mcu_drv_pmctrl(dev); |
| + __mt792x_mcu_drv_pmctrl(dev); |
| |
| phy->test.state = MT76_TM_STATE_ON; |
| } |
| @@ -82,7 +82,7 @@ out: |
| } |
| |
| static int |
| -mt7921_tm_query(struct mt7921_dev *dev, struct mt7921_tm_cmd *req, |
| +mt7921_tm_query(struct mt792x_dev *dev, struct mt7921_tm_cmd *req, |
| struct mt7921_tm_evt *evt_resp) |
| { |
| struct mt7921_rftest_cmd cmd = { |
| @@ -113,7 +113,7 @@ int mt7921_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| { |
| struct nlattr *tb[NUM_MT76_TM_ATTRS]; |
| struct mt76_phy *mphy = hw->priv; |
| - struct mt7921_phy *phy = mphy->priv; |
| + struct mt792x_phy *phy = mphy->priv; |
| int err; |
| |
| if (!test_bit(MT76_STATE_RUNNING, &mphy->state) || |
| @@ -150,7 +150,7 @@ int mt7921_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, |
| { |
| struct nlattr *tb[NUM_MT76_TM_ATTRS]; |
| struct mt76_phy *mphy = hw->priv; |
| - struct mt7921_phy *phy = mphy->priv; |
| + struct mt792x_phy *phy = mphy->priv; |
| int err; |
| |
| if (!test_bit(MT76_STATE_RUNNING, &mphy->state) || |
| diff --git a/mt7921/trace.c b/mt7921/trace.c |
| deleted file mode 100644 |
| index 4dc3c7b8..00000000 |
| --- a/mt7921/trace.c |
| +++ /dev/null |
| @@ -1,12 +0,0 @@ |
| -// SPDX-License-Identifier: ISC |
| -/* |
| - * Copyright (C) 2021 Lorenzo Bianconi <lorenzo@kernel.org> |
| - */ |
| - |
| -#include <linux/module.h> |
| - |
| -#ifndef __CHECKER__ |
| -#define CREATE_TRACE_POINTS |
| -#include "mt7921_trace.h" |
| - |
| -#endif |
| diff --git a/mt7921/usb.c b/mt7921/usb.c |
| index 1f302c43..59cd3d98 100644 |
| --- a/mt7921/usb.c |
| +++ b/mt7921/usb.c |
| @@ -24,88 +24,11 @@ static const struct usb_device_id mt7921u_device_table[] = { |
| { }, |
| }; |
| |
| -static u32 mt7921u_rr(struct mt76_dev *dev, u32 addr) |
| -{ |
| - u32 ret; |
| - |
| - mutex_lock(&dev->usb.usb_ctrl_mtx); |
| - ret = ___mt76u_rr(dev, MT_VEND_READ_EXT, |
| - USB_DIR_IN | MT_USB_TYPE_VENDOR, addr); |
| - mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| - |
| - return ret; |
| -} |
| - |
| -static void mt7921u_wr(struct mt76_dev *dev, u32 addr, u32 val) |
| -{ |
| - mutex_lock(&dev->usb.usb_ctrl_mtx); |
| - ___mt76u_wr(dev, MT_VEND_WRITE_EXT, |
| - USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val); |
| - mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| -} |
| - |
| -static u32 mt7921u_rmw(struct mt76_dev *dev, u32 addr, |
| - u32 mask, u32 val) |
| -{ |
| - mutex_lock(&dev->usb.usb_ctrl_mtx); |
| - val |= ___mt76u_rr(dev, MT_VEND_READ_EXT, |
| - USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask; |
| - ___mt76u_wr(dev, MT_VEND_WRITE_EXT, |
| - USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val); |
| - mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| - |
| - return val; |
| -} |
| - |
| -static void mt7921u_copy(struct mt76_dev *dev, u32 offset, |
| - const void *data, int len) |
| -{ |
| - struct mt76_usb *usb = &dev->usb; |
| - int ret, i = 0, batch_len; |
| - const u8 *val = data; |
| - |
| - len = round_up(len, 4); |
| - |
| - mutex_lock(&usb->usb_ctrl_mtx); |
| - while (i < len) { |
| - batch_len = min_t(int, usb->data_len, len - i); |
| - memcpy(usb->data, val + i, batch_len); |
| - ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT, |
| - USB_DIR_OUT | MT_USB_TYPE_VENDOR, |
| - (offset + i) >> 16, offset + i, |
| - usb->data, batch_len); |
| - if (ret < 0) |
| - break; |
| - |
| - i += batch_len; |
| - } |
| - mutex_unlock(&usb->usb_ctrl_mtx); |
| -} |
| - |
| -int mt7921u_mcu_power_on(struct mt7921_dev *dev) |
| -{ |
| - int ret; |
| - |
| - ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON, |
| - USB_DIR_OUT | MT_USB_TYPE_VENDOR, |
| - 0x0, 0x1, NULL, 0); |
| - if (ret) |
| - return ret; |
| - |
| - if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON, |
| - MT_TOP_MISC2_FW_PWR_ON, 500)) { |
| - dev_err(dev->mt76.dev, "Timeout for power on\n"); |
| - ret = -EIO; |
| - } |
| - |
| - return ret; |
| -} |
| - |
| static int |
| mt7921u_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| int cmd, int *seq) |
| { |
| - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| u32 pad, ep; |
| int ret; |
| |
| @@ -131,7 +54,7 @@ mt7921u_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| return ret; |
| } |
| |
| -static int mt7921u_mcu_init(struct mt7921_dev *dev) |
| +static int mt7921u_mcu_init(struct mt792x_dev *dev) |
| { |
| static const struct mt76_mcu_ops mcu_ops = { |
| .headroom = MT_SDIO_HDR_SIZE + |
| @@ -155,20 +78,69 @@ static int mt7921u_mcu_init(struct mt7921_dev *dev) |
| return 0; |
| } |
| |
| -static void mt7921u_stop(struct ieee80211_hw *hw) |
| +static int mt7921u_mac_reset(struct mt792x_dev *dev) |
| { |
| - struct mt7921_dev *dev = mt7921_hw_dev(hw); |
| + int err; |
| + |
| + mt76_txq_schedule_all(&dev->mphy); |
| + mt76_worker_disable(&dev->mt76.tx_worker); |
| |
| + set_bit(MT76_RESET, &dev->mphy.state); |
| + set_bit(MT76_MCU_RESET, &dev->mphy.state); |
| + |
| + wake_up(&dev->mt76.mcu.wait); |
| + skb_queue_purge(&dev->mt76.mcu.res_q); |
| + |
| + mt76u_stop_rx(&dev->mt76); |
| mt76u_stop_tx(&dev->mt76); |
| - mt7921_stop(hw); |
| + |
| + mt792xu_wfsys_reset(dev); |
| + |
| + clear_bit(MT76_MCU_RESET, &dev->mphy.state); |
| + err = mt76u_resume_rx(&dev->mt76); |
| + if (err) |
| + goto out; |
| + |
| + err = mt792xu_mcu_power_on(dev); |
| + if (err) |
| + goto out; |
| + |
| + err = mt792xu_dma_init(dev, false); |
| + if (err) |
| + goto out; |
| + |
| + mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); |
| + mt76_set(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); |
| + |
| + err = mt7921_run_firmware(dev); |
| + if (err) |
| + goto out; |
| + |
| + mt76_clear(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); |
| + |
| + err = mt7921_mcu_set_eeprom(dev); |
| + if (err) |
| + goto out; |
| + |
| + err = mt7921_mac_init(dev); |
| + if (err) |
| + goto out; |
| + |
| + err = __mt7921_start(&dev->phy); |
| +out: |
| + clear_bit(MT76_RESET, &dev->mphy.state); |
| + |
| + mt76_worker_enable(&dev->mt76.tx_worker); |
| + |
| + return err; |
| } |
| |
| -static void mt7921u_cleanup(struct mt7921_dev *dev) |
| +static void mt7921u_stop(struct ieee80211_hw *hw) |
| { |
| - clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); |
| - mt7921u_wfsys_reset(dev); |
| - skb_queue_purge(&dev->mt76.mcu.res_q); |
| - mt76u_queues_deinit(&dev->mt76); |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + |
| + mt76u_stop_tx(&dev->mt76); |
| + mt7921_stop(hw); |
| } |
| |
| static int mt7921u_probe(struct usb_interface *usb_intf, |
| @@ -189,31 +161,31 @@ static int mt7921u_probe(struct usb_interface *usb_intf, |
| .sta_add = mt7921_mac_sta_add, |
| .sta_assoc = mt7921_mac_sta_assoc, |
| .sta_remove = mt7921_mac_sta_remove, |
| - .update_survey = mt7921_update_channel, |
| + .update_survey = mt792x_update_channel, |
| }; |
| - static const struct mt7921_hif_ops hif_ops = { |
| + static const struct mt792x_hif_ops hif_ops = { |
| .mcu_init = mt7921u_mcu_init, |
| - .init_reset = mt7921u_init_reset, |
| + .init_reset = mt792xu_init_reset, |
| .reset = mt7921u_mac_reset, |
| }; |
| static struct mt76_bus_ops bus_ops = { |
| - .rr = mt7921u_rr, |
| - .wr = mt7921u_wr, |
| - .rmw = mt7921u_rmw, |
| + .rr = mt792xu_rr, |
| + .wr = mt792xu_wr, |
| + .rmw = mt792xu_rmw, |
| .read_copy = mt76u_read_copy, |
| - .write_copy = mt7921u_copy, |
| + .write_copy = mt792xu_copy, |
| .type = MT76_BUS_USB, |
| }; |
| struct usb_device *udev = interface_to_usbdev(usb_intf); |
| struct ieee80211_ops *ops; |
| struct ieee80211_hw *hw; |
| - struct mt7921_dev *dev; |
| + struct mt792x_dev *dev; |
| struct mt76_dev *mdev; |
| u8 features; |
| int ret; |
| |
| - ops = mt7921_get_mac80211_ops(&usb_intf->dev, (void *)id->driver_info, |
| - &features); |
| + ops = mt792x_get_mac80211_ops(&usb_intf->dev, &mt7921_ops, |
| + (void *)id->driver_info, &features); |
| if (!ops) |
| return -ENOMEM; |
| |
| @@ -222,7 +194,7 @@ static int mt7921u_probe(struct usb_interface *usb_intf, |
| if (!mdev) |
| return -ENOMEM; |
| |
| - dev = container_of(mdev, struct mt7921_dev, mt76); |
| + dev = container_of(mdev, struct mt792x_dev, mt76); |
| dev->fw_features = features; |
| dev->hif_ops = &hif_ops; |
| |
| @@ -240,12 +212,12 @@ static int mt7921u_probe(struct usb_interface *usb_intf, |
| dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); |
| |
| if (mt76_get_field(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY)) { |
| - ret = mt7921u_wfsys_reset(dev); |
| + ret = mt792xu_wfsys_reset(dev); |
| if (ret) |
| goto error; |
| } |
| |
| - ret = mt7921u_mcu_power_on(dev); |
| + ret = mt792xu_mcu_power_on(dev); |
| if (ret) |
| goto error; |
| |
| @@ -257,7 +229,7 @@ static int mt7921u_probe(struct usb_interface *usb_intf, |
| if (ret) |
| goto error; |
| |
| - ret = mt7921u_dma_init(dev, false); |
| + ret = mt792xu_dma_init(dev, false); |
| if (ret) |
| goto error; |
| |
| @@ -282,27 +254,10 @@ error: |
| return ret; |
| } |
| |
| -static void mt7921u_disconnect(struct usb_interface *usb_intf) |
| -{ |
| - struct mt7921_dev *dev = usb_get_intfdata(usb_intf); |
| - |
| - cancel_work_sync(&dev->init_work); |
| - if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) |
| - return; |
| - |
| - mt76_unregister_device(&dev->mt76); |
| - mt7921u_cleanup(dev); |
| - |
| - usb_set_intfdata(usb_intf, NULL); |
| - usb_put_dev(interface_to_usbdev(usb_intf)); |
| - |
| - mt76_free_device(&dev->mt76); |
| -} |
| - |
| #ifdef CONFIG_PM |
| static int mt7921u_suspend(struct usb_interface *intf, pm_message_t state) |
| { |
| - struct mt7921_dev *dev = usb_get_intfdata(intf); |
| + struct mt792x_dev *dev = usb_get_intfdata(intf); |
| struct mt76_connac_pm *pm = &dev->pm; |
| int err; |
| |
| @@ -322,14 +277,14 @@ failed: |
| pm->suspended = false; |
| |
| if (err < 0) |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| |
| return err; |
| } |
| |
| static int mt7921u_resume(struct usb_interface *intf) |
| { |
| - struct mt7921_dev *dev = usb_get_intfdata(intf); |
| + struct mt792x_dev *dev = usb_get_intfdata(intf); |
| struct mt76_connac_pm *pm = &dev->pm; |
| bool reinit = true; |
| int err, i; |
| @@ -349,8 +304,8 @@ static int mt7921u_resume(struct usb_interface *intf) |
| msleep(20); |
| } |
| |
| - if (reinit || mt7921_dma_need_reinit(dev)) { |
| - err = mt7921u_dma_init(dev, true); |
| + if (reinit || mt792x_dma_need_reinit(dev)) { |
| + err = mt792xu_dma_init(dev, true); |
| if (err) |
| goto failed; |
| } |
| @@ -364,7 +319,7 @@ failed: |
| pm->suspended = false; |
| |
| if (err < 0) |
| - mt7921_reset(&dev->mt76); |
| + mt792x_reset(&dev->mt76); |
| |
| return err; |
| } |
| @@ -378,7 +333,7 @@ static struct usb_driver mt7921u_driver = { |
| .name = KBUILD_MODNAME, |
| .id_table = mt7921u_device_table, |
| .probe = mt7921u_probe, |
| - .disconnect = mt7921u_disconnect, |
| + .disconnect = mt792xu_disconnect, |
| #ifdef CONFIG_PM |
| .suspend = mt7921u_suspend, |
| .resume = mt7921u_resume, |
| diff --git a/mt7921/usb_mac.c b/mt7921/usb_mac.c |
| deleted file mode 100644 |
| index 50eb6e7f..00000000 |
| --- a/mt7921/usb_mac.c |
| +++ /dev/null |
| @@ -1,255 +0,0 @@ |
| -// SPDX-License-Identifier: ISC |
| -/* Copyright (C) 2022 MediaTek Inc. |
| - * |
| - * Author: Lorenzo Bianconi <lorenzo@kernel.org> |
| - */ |
| - |
| -#include <linux/kernel.h> |
| -#include <linux/module.h> |
| -#include <linux/usb.h> |
| - |
| -#include "mt7921.h" |
| -#include "mcu.h" |
| -#include "../mt76_connac2_mac.h" |
| - |
| -static u32 mt7921u_uhw_rr(struct mt76_dev *dev, u32 addr) |
| -{ |
| - u32 ret; |
| - |
| - mutex_lock(&dev->usb.usb_ctrl_mtx); |
| - ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE, |
| - USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr); |
| - mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| - |
| - return ret; |
| -} |
| - |
| -static void mt7921u_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val) |
| -{ |
| - mutex_lock(&dev->usb.usb_ctrl_mtx); |
| - ___mt76u_wr(dev, MT_VEND_WRITE, |
| - USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val); |
| - mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| -} |
| - |
| -static void mt7921u_dma_prefetch(struct mt7921_dev *dev) |
| -{ |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), |
| - MT_WPDMA0_MAX_CNT_MASK, 4); |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), |
| - MT_WPDMA0_BASE_PTR_MASK, 0x80); |
| - |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), |
| - MT_WPDMA0_MAX_CNT_MASK, 4); |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), |
| - MT_WPDMA0_BASE_PTR_MASK, 0xc0); |
| - |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), |
| - MT_WPDMA0_MAX_CNT_MASK, 4); |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), |
| - MT_WPDMA0_BASE_PTR_MASK, 0x100); |
| - |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), |
| - MT_WPDMA0_MAX_CNT_MASK, 4); |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), |
| - MT_WPDMA0_BASE_PTR_MASK, 0x140); |
| - |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), |
| - MT_WPDMA0_MAX_CNT_MASK, 4); |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), |
| - MT_WPDMA0_BASE_PTR_MASK, 0x180); |
| - |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), |
| - MT_WPDMA0_MAX_CNT_MASK, 4); |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), |
| - MT_WPDMA0_BASE_PTR_MASK, 0x280); |
| - |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), |
| - MT_WPDMA0_MAX_CNT_MASK, 4); |
| - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), |
| - MT_WPDMA0_BASE_PTR_MASK, 0x2c0); |
| -} |
| - |
| -static void mt7921u_wfdma_init(struct mt7921_dev *dev) |
| -{ |
| - mt7921u_dma_prefetch(dev); |
| - |
| - mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO); |
| - mt76_set(dev, MT_UWFDMA0_GLO_CFG, |
| - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | |
| - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 | |
| - MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL | |
| - MT_WFDMA0_GLO_CFG_TX_DMA_EN | |
| - MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
| - |
| - /* disable dmashdl */ |
| - mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0, |
| - MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); |
| - mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); |
| - |
| - mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); |
| -} |
| - |
| -static int mt7921u_dma_rx_evt_ep4(struct mt7921_dev *dev) |
| -{ |
| - if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG, |
| - MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000)) |
| - return -ETIMEDOUT; |
| - |
| - mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
| - mt76_set(dev, MT_WFDMA_HOST_CONFIG, |
| - MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN); |
| - mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
| - |
| - return 0; |
| -} |
| - |
| -static void mt7921u_epctl_rst_opt(struct mt7921_dev *dev, bool reset) |
| -{ |
| - u32 val; |
| - |
| - /* usb endpoint reset opt |
| - * bits[4,9]: out blk ep 4-9 |
| - * bits[20,21]: in blk ep 4-5 |
| - * bits[22]: in int ep 6 |
| - */ |
| - val = mt7921u_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT); |
| - if (reset) |
| - val |= GENMASK(9, 4) | GENMASK(22, 20); |
| - else |
| - val &= ~(GENMASK(9, 4) | GENMASK(22, 20)); |
| - mt7921u_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val); |
| -} |
| - |
| -int mt7921u_dma_init(struct mt7921_dev *dev, bool resume) |
| -{ |
| - int err; |
| - |
| - mt7921u_wfdma_init(dev); |
| - |
| - mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH); |
| - |
| - mt76_set(dev, MT_UDMA_WLCFG_0, |
| - MT_WL_RX_EN | MT_WL_TX_EN | |
| - MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN); |
| - mt76_clear(dev, MT_UDMA_WLCFG_0, |
| - MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT); |
| - mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT); |
| - |
| - if (resume) |
| - return 0; |
| - |
| - err = mt7921u_dma_rx_evt_ep4(dev); |
| - if (err) |
| - return err; |
| - |
| - mt7921u_epctl_rst_opt(dev, false); |
| - |
| - return 0; |
| -} |
| - |
| -int mt7921u_wfsys_reset(struct mt7921_dev *dev) |
| -{ |
| - u32 val; |
| - int i; |
| - |
| - mt7921u_epctl_rst_opt(dev, false); |
| - |
| - val = mt7921u_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST); |
| - val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH; |
| - mt7921u_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val); |
| - |
| - usleep_range(10, 20); |
| - |
| - val = mt7921u_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST); |
| - val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH; |
| - mt7921u_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val); |
| - |
| - mt7921u_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0); |
| - for (i = 0; i < MT7921_WFSYS_INIT_RETRY_COUNT; i++) { |
| - val = mt7921u_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS); |
| - if (val & MT_UDMA_CONN_WFSYS_INIT_DONE) |
| - break; |
| - |
| - msleep(100); |
| - } |
| - |
| - if (i == MT7921_WFSYS_INIT_RETRY_COUNT) |
| - return -ETIMEDOUT; |
| - |
| - return 0; |
| -} |
| - |
| -int mt7921u_init_reset(struct mt7921_dev *dev) |
| -{ |
| - set_bit(MT76_RESET, &dev->mphy.state); |
| - |
| - wake_up(&dev->mt76.mcu.wait); |
| - skb_queue_purge(&dev->mt76.mcu.res_q); |
| - |
| - mt76u_stop_rx(&dev->mt76); |
| - mt76u_stop_tx(&dev->mt76); |
| - |
| - mt7921u_wfsys_reset(dev); |
| - |
| - clear_bit(MT76_RESET, &dev->mphy.state); |
| - |
| - return mt76u_resume_rx(&dev->mt76); |
| -} |
| - |
| -int mt7921u_mac_reset(struct mt7921_dev *dev) |
| -{ |
| - int err; |
| - |
| - mt76_txq_schedule_all(&dev->mphy); |
| - mt76_worker_disable(&dev->mt76.tx_worker); |
| - |
| - set_bit(MT76_RESET, &dev->mphy.state); |
| - set_bit(MT76_MCU_RESET, &dev->mphy.state); |
| - |
| - wake_up(&dev->mt76.mcu.wait); |
| - skb_queue_purge(&dev->mt76.mcu.res_q); |
| - |
| - mt76u_stop_rx(&dev->mt76); |
| - mt76u_stop_tx(&dev->mt76); |
| - |
| - mt7921u_wfsys_reset(dev); |
| - |
| - clear_bit(MT76_MCU_RESET, &dev->mphy.state); |
| - err = mt76u_resume_rx(&dev->mt76); |
| - if (err) |
| - goto out; |
| - |
| - err = mt7921u_mcu_power_on(dev); |
| - if (err) |
| - goto out; |
| - |
| - err = mt7921u_dma_init(dev, false); |
| - if (err) |
| - goto out; |
| - |
| - mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); |
| - mt76_set(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); |
| - |
| - err = mt7921_run_firmware(dev); |
| - if (err) |
| - goto out; |
| - |
| - mt76_clear(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); |
| - |
| - err = mt7921_mcu_set_eeprom(dev); |
| - if (err) |
| - goto out; |
| - |
| - err = mt7921_mac_init(dev); |
| - if (err) |
| - goto out; |
| - |
| - err = __mt7921_start(&dev->phy); |
| -out: |
| - clear_bit(MT76_RESET, &dev->mphy.state); |
| - |
| - mt76_worker_enable(&dev->mt76.tx_worker); |
| - |
| - return err; |
| -} |
| diff --git a/mt792x.h b/mt792x.h |
| new file mode 100644 |
| index 00000000..5d5ab863 |
| --- /dev/null |
| +++ b/mt792x.h |
| @@ -0,0 +1,367 @@ |
| +/* SPDX-License-Identifier: ISC */ |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| + |
| +#ifndef __MT792X_H |
| +#define __MT792X_H |
| + |
| +#include <linux/interrupt.h> |
| +#include <linux/ktime.h> |
| + |
| +#include "mt76_connac_mcu.h" |
| +#include "mt792x_regs.h" |
| +#include "mt792x_acpi_sar.h" |
| + |
| +#define MT792x_PM_TIMEOUT (HZ / 12) |
| +#define MT792x_HW_SCAN_TIMEOUT (HZ / 10) |
| + |
| +#define MT792x_MAX_INTERFACES 4 |
| +#define MT792x_WTBL_SIZE 20 |
| +#define MT792x_WTBL_RESERVED (MT792x_WTBL_SIZE - 1) |
| +#define MT792x_WTBL_STA (MT792x_WTBL_RESERVED - MT792x_MAX_INTERFACES) |
| + |
| +#define MT792x_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ |
| +#define MT792x_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ |
| + |
| +#define MT792x_FW_TAG_FEATURE 4 |
| +#define MT792x_FW_CAP_CNM BIT(7) |
| + |
| +/* NOTE: used to map mt76_rates. idx may change if firmware expands table */ |
| +#define MT792x_BASIC_RATES_TBL 11 |
| + |
| +#define MT792x_WATCHDOG_TIME (HZ / 4) |
| + |
| +#define MT792x_DRV_OWN_RETRY_COUNT 10 |
| +#define MT792x_MCU_INIT_RETRY_COUNT 10 |
| +#define MT792x_WFSYS_INIT_RETRY_COUNT 2 |
| + |
| +#define MT7921_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7961_1.bin" |
| +#define MT7922_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7922_1.bin" |
| + |
| +#define MT7921_ROM_PATCH "mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin" |
| +#define MT7922_ROM_PATCH "mediatek/WIFI_MT7922_patch_mcu_1_1_hdr.bin" |
| + |
| +struct mt792x_vif; |
| +struct mt792x_sta; |
| + |
| +struct mt792x_realease_info { |
| + __le16 len; |
| + u8 pad_len; |
| + u8 tag; |
| +} __packed; |
| + |
| +struct mt792x_fw_features { |
| + u8 segment; |
| + u8 data; |
| + u8 rsv[14]; |
| +} __packed; |
| + |
| +enum { |
| + MT792x_CLC_POWER, |
| + MT792x_CLC_CHAN, |
| + MT792x_CLC_MAX_NUM, |
| +}; |
| + |
| +DECLARE_EWMA(avg_signal, 10, 8) |
| + |
| +struct mt792x_sta { |
| + struct mt76_wcid wcid; /* must be first */ |
| + |
| + struct mt792x_vif *vif; |
| + |
| + u32 airtime_ac[8]; |
| + |
| + int ack_signal; |
| + struct ewma_avg_signal avg_ack_signal; |
| + |
| + unsigned long last_txs; |
| + |
| + struct mt76_connac_sta_key_conf bip; |
| +}; |
| + |
| +DECLARE_EWMA(rssi, 10, 8); |
| + |
| +struct mt792x_vif { |
| + struct mt76_vif mt76; /* must be first */ |
| + |
| + struct mt792x_sta sta; |
| + struct mt792x_sta *wep_sta; |
| + |
| + struct mt792x_phy *phy; |
| + |
| + struct ewma_rssi rssi; |
| + |
| + struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; |
| + struct ieee80211_chanctx_conf *ctx; |
| +}; |
| + |
| +struct mt792x_phy { |
| + struct mt76_phy *mt76; |
| + struct mt792x_dev *dev; |
| + |
| + struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; |
| + |
| + u64 omac_mask; |
| + |
| + u16 noise; |
| + |
| + s16 coverage_class; |
| + u8 slottime; |
| + |
| + u32 rx_ampdu_ts; |
| + u32 ampdu_ref; |
| + |
| + struct mt76_mib_stats mib; |
| + |
| + u8 sta_work_count; |
| + |
| + struct sk_buff_head scan_event_list; |
| + struct delayed_work scan_work; |
| +#ifdef CONFIG_ACPI |
| + void *acpisar; |
| +#endif |
| + void *clc[MT792x_CLC_MAX_NUM]; |
| + |
| + struct work_struct roc_work; |
| + struct timer_list roc_timer; |
| + wait_queue_head_t roc_wait; |
| + u8 roc_token_id; |
| + bool roc_grant; |
| +}; |
| + |
| +struct mt792x_irq_map { |
| + u32 host_irq_enable; |
| + struct { |
| + u32 all_complete_mask; |
| + u32 mcu_complete_mask; |
| + } tx; |
| + struct { |
| + u32 data_complete_mask; |
| + u32 wm_complete_mask; |
| + u32 wm2_complete_mask; |
| + } rx; |
| +}; |
| + |
| +#define mt792x_init_reset(dev) ((dev)->hif_ops->init_reset(dev)) |
| +#define mt792x_dev_reset(dev) ((dev)->hif_ops->reset(dev)) |
| +#define mt792x_mcu_init(dev) ((dev)->hif_ops->mcu_init(dev)) |
| +#define __mt792x_mcu_drv_pmctrl(dev) ((dev)->hif_ops->drv_own(dev)) |
| +#define __mt792x_mcu_fw_pmctrl(dev) ((dev)->hif_ops->fw_own(dev)) |
| + |
| +struct mt792x_hif_ops { |
| + int (*init_reset)(struct mt792x_dev *dev); |
| + int (*reset)(struct mt792x_dev *dev); |
| + int (*mcu_init)(struct mt792x_dev *dev); |
| + int (*drv_own)(struct mt792x_dev *dev); |
| + int (*fw_own)(struct mt792x_dev *dev); |
| +}; |
| + |
| +struct mt792x_dev { |
| + union { /* must be first */ |
| + struct mt76_dev mt76; |
| + struct mt76_phy mphy; |
| + }; |
| + |
| + const struct mt76_bus_ops *bus_ops; |
| + struct mt792x_phy phy; |
| + |
| + struct work_struct reset_work; |
| + bool hw_full_reset:1; |
| + bool hw_init_done:1; |
| + bool fw_assert:1; |
| + bool has_eht:1; |
| + |
| + struct work_struct init_work; |
| + |
| + u8 fw_debug; |
| + u8 fw_features; |
| + |
| + struct mt76_connac_pm pm; |
| + struct mt76_connac_coredump coredump; |
| + const struct mt792x_hif_ops *hif_ops; |
| + const struct mt792x_irq_map *irq_map; |
| + |
| + struct work_struct ipv6_ns_work; |
| + /* IPv6 addresses for WoWLAN */ |
| + struct sk_buff_head ipv6_ns_list; |
| + |
| + enum environment_cap country_ie_env; |
| + u32 backup_l1; |
| + u32 backup_l2; |
| +}; |
| + |
| +static inline struct mt792x_dev * |
| +mt792x_hw_dev(struct ieee80211_hw *hw) |
| +{ |
| + struct mt76_phy *phy = hw->priv; |
| + |
| + return container_of(phy->dev, struct mt792x_dev, mt76); |
| +} |
| + |
| +static inline struct mt792x_phy * |
| +mt792x_hw_phy(struct ieee80211_hw *hw) |
| +{ |
| + struct mt76_phy *phy = hw->priv; |
| + |
| + return phy->priv; |
| +} |
| + |
| +static inline void |
| +mt792x_get_status_freq_info(struct mt76_rx_status *status, u8 chfreq) |
| +{ |
| + if (chfreq > 180) { |
| + status->band = NL80211_BAND_6GHZ; |
| + chfreq = (chfreq - 181) * 4 + 1; |
| + } else if (chfreq > 14) { |
| + status->band = NL80211_BAND_5GHZ; |
| + } else { |
| + status->band = NL80211_BAND_2GHZ; |
| + } |
| + status->freq = ieee80211_channel_to_frequency(chfreq, status->band); |
| +} |
| + |
| +static inline bool mt792x_dma_need_reinit(struct mt792x_dev *dev) |
| +{ |
| + return !mt76_get_field(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); |
| +} |
| + |
| +#define mt792x_mutex_acquire(dev) \ |
| + mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm) |
| +#define mt792x_mutex_release(dev) \ |
| + mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm) |
| + |
| +void mt792x_pm_wake_work(struct work_struct *work); |
| +void mt792x_pm_power_save_work(struct work_struct *work); |
| +void mt792x_reset(struct mt76_dev *mdev); |
| +void mt792x_update_channel(struct mt76_phy *mphy); |
| +void mt792x_mac_reset_counters(struct mt792x_phy *phy); |
| +void mt792x_mac_init_band(struct mt792x_dev *dev, u8 band); |
| +void mt792x_mac_assoc_rssi(struct mt792x_dev *dev, struct sk_buff *skb); |
| +struct mt76_wcid *mt792x_rx_get_wcid(struct mt792x_dev *dev, u16 idx, |
| + bool unicast); |
| +void mt792x_mac_update_mib_stats(struct mt792x_phy *phy); |
| +void mt792x_mac_set_timeing(struct mt792x_phy *phy); |
| +void mt792x_mac_work(struct work_struct *work); |
| +void mt792x_remove_interface(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif); |
| +void mt792x_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, |
| + struct sk_buff *skb); |
| +int mt792x_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + unsigned int link_id, u16 queue, |
| + const struct ieee80211_tx_queue_params *params); |
| +int mt792x_get_stats(struct ieee80211_hw *hw, |
| + struct ieee80211_low_level_stats *stats); |
| +u64 mt792x_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif); |
| +void mt792x_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + u64 timestamp); |
| +void mt792x_tx_worker(struct mt76_worker *w); |
| +void mt792x_roc_timer(struct timer_list *timer); |
| +void mt792x_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + u32 queues, bool drop); |
| +int mt792x_assign_vif_chanctx(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif, |
| + struct ieee80211_bss_conf *link_conf, |
| + struct ieee80211_chanctx_conf *ctx); |
| +void mt792x_unassign_vif_chanctx(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif, |
| + struct ieee80211_bss_conf *link_conf, |
| + struct ieee80211_chanctx_conf *ctx); |
| +void mt792x_set_wakeup(struct ieee80211_hw *hw, bool enabled); |
| +void mt792x_get_et_strings(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + u32 sset, u8 *data); |
| +int mt792x_get_et_sset_count(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + int sset); |
| +void mt792x_get_et_stats(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + struct ethtool_stats *stats, u64 *data); |
| +void mt792x_sta_statistics(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif, |
| + struct ieee80211_sta *sta, |
| + struct station_info *sinfo); |
| +void mt792x_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class); |
| +void mt792x_dma_cleanup(struct mt792x_dev *dev); |
| +int mt792x_dma_enable(struct mt792x_dev *dev); |
| +int mt792x_wpdma_reset(struct mt792x_dev *dev, bool force); |
| +int mt792x_wpdma_reinit_cond(struct mt792x_dev *dev); |
| +int mt792x_dma_disable(struct mt792x_dev *dev, bool force); |
| +irqreturn_t mt792x_irq_handler(int irq, void *dev_instance); |
| +void mt792x_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q); |
| +int mt792x_poll_tx(struct napi_struct *napi, int budget); |
| +int mt792x_poll_rx(struct napi_struct *napi, int budget); |
| +void mt792x_irq_tasklet(unsigned long data); |
| +int mt792x_wfsys_reset(struct mt792x_dev *dev); |
| +int mt792x_tx_stats_show(struct seq_file *file, void *data); |
| +int mt792x_queues_acq(struct seq_file *s, void *data); |
| +int mt792x_queues_read(struct seq_file *s, void *data); |
| +int mt792x_pm_stats(struct seq_file *s, void *data); |
| +int mt792x_pm_idle_timeout_set(void *data, u64 val); |
| +int mt792x_pm_idle_timeout_get(void *data, u64 *val); |
| +int mt792x_init_wiphy(struct ieee80211_hw *hw); |
| +struct ieee80211_ops * |
| +mt792x_get_mac80211_ops(struct device *dev, |
| + const struct ieee80211_ops *mac80211_ops, |
| + void *drv_data, u8 *fw_features); |
| +int mt792x_init_wcid(struct mt792x_dev *dev); |
| +int mt792x_mcu_drv_pmctrl(struct mt792x_dev *dev); |
| +int mt792x_mcu_fw_pmctrl(struct mt792x_dev *dev); |
| + |
| +static inline char *mt792x_ram_name(struct mt792x_dev *dev) |
| +{ |
| + switch (mt76_chip(&dev->mt76)) { |
| + case 0x7922: |
| + return MT7922_FIRMWARE_WM; |
| + default: |
| + return MT7921_FIRMWARE_WM; |
| + } |
| +} |
| + |
| +static inline char *mt792x_patch_name(struct mt792x_dev *dev) |
| +{ |
| + switch (mt76_chip(&dev->mt76)) { |
| + case 0x7922: |
| + return MT7922_ROM_PATCH; |
| + default: |
| + return MT7921_ROM_PATCH; |
| + } |
| +} |
| + |
| +int mt792x_load_firmware(struct mt792x_dev *dev); |
| + |
| +/* usb */ |
| +#define MT_USB_TYPE_VENDOR (USB_TYPE_VENDOR | 0x1f) |
| +#define MT_USB_TYPE_UHW_VENDOR (USB_TYPE_VENDOR | 0x1e) |
| +int mt792xu_dma_init(struct mt792x_dev *dev, bool resume); |
| +int mt792xu_mcu_power_on(struct mt792x_dev *dev); |
| +int mt792xu_wfsys_reset(struct mt792x_dev *dev); |
| +int mt792xu_init_reset(struct mt792x_dev *dev); |
| +u32 mt792xu_rr(struct mt76_dev *dev, u32 addr); |
| +void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val); |
| +u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val); |
| +void mt792xu_copy(struct mt76_dev *dev, u32 offset, const void *data, int len); |
| +void mt792xu_disconnect(struct usb_interface *usb_intf); |
| + |
| +int __mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev); |
| +int mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev); |
| +int mt792xe_mcu_fw_pmctrl(struct mt792x_dev *dev); |
| + |
| +#ifdef CONFIG_ACPI |
| +int mt792x_init_acpi_sar(struct mt792x_dev *dev); |
| +int mt792x_init_acpi_sar_power(struct mt792x_phy *phy, bool set_default); |
| +u8 mt792x_acpi_get_flags(struct mt792x_phy *phy); |
| +#else |
| +static inline int mt792x_init_acpi_sar(struct mt792x_dev *dev) |
| +{ |
| + return 0; |
| +} |
| + |
| +static inline int mt792x_init_acpi_sar_power(struct mt792x_phy *phy, |
| + bool set_default) |
| +{ |
| + return 0; |
| +} |
| + |
| +static inline u8 mt792x_acpi_get_flags(struct mt792x_phy *phy) |
| +{ |
| + return 0; |
| +} |
| +#endif |
| + |
| +#endif /* __MT7925_H */ |
| diff --git a/mt7921/acpi_sar.c b/mt792x_acpi_sar.c |
| similarity index 64% |
| rename from mt7921/acpi_sar.c |
| rename to mt792x_acpi_sar.c |
| index 48dd0dec..303c0f5c 100644 |
| --- a/mt7921/acpi_sar.c |
| +++ b/mt792x_acpi_sar.c |
| @@ -1,15 +1,15 @@ |
| // SPDX-License-Identifier: ISC |
| -/* Copyright (C) 2022 MediaTek Inc. */ |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| |
| #include <linux/acpi.h> |
| -#include "mt7921.h" |
| +#include "mt792x.h" |
| |
| static int |
| -mt7921_acpi_read(struct mt7921_dev *dev, u8 *method, u8 **tbl, u32 *len) |
| +mt792x_acpi_read(struct mt792x_dev *dev, u8 *method, u8 **tbl, u32 *len) |
| { |
| struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| - union acpi_object *sar_root, *sar_unit; |
| struct mt76_dev *mdev = &dev->mt76; |
| + union acpi_object *sar_root; |
| acpi_handle root, handle; |
| acpi_status status; |
| u32 i = 0; |
| @@ -45,18 +45,20 @@ mt7921_acpi_read(struct mt7921_dev *dev, u8 *method, u8 **tbl, u32 *len) |
| goto free; |
| } |
| } |
| + |
| if (len) |
| *len = sar_root->package.count; |
| |
| for (i = 0; i < sar_root->package.count; i++) { |
| - sar_unit = &sar_root->package.elements[i]; |
| + union acpi_object *sar_unit = &sar_root->package.elements[i]; |
| |
| if (sar_unit->type != ACPI_TYPE_INTEGER) |
| break; |
| + |
| *(*tbl + i) = (u8)sar_unit->integer.value; |
| } |
| - ret = (i == sar_root->package.count) ? 0 : -EINVAL; |
| |
| + ret = i == sar_root->package.count ? 0 : -EINVAL; |
| free: |
| kfree(sar_root); |
| |
| @@ -64,36 +66,37 @@ free: |
| } |
| |
| /* MTCL : Country List Table for 6G band */ |
| -static int |
| -mt7921_asar_acpi_read_mtcl(struct mt7921_dev *dev, u8 **table, u8 *version) |
| +static void |
| +mt792x_asar_acpi_read_mtcl(struct mt792x_dev *dev, u8 **table, u8 *version) |
| { |
| - *version = (mt7921_acpi_read(dev, MT7921_ACPI_MTCL, table, NULL) < 0) |
| - ? 1 : 2; |
| - return 0; |
| + if (mt792x_acpi_read(dev, MT792x_ACPI_MTCL, table, NULL) < 0) |
| + *version = 1; |
| + else |
| + *version = 2; |
| } |
| |
| /* MTDS : Dynamic SAR Power Table */ |
| static int |
| -mt7921_asar_acpi_read_mtds(struct mt7921_dev *dev, u8 **table, u8 version) |
| +mt792x_asar_acpi_read_mtds(struct mt792x_dev *dev, u8 **table, u8 version) |
| { |
| int len, ret, sarlen, prelen, tblcnt; |
| bool enable; |
| |
| - ret = mt7921_acpi_read(dev, MT7921_ACPI_MTDS, table, &len); |
| + ret = mt792x_acpi_read(dev, MT792x_ACPI_MTDS, table, &len); |
| if (ret) |
| return ret; |
| |
| /* Table content validation */ |
| switch (version) { |
| case 1: |
| - enable = ((struct mt7921_asar_dyn *)*table)->enable; |
| - sarlen = sizeof(struct mt7921_asar_dyn_limit); |
| - prelen = sizeof(struct mt7921_asar_dyn); |
| + enable = ((struct mt792x_asar_dyn *)*table)->enable; |
| + sarlen = sizeof(struct mt792x_asar_dyn_limit); |
| + prelen = sizeof(struct mt792x_asar_dyn); |
| break; |
| case 2: |
| - enable = ((struct mt7921_asar_dyn_v2 *)*table)->enable; |
| - sarlen = sizeof(struct mt7921_asar_dyn_limit_v2); |
| - prelen = sizeof(struct mt7921_asar_dyn_v2); |
| + enable = ((struct mt792x_asar_dyn_v2 *)*table)->enable; |
| + sarlen = sizeof(struct mt792x_asar_dyn_limit_v2); |
| + prelen = sizeof(struct mt792x_asar_dyn_v2); |
| break; |
| default: |
| return -EINVAL; |
| @@ -101,88 +104,89 @@ mt7921_asar_acpi_read_mtds(struct mt7921_dev *dev, u8 **table, u8 version) |
| |
| tblcnt = (len - prelen) / sarlen; |
| if (!enable || |
| - tblcnt > MT7921_ASAR_MAX_DYN || tblcnt < MT7921_ASAR_MIN_DYN) |
| - ret = -EINVAL; |
| + tblcnt > MT792x_ASAR_MAX_DYN || tblcnt < MT792x_ASAR_MIN_DYN) |
| + return -EINVAL; |
| |
| - return ret; |
| + return 0; |
| } |
| |
| /* MTGS : Geo SAR Power Table */ |
| static int |
| -mt7921_asar_acpi_read_mtgs(struct mt7921_dev *dev, u8 **table, u8 version) |
| +mt792x_asar_acpi_read_mtgs(struct mt792x_dev *dev, u8 **table, u8 version) |
| { |
| - int len, ret = 0, sarlen, prelen, tblcnt; |
| + int len, ret, sarlen, prelen, tblcnt; |
| |
| - ret = mt7921_acpi_read(dev, MT7921_ACPI_MTGS, table, &len); |
| + ret = mt792x_acpi_read(dev, MT792x_ACPI_MTGS, table, &len); |
| if (ret) |
| return ret; |
| |
| /* Table content validation */ |
| switch (version) { |
| case 1: |
| - sarlen = sizeof(struct mt7921_asar_geo_limit); |
| - prelen = sizeof(struct mt7921_asar_geo); |
| + sarlen = sizeof(struct mt792x_asar_geo_limit); |
| + prelen = sizeof(struct mt792x_asar_geo); |
| break; |
| case 2: |
| - sarlen = sizeof(struct mt7921_asar_geo_limit_v2); |
| - prelen = sizeof(struct mt7921_asar_geo_v2); |
| + sarlen = sizeof(struct mt792x_asar_geo_limit_v2); |
| + prelen = sizeof(struct mt792x_asar_geo_v2); |
| break; |
| default: |
| return -EINVAL; |
| } |
| |
| tblcnt = (len - prelen) / sarlen; |
| - if (tblcnt > MT7921_ASAR_MAX_GEO || tblcnt < MT7921_ASAR_MIN_GEO) |
| - ret = -EINVAL; |
| + if (tblcnt > MT792x_ASAR_MAX_GEO || tblcnt < MT792x_ASAR_MIN_GEO) |
| + return -EINVAL; |
| |
| - return ret; |
| + return 0; |
| } |
| |
| /* MTFG : Flag Table */ |
| static int |
| -mt7921_asar_acpi_read_mtfg(struct mt7921_dev *dev, u8 **table) |
| +mt792x_asar_acpi_read_mtfg(struct mt792x_dev *dev, u8 **table) |
| { |
| int len, ret; |
| |
| - ret = mt7921_acpi_read(dev, MT7921_ACPI_MTFG, table, &len); |
| + ret = mt792x_acpi_read(dev, MT792x_ACPI_MTFG, table, &len); |
| if (ret) |
| return ret; |
| |
| - if (len < MT7921_ASAR_MIN_FG) |
| - ret = -EINVAL; |
| + if (len < MT792x_ASAR_MIN_FG) |
| + return -EINVAL; |
| |
| - return ret; |
| + return 0; |
| } |
| |
| -int mt7921_init_acpi_sar(struct mt7921_dev *dev) |
| +int mt792x_init_acpi_sar(struct mt792x_dev *dev) |
| { |
| - struct mt7921_acpi_sar *asar; |
| + struct mt792x_acpi_sar *asar; |
| int ret; |
| |
| asar = devm_kzalloc(dev->mt76.dev, sizeof(*asar), GFP_KERNEL); |
| if (!asar) |
| return -ENOMEM; |
| |
| - mt7921_asar_acpi_read_mtcl(dev, (u8 **)&asar->countrylist, &asar->ver); |
| + mt792x_asar_acpi_read_mtcl(dev, (u8 **)&asar->countrylist, &asar->ver); |
| |
| /* MTDS is mandatory. Return error if table is invalid */ |
| - ret = mt7921_asar_acpi_read_mtds(dev, (u8 **)&asar->dyn, asar->ver); |
| + ret = mt792x_asar_acpi_read_mtds(dev, (u8 **)&asar->dyn, asar->ver); |
| if (ret) { |
| devm_kfree(dev->mt76.dev, asar->dyn); |
| devm_kfree(dev->mt76.dev, asar->countrylist); |
| devm_kfree(dev->mt76.dev, asar); |
| + |
| return ret; |
| } |
| |
| /* MTGS is optional */ |
| - ret = mt7921_asar_acpi_read_mtgs(dev, (u8 **)&asar->geo, asar->ver); |
| + ret = mt792x_asar_acpi_read_mtgs(dev, (u8 **)&asar->geo, asar->ver); |
| if (ret) { |
| devm_kfree(dev->mt76.dev, asar->geo); |
| asar->geo = NULL; |
| } |
| |
| /* MTFG is optional */ |
| - ret = mt7921_asar_acpi_read_mtfg(dev, (u8 **)&asar->fg); |
| + ret = mt792x_asar_acpi_read_mtfg(dev, (u8 **)&asar->fg); |
| if (ret) { |
| devm_kfree(dev->mt76.dev, asar->fg); |
| asar->fg = NULL; |
| @@ -191,13 +195,14 @@ int mt7921_init_acpi_sar(struct mt7921_dev *dev) |
| |
| return 0; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_init_acpi_sar); |
| |
| static s8 |
| -mt7921_asar_get_geo_pwr(struct mt7921_phy *phy, |
| +mt792x_asar_get_geo_pwr(struct mt792x_phy *phy, |
| enum nl80211_band band, s8 dyn_power) |
| { |
| - struct mt7921_acpi_sar *asar = phy->acpisar; |
| - struct mt7921_asar_geo_band *band_pwr; |
| + struct mt792x_acpi_sar *asar = phy->acpisar; |
| + struct mt792x_asar_geo_band *band_pwr; |
| s8 geo_power; |
| u8 idx, max; |
| |
| @@ -248,12 +253,12 @@ mt7921_asar_get_geo_pwr(struct mt7921_phy *phy, |
| } |
| |
| static s8 |
| -mt7921_asar_range_pwr(struct mt7921_phy *phy, |
| +mt792x_asar_range_pwr(struct mt792x_phy *phy, |
| const struct cfg80211_sar_freq_ranges *range, |
| u8 idx) |
| { |
| const struct cfg80211_sar_capa *capa = phy->mt76->hw->wiphy->sar_capa; |
| - struct mt7921_acpi_sar *asar = phy->acpisar; |
| + struct mt792x_acpi_sar *asar = phy->acpisar; |
| u8 *limit, band, max; |
| |
| if (!capa) |
| @@ -277,10 +282,10 @@ mt7921_asar_range_pwr(struct mt7921_phy *phy, |
| else |
| band = NL80211_BAND_2GHZ; |
| |
| - return mt7921_asar_get_geo_pwr(phy, band, limit[idx]); |
| + return mt792x_asar_get_geo_pwr(phy, band, limit[idx]); |
| } |
| |
| -int mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default) |
| +int mt792x_init_acpi_sar_power(struct mt792x_phy *phy, bool set_default) |
| { |
| const struct cfg80211_sar_capa *capa = phy->mt76->hw->wiphy->sar_capa; |
| int i; |
| @@ -300,41 +305,46 @@ int mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default) |
| continue; |
| |
| frp->power = min_t(s8, set_default ? 127 : frp->power, |
| - mt7921_asar_range_pwr(phy, frp->range, i)); |
| + mt792x_asar_range_pwr(phy, frp->range, i)); |
| } |
| |
| return 0; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_init_acpi_sar_power); |
| |
| -u8 mt7921_acpi_get_flags(struct mt7921_phy *phy) |
| +u8 mt792x_acpi_get_flags(struct mt792x_phy *phy) |
| { |
| - struct mt7921_asar_fg *fg; |
| + struct mt792x_acpi_sar *acpisar = phy->acpisar; |
| + struct mt792x_asar_fg *fg; |
| struct { |
| u8 acpi_idx; |
| u8 chip_idx; |
| } map[] = { |
| - {1, 1}, |
| - {4, 2}, |
| + { 1, 1 }, |
| + { 4, 2 }, |
| }; |
| u8 flags = BIT(0); |
| int i, j; |
| |
| - if (!phy->acpisar) |
| + if (!acpisar) |
| return 0; |
| |
| - fg = phy->acpisar->fg; |
| + fg = acpisar->fg; |
| if (!fg) |
| return flags; |
| |
| /* pickup necessary settings per device and |
| * translate the index of bitmap for chip command. |
| */ |
| - for (i = 0; i < fg->nr_flag; i++) |
| - for (j = 0; j < ARRAY_SIZE(map); j++) |
| + for (i = 0; i < fg->nr_flag; i++) { |
| + for (j = 0; j < ARRAY_SIZE(map); j++) { |
| if (fg->flag[i] == map[j].acpi_idx) { |
| flags |= BIT(map[j].chip_idx); |
| break; |
| } |
| + } |
| + } |
| |
| return flags; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_acpi_get_flags); |
| diff --git a/mt792x_acpi_sar.h b/mt792x_acpi_sar.h |
| new file mode 100644 |
| index 00000000..d6d332e8 |
| --- /dev/null |
| +++ b/mt792x_acpi_sar.h |
| @@ -0,0 +1,105 @@ |
| +/* SPDX-License-Identifier: ISC */ |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| + |
| +#ifndef __MT7921_ACPI_SAR_H |
| +#define __MT7921_ACPI_SAR_H |
| + |
| +#define MT792x_ASAR_MIN_DYN 1 |
| +#define MT792x_ASAR_MAX_DYN 8 |
| +#define MT792x_ASAR_MIN_GEO 3 |
| +#define MT792x_ASAR_MAX_GEO 8 |
| +#define MT792x_ASAR_MIN_FG 8 |
| + |
| +#define MT792x_ACPI_MTCL "MTCL" |
| +#define MT792x_ACPI_MTDS "MTDS" |
| +#define MT792x_ACPI_MTGS "MTGS" |
| +#define MT792x_ACPI_MTFG "MTFG" |
| + |
| +struct mt792x_asar_dyn_limit { |
| + u8 idx; |
| + u8 frp[5]; |
| +} __packed; |
| + |
| +struct mt792x_asar_dyn { |
| + u8 names[4]; |
| + u8 enable; |
| + u8 nr_tbl; |
| + DECLARE_FLEX_ARRAY(struct mt792x_asar_dyn_limit, tbl); |
| +} __packed; |
| + |
| +struct mt792x_asar_dyn_limit_v2 { |
| + u8 idx; |
| + u8 frp[11]; |
| +} __packed; |
| + |
| +struct mt792x_asar_dyn_v2 { |
| + u8 names[4]; |
| + u8 enable; |
| + u8 rsvd; |
| + u8 nr_tbl; |
| + DECLARE_FLEX_ARRAY(struct mt792x_asar_dyn_limit_v2, tbl); |
| +} __packed; |
| + |
| +struct mt792x_asar_geo_band { |
| + u8 pwr; |
| + u8 offset; |
| +} __packed; |
| + |
| +struct mt792x_asar_geo_limit { |
| + u8 idx; |
| + /* 0:2G, 1:5G */ |
| + struct mt792x_asar_geo_band band[2]; |
| +} __packed; |
| + |
| +struct mt792x_asar_geo { |
| + u8 names[4]; |
| + u8 version; |
| + u8 nr_tbl; |
| + DECLARE_FLEX_ARRAY(struct mt792x_asar_geo_limit, tbl); |
| +} __packed; |
| + |
| +struct mt792x_asar_geo_limit_v2 { |
| + u8 idx; |
| + /* 0:2G, 1:5G, 2:6G */ |
| + struct mt792x_asar_geo_band band[3]; |
| +} __packed; |
| + |
| +struct mt792x_asar_geo_v2 { |
| + u8 names[4]; |
| + u8 version; |
| + u8 rsvd; |
| + u8 nr_tbl; |
| + DECLARE_FLEX_ARRAY(struct mt792x_asar_geo_limit_v2, tbl); |
| +} __packed; |
| + |
| +struct mt792x_asar_cl { |
| + u8 names[4]; |
| + u8 version; |
| + u8 mode_6g; |
| + u8 cl6g[6]; |
| +} __packed; |
| + |
| +struct mt792x_asar_fg { |
| + u8 names[4]; |
| + u8 version; |
| + u8 rsvd; |
| + u8 nr_flag; |
| + u8 rsvd1; |
| + u8 flag[]; |
| +} __packed; |
| + |
| +struct mt792x_acpi_sar { |
| + u8 ver; |
| + union { |
| + struct mt792x_asar_dyn *dyn; |
| + struct mt792x_asar_dyn_v2 *dyn_v2; |
| + }; |
| + union { |
| + struct mt792x_asar_geo *geo; |
| + struct mt792x_asar_geo_v2 *geo_v2; |
| + }; |
| + struct mt792x_asar_cl *countrylist; |
| + struct mt792x_asar_fg *fg; |
| +}; |
| + |
| +#endif |
| diff --git a/mt792x_core.c b/mt792x_core.c |
| new file mode 100644 |
| index 00000000..46be7f99 |
| --- /dev/null |
| +++ b/mt792x_core.c |
| @@ -0,0 +1,844 @@ |
| +// SPDX-License-Identifier: ISC |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| + |
| +#include <linux/module.h> |
| +#include <linux/firmware.h> |
| + |
| +#include "mt792x.h" |
| +#include "dma.h" |
| + |
| +static const struct ieee80211_iface_limit if_limits[] = { |
| + { |
| + .max = MT792x_MAX_INTERFACES, |
| + .types = BIT(NL80211_IFTYPE_STATION) |
| + }, |
| + { |
| + .max = 1, |
| + .types = BIT(NL80211_IFTYPE_AP) |
| + } |
| +}; |
| + |
| +static const struct ieee80211_iface_combination if_comb[] = { |
| + { |
| + .limits = if_limits, |
| + .n_limits = ARRAY_SIZE(if_limits), |
| + .max_interfaces = MT792x_MAX_INTERFACES, |
| + .num_different_channels = 1, |
| + .beacon_int_infra_match = true, |
| + }, |
| +}; |
| + |
| +static const struct ieee80211_iface_limit if_limits_chanctx[] = { |
| + { |
| + .max = 2, |
| + .types = BIT(NL80211_IFTYPE_STATION) | |
| + BIT(NL80211_IFTYPE_P2P_CLIENT) |
| + }, |
| + { |
| + .max = 1, |
| + .types = BIT(NL80211_IFTYPE_AP) | |
| + BIT(NL80211_IFTYPE_P2P_GO) |
| + } |
| +}; |
| + |
| +static const struct ieee80211_iface_combination if_comb_chanctx[] = { |
| + { |
| + .limits = if_limits_chanctx, |
| + .n_limits = ARRAY_SIZE(if_limits_chanctx), |
| + .max_interfaces = 2, |
| + .num_different_channels = 2, |
| + .beacon_int_infra_match = false, |
| + } |
| +}; |
| + |
| +void mt792x_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, |
| + struct sk_buff *skb) |
| +{ |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt76_phy *mphy = hw->priv; |
| + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
| + struct ieee80211_vif *vif = info->control.vif; |
| + struct mt76_wcid *wcid = &dev->mt76.global_wcid; |
| + int qid; |
| + |
| + if (control->sta) { |
| + struct mt792x_sta *sta; |
| + |
| + sta = (struct mt792x_sta *)control->sta->drv_priv; |
| + wcid = &sta->wcid; |
| + } |
| + |
| + if (vif && !control->sta) { |
| + struct mt792x_vif *mvif; |
| + |
| + mvif = (struct mt792x_vif *)vif->drv_priv; |
| + wcid = &mvif->sta.wcid; |
| + } |
| + |
| + if (mt76_connac_pm_ref(mphy, &dev->pm)) { |
| + mt76_tx(mphy, control->sta, wcid, skb); |
| + mt76_connac_pm_unref(mphy, &dev->pm); |
| + return; |
| + } |
| + |
| + qid = skb_get_queue_mapping(skb); |
| + if (qid >= MT_TXQ_PSD) { |
| + qid = IEEE80211_AC_BE; |
| + skb_set_queue_mapping(skb, qid); |
| + } |
| + |
| + mt76_connac_pm_queue_skb(hw, &dev->pm, wcid, skb); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_tx); |
| + |
| +void mt792x_remove_interface(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif) |
| +{ |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_sta *msta = &mvif->sta; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + int idx = msta->wcid.idx; |
| + |
| + mt792x_mutex_acquire(dev); |
| + mt76_connac_free_pending_tx_skbs(&dev->pm, &msta->wcid); |
| + mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, false); |
| + |
| + rcu_assign_pointer(dev->mt76.wcid[idx], NULL); |
| + |
| + dev->mt76.vif_mask &= ~BIT_ULL(mvif->mt76.idx); |
| + phy->omac_mask &= ~BIT_ULL(mvif->mt76.omac_idx); |
| + mt792x_mutex_release(dev); |
| + |
| + spin_lock_bh(&dev->mt76.sta_poll_lock); |
| + if (!list_empty(&msta->wcid.poll_list)) |
| + list_del_init(&msta->wcid.poll_list); |
| + spin_unlock_bh(&dev->mt76.sta_poll_lock); |
| + |
| + mt76_packet_id_flush(&dev->mt76, &msta->wcid); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_remove_interface); |
| + |
| +int mt792x_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + unsigned int link_id, u16 queue, |
| + const struct ieee80211_tx_queue_params *params) |
| +{ |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + |
| + /* no need to update right away, we'll get BSS_CHANGED_QOS */ |
| + queue = mt76_connac_lmac_mapping(queue); |
| + mvif->queue_params[queue] = *params; |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_conf_tx); |
| + |
| +int mt792x_get_stats(struct ieee80211_hw *hw, |
| + struct ieee80211_low_level_stats *stats) |
| +{ |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + struct mt76_mib_stats *mib = &phy->mib; |
| + |
| + mt792x_mutex_acquire(phy->dev); |
| + |
| + stats->dot11RTSSuccessCount = mib->rts_cnt; |
| + stats->dot11RTSFailureCount = mib->rts_retries_cnt; |
| + stats->dot11FCSErrorCount = mib->fcs_err_cnt; |
| + stats->dot11ACKFailureCount = mib->ack_fail_cnt; |
| + |
| + mt792x_mutex_release(phy->dev); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_get_stats); |
| + |
| +u64 mt792x_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
| +{ |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + u8 omac_idx = mvif->mt76.omac_idx; |
| + union { |
| + u64 t64; |
| + u32 t32[2]; |
| + } tsf; |
| + u16 n; |
| + |
| + mt792x_mutex_acquire(dev); |
| + |
| + n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx; |
| + /* TSF software read */ |
| + mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_MODE); |
| + tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0(0)); |
| + tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1(0)); |
| + |
| + mt792x_mutex_release(dev); |
| + |
| + return tsf.t64; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_get_tsf); |
| + |
| +void mt792x_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + u64 timestamp) |
| +{ |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + u8 omac_idx = mvif->mt76.omac_idx; |
| + union { |
| + u64 t64; |
| + u32 t32[2]; |
| + } tsf = { .t64 = timestamp, }; |
| + u16 n; |
| + |
| + mt792x_mutex_acquire(dev); |
| + |
| + n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx; |
| + mt76_wr(dev, MT_LPON_UTTR0(0), tsf.t32[0]); |
| + mt76_wr(dev, MT_LPON_UTTR1(0), tsf.t32[1]); |
| + /* TSF software overwrite */ |
| + mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_WRITE); |
| + |
| + mt792x_mutex_release(dev); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_set_tsf); |
| + |
| +void mt792x_tx_worker(struct mt76_worker *w) |
| +{ |
| + struct mt792x_dev *dev = container_of(w, struct mt792x_dev, |
| + mt76.tx_worker); |
| + |
| + if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { |
| + queue_work(dev->mt76.wq, &dev->pm.wake_work); |
| + return; |
| + } |
| + |
| + mt76_txq_schedule_all(&dev->mphy); |
| + mt76_connac_pm_unref(&dev->mphy, &dev->pm); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_tx_worker); |
| + |
| +void mt792x_roc_timer(struct timer_list *timer) |
| +{ |
| + struct mt792x_phy *phy = from_timer(phy, timer, roc_timer); |
| + |
| + ieee80211_queue_work(phy->mt76->hw, &phy->roc_work); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_roc_timer); |
| + |
| +void mt792x_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + u32 queues, bool drop) |
| +{ |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + |
| + wait_event_timeout(dev->mt76.tx_wait, |
| + !mt76_has_tx_pending(&dev->mphy), HZ / 2); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_flush); |
| + |
| +int mt792x_assign_vif_chanctx(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif, |
| + struct ieee80211_bss_conf *link_conf, |
| + struct ieee80211_chanctx_conf *ctx) |
| +{ |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + |
| + mutex_lock(&dev->mt76.mutex); |
| + mvif->ctx = ctx; |
| + mutex_unlock(&dev->mt76.mutex); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_assign_vif_chanctx); |
| + |
| +void mt792x_unassign_vif_chanctx(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif, |
| + struct ieee80211_bss_conf *link_conf, |
| + struct ieee80211_chanctx_conf *ctx) |
| +{ |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + |
| + mutex_lock(&dev->mt76.mutex); |
| + mvif->ctx = NULL; |
| + mutex_unlock(&dev->mt76.mutex); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_unassign_vif_chanctx); |
| + |
| +void mt792x_set_wakeup(struct ieee80211_hw *hw, bool enabled) |
| +{ |
| + struct mt792x_dev *dev = mt792x_hw_dev(hw); |
| + struct mt76_dev *mdev = &dev->mt76; |
| + |
| + device_set_wakeup_enable(mdev->dev, enabled); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_set_wakeup); |
| + |
| +static const char mt792x_gstrings_stats[][ETH_GSTRING_LEN] = { |
| + /* tx counters */ |
| + "tx_ampdu_cnt", |
| + "tx_mpdu_attempts", |
| + "tx_mpdu_success", |
| + "tx_pkt_ebf_cnt", |
| + "tx_pkt_ibf_cnt", |
| + "tx_ampdu_len:0-1", |
| + "tx_ampdu_len:2-10", |
| + "tx_ampdu_len:11-19", |
| + "tx_ampdu_len:20-28", |
| + "tx_ampdu_len:29-37", |
| + "tx_ampdu_len:38-46", |
| + "tx_ampdu_len:47-55", |
| + "tx_ampdu_len:56-79", |
| + "tx_ampdu_len:80-103", |
| + "tx_ampdu_len:104-127", |
| + "tx_ampdu_len:128-151", |
| + "tx_ampdu_len:152-175", |
| + "tx_ampdu_len:176-199", |
| + "tx_ampdu_len:200-223", |
| + "tx_ampdu_len:224-247", |
| + "ba_miss_count", |
| + "tx_beamformer_ppdu_iBF", |
| + "tx_beamformer_ppdu_eBF", |
| + "tx_beamformer_rx_feedback_all", |
| + "tx_beamformer_rx_feedback_he", |
| + "tx_beamformer_rx_feedback_vht", |
| + "tx_beamformer_rx_feedback_ht", |
| + "tx_msdu_pack_1", |
| + "tx_msdu_pack_2", |
| + "tx_msdu_pack_3", |
| + "tx_msdu_pack_4", |
| + "tx_msdu_pack_5", |
| + "tx_msdu_pack_6", |
| + "tx_msdu_pack_7", |
| + "tx_msdu_pack_8", |
| + /* rx counters */ |
| + "rx_mpdu_cnt", |
| + "rx_ampdu_cnt", |
| + "rx_ampdu_bytes_cnt", |
| + "rx_ba_cnt", |
| + /* per vif counters */ |
| + "v_tx_mode_cck", |
| + "v_tx_mode_ofdm", |
| + "v_tx_mode_ht", |
| + "v_tx_mode_ht_gf", |
| + "v_tx_mode_vht", |
| + "v_tx_mode_he_su", |
| + "v_tx_mode_he_ext_su", |
| + "v_tx_mode_he_tb", |
| + "v_tx_mode_he_mu", |
| + "v_tx_mode_eht_su", |
| + "v_tx_mode_eht_trig", |
| + "v_tx_mode_eht_mu", |
| + "v_tx_bw_20", |
| + "v_tx_bw_40", |
| + "v_tx_bw_80", |
| + "v_tx_bw_160", |
| + "v_tx_mcs_0", |
| + "v_tx_mcs_1", |
| + "v_tx_mcs_2", |
| + "v_tx_mcs_3", |
| + "v_tx_mcs_4", |
| + "v_tx_mcs_5", |
| + "v_tx_mcs_6", |
| + "v_tx_mcs_7", |
| + "v_tx_mcs_8", |
| + "v_tx_mcs_9", |
| + "v_tx_mcs_10", |
| + "v_tx_mcs_11", |
| + "v_tx_mcs_12", |
| + "v_tx_mcs_13", |
| + "v_tx_nss_1", |
| + "v_tx_nss_2", |
| + "v_tx_nss_3", |
| + "v_tx_nss_4", |
| +}; |
| + |
| +void mt792x_get_et_strings(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + u32 sset, u8 *data) |
| +{ |
| + if (sset != ETH_SS_STATS) |
| + return; |
| + |
| + memcpy(data, *mt792x_gstrings_stats, sizeof(mt792x_gstrings_stats)); |
| + |
| + data += sizeof(mt792x_gstrings_stats); |
| + page_pool_ethtool_stats_get_strings(data); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_get_et_strings); |
| + |
| +int mt792x_get_et_sset_count(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + int sset) |
| +{ |
| + if (sset != ETH_SS_STATS) |
| + return 0; |
| + |
| + return ARRAY_SIZE(mt792x_gstrings_stats) + |
| + page_pool_ethtool_stats_get_count(); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_get_et_sset_count); |
| + |
| +static void |
| +mt792x_ethtool_worker(void *wi_data, struct ieee80211_sta *sta) |
| +{ |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| + struct mt76_ethtool_worker_info *wi = wi_data; |
| + |
| + if (msta->vif->mt76.idx != wi->idx) |
| + return; |
| + |
| + mt76_ethtool_worker(wi, &msta->wcid.stats, true); |
| +} |
| + |
| +void mt792x_get_et_stats(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| + struct ethtool_stats *stats, u64 *data) |
| +{ |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + int stats_size = ARRAY_SIZE(mt792x_gstrings_stats); |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + struct mt792x_dev *dev = phy->dev; |
| + struct mt76_mib_stats *mib = &phy->mib; |
| + struct mt76_ethtool_worker_info wi = { |
| + .data = data, |
| + .idx = mvif->mt76.idx, |
| + }; |
| + int i, ei = 0; |
| + |
| + mt792x_mutex_acquire(dev); |
| + |
| + mt792x_mac_update_mib_stats(phy); |
| + |
| + data[ei++] = mib->tx_ampdu_cnt; |
| + data[ei++] = mib->tx_mpdu_attempts_cnt; |
| + data[ei++] = mib->tx_mpdu_success_cnt; |
| + data[ei++] = mib->tx_pkt_ebf_cnt; |
| + data[ei++] = mib->tx_pkt_ibf_cnt; |
| + |
| + /* Tx ampdu stat */ |
| + for (i = 0; i < 15; i++) |
| + data[ei++] = phy->mt76->aggr_stats[i]; |
| + |
| + data[ei++] = phy->mib.ba_miss_cnt; |
| + |
| + /* Tx Beamformer monitor */ |
| + data[ei++] = mib->tx_bf_ibf_ppdu_cnt; |
| + data[ei++] = mib->tx_bf_ebf_ppdu_cnt; |
| + |
| + /* Tx Beamformer Rx feedback monitor */ |
| + data[ei++] = mib->tx_bf_rx_fb_all_cnt; |
| + data[ei++] = mib->tx_bf_rx_fb_he_cnt; |
| + data[ei++] = mib->tx_bf_rx_fb_vht_cnt; |
| + data[ei++] = mib->tx_bf_rx_fb_ht_cnt; |
| + |
| + /* Tx amsdu info (pack-count histogram) */ |
| + for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) |
| + data[ei++] = mib->tx_amsdu[i]; |
| + |
| + /* rx counters */ |
| + data[ei++] = mib->rx_mpdu_cnt; |
| + data[ei++] = mib->rx_ampdu_cnt; |
| + data[ei++] = mib->rx_ampdu_bytes_cnt; |
| + data[ei++] = mib->rx_ba_cnt; |
| + |
| + /* Add values for all stations owned by this vif */ |
| + wi.initial_stat_idx = ei; |
| + ieee80211_iterate_stations_atomic(hw, mt792x_ethtool_worker, &wi); |
| + |
| + mt792x_mutex_release(dev); |
| + |
| + if (!wi.sta_count) |
| + return; |
| + |
| + ei += wi.worker_stat_count; |
| + |
| + mt76_ethtool_page_pool_stats(&dev->mt76, &data[ei], &ei); |
| + stats_size += page_pool_ethtool_stats_get_count(); |
| + |
| + if (ei != stats_size) |
| + dev_err(dev->mt76.dev, "ei: %d SSTATS_LEN: %d", ei, |
| + stats_size); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_get_et_stats); |
| + |
| +void mt792x_sta_statistics(struct ieee80211_hw *hw, |
| + struct ieee80211_vif *vif, |
| + struct ieee80211_sta *sta, |
| + struct station_info *sinfo) |
| +{ |
| + struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; |
| + struct rate_info *txrate = &msta->wcid.rate; |
| + |
| + if (!txrate->legacy && !txrate->flags) |
| + return; |
| + |
| + if (txrate->legacy) { |
| + sinfo->txrate.legacy = txrate->legacy; |
| + } else { |
| + sinfo->txrate.mcs = txrate->mcs; |
| + sinfo->txrate.nss = txrate->nss; |
| + sinfo->txrate.bw = txrate->bw; |
| + sinfo->txrate.he_gi = txrate->he_gi; |
| + sinfo->txrate.he_dcm = txrate->he_dcm; |
| + sinfo->txrate.he_ru_alloc = txrate->he_ru_alloc; |
| + } |
| + sinfo->tx_failed = msta->wcid.stats.tx_failed; |
| + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED); |
| + |
| + sinfo->tx_retries = msta->wcid.stats.tx_retries; |
| + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_RETRIES); |
| + |
| + sinfo->txrate.flags = txrate->flags; |
| + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); |
| + |
| + sinfo->ack_signal = (s8)msta->ack_signal; |
| + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL); |
| + |
| + sinfo->avg_ack_signal = -(s8)ewma_avg_signal_read(&msta->avg_ack_signal); |
| + sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL_AVG); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_sta_statistics); |
| + |
| +void mt792x_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class) |
| +{ |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + struct mt792x_dev *dev = phy->dev; |
| + |
| + mt792x_mutex_acquire(dev); |
| + |
| + phy->coverage_class = max_t(s16, coverage_class, 0); |
| + mt792x_mac_set_timeing(phy); |
| + |
| + mt792x_mutex_release(dev); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_set_coverage_class); |
| + |
| +int mt792x_init_wiphy(struct ieee80211_hw *hw) |
| +{ |
| + struct mt792x_phy *phy = mt792x_hw_phy(hw); |
| + struct mt792x_dev *dev = phy->dev; |
| + struct wiphy *wiphy = hw->wiphy; |
| + |
| + hw->queues = 4; |
| + if (dev->has_eht) { |
| + hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_EHT; |
| + hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_EHT; |
| + } else { |
| + hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; |
| + hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; |
| + } |
| + hw->netdev_features = NETIF_F_RXCSUM; |
| + |
| + hw->radiotap_timestamp.units_pos = |
| + IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; |
| + |
| + phy->slottime = 9; |
| + |
| + hw->sta_data_size = sizeof(struct mt792x_sta); |
| + hw->vif_data_size = sizeof(struct mt792x_vif); |
| + |
| + if (dev->fw_features & MT792x_FW_CAP_CNM) { |
| + wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; |
| + wiphy->iface_combinations = if_comb_chanctx; |
| + wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_chanctx); |
| + } else { |
| + wiphy->flags &= ~WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; |
| + wiphy->iface_combinations = if_comb; |
| + wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); |
| + } |
| + wiphy->flags &= ~(WIPHY_FLAG_IBSS_RSN | WIPHY_FLAG_4ADDR_AP | |
| + WIPHY_FLAG_4ADDR_STATION); |
| + wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | |
| + BIT(NL80211_IFTYPE_AP) | |
| + BIT(NL80211_IFTYPE_P2P_CLIENT) | |
| + BIT(NL80211_IFTYPE_P2P_GO); |
| + wiphy->max_remain_on_channel_duration = 5000; |
| + wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN; |
| + wiphy->max_scan_ssids = 4; |
| + wiphy->max_sched_scan_plan_interval = |
| + MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL; |
| + wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN; |
| + wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID; |
| + wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH; |
| + wiphy->max_sched_scan_reqs = 1; |
| + wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH | |
| + WIPHY_FLAG_SPLIT_SCAN_6GHZ; |
| + |
| + wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR | |
| + NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; |
| + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); |
| + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY); |
| + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT); |
| + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); |
| + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); |
| + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT); |
| + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); |
| + |
| + ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); |
| + ieee80211_hw_set(hw, HAS_RATE_CONTROL); |
| + ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); |
| + ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); |
| + ieee80211_hw_set(hw, WANT_MONITOR_VIF); |
| + ieee80211_hw_set(hw, SUPPORTS_PS); |
| + ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); |
| + ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW); |
| + ieee80211_hw_set(hw, CONNECTION_MONITOR); |
| + |
| + if (dev->pm.enable) |
| + ieee80211_hw_set(hw, CONNECTION_MONITOR); |
| + |
| + hw->max_tx_fragments = 4; |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_init_wiphy); |
| + |
| +static u8 |
| +mt792x_get_offload_capability(struct device *dev, const char *fw_wm) |
| +{ |
| + const struct mt76_connac2_fw_trailer *hdr; |
| + struct mt792x_realease_info *rel_info; |
| + const struct firmware *fw; |
| + int ret, i, offset = 0; |
| + const u8 *data, *end; |
| + u8 offload_caps = 0; |
| + |
| + ret = request_firmware(&fw, fw_wm, dev); |
| + if (ret) |
| + return ret; |
| + |
| + if (!fw || !fw->data || fw->size < sizeof(*hdr)) { |
| + dev_err(dev, "Invalid firmware\n"); |
| + goto out; |
| + } |
| + |
| + data = fw->data; |
| + hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); |
| + |
| + for (i = 0; i < hdr->n_region; i++) { |
| + const struct mt76_connac2_fw_region *region; |
| + |
| + region = (const void *)((const u8 *)hdr - |
| + (hdr->n_region - i) * sizeof(*region)); |
| + offset += le32_to_cpu(region->len); |
| + } |
| + |
| + data += offset + 16; |
| + rel_info = (struct mt792x_realease_info *)data; |
| + data += sizeof(*rel_info); |
| + end = data + le16_to_cpu(rel_info->len); |
| + |
| + while (data < end) { |
| + rel_info = (struct mt792x_realease_info *)data; |
| + data += sizeof(*rel_info); |
| + |
| + if (rel_info->tag == MT792x_FW_TAG_FEATURE) { |
| + struct mt792x_fw_features *features; |
| + |
| + features = (struct mt792x_fw_features *)data; |
| + offload_caps = features->data; |
| + break; |
| + } |
| + |
| + data += le16_to_cpu(rel_info->len) + rel_info->pad_len; |
| + } |
| + |
| +out: |
| + release_firmware(fw); |
| + |
| + return offload_caps; |
| +} |
| + |
| +struct ieee80211_ops * |
| +mt792x_get_mac80211_ops(struct device *dev, |
| + const struct ieee80211_ops *mac80211_ops, |
| + void *drv_data, u8 *fw_features) |
| +{ |
| + struct ieee80211_ops *ops; |
| + |
| + ops = devm_kmemdup(dev, mac80211_ops, sizeof(struct ieee80211_ops), |
| + GFP_KERNEL); |
| + if (!ops) |
| + return NULL; |
| + |
| + *fw_features = mt792x_get_offload_capability(dev, drv_data); |
| + if (!(*fw_features & MT792x_FW_CAP_CNM)) { |
| + ops->remain_on_channel = NULL; |
| + ops->cancel_remain_on_channel = NULL; |
| + ops->add_chanctx = NULL; |
| + ops->remove_chanctx = NULL; |
| + ops->change_chanctx = NULL; |
| + ops->assign_vif_chanctx = NULL; |
| + ops->unassign_vif_chanctx = NULL; |
| + ops->mgd_prepare_tx = NULL; |
| + ops->mgd_complete_tx = NULL; |
| + } |
| + return ops; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_get_mac80211_ops); |
| + |
| +int mt792x_init_wcid(struct mt792x_dev *dev) |
| +{ |
| + int idx; |
| + |
| + /* Beacon and mgmt frames should occupy wcid 0 */ |
| + idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT792x_WTBL_STA - 1); |
| + if (idx) |
| + return -ENOSPC; |
| + |
| + dev->mt76.global_wcid.idx = idx; |
| + dev->mt76.global_wcid.hw_key_idx = -1; |
| + dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET; |
| + rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_init_wcid); |
| + |
| +int mt792x_mcu_drv_pmctrl(struct mt792x_dev *dev) |
| +{ |
| + struct mt76_phy *mphy = &dev->mt76.phy; |
| + struct mt76_connac_pm *pm = &dev->pm; |
| + int err = 0; |
| + |
| + mutex_lock(&pm->mutex); |
| + |
| + if (!test_bit(MT76_STATE_PM, &mphy->state)) |
| + goto out; |
| + |
| + err = __mt792x_mcu_drv_pmctrl(dev); |
| +out: |
| + mutex_unlock(&pm->mutex); |
| + |
| + if (err) |
| + mt792x_reset(&dev->mt76); |
| + |
| + return err; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mcu_drv_pmctrl); |
| + |
| +int mt792x_mcu_fw_pmctrl(struct mt792x_dev *dev) |
| +{ |
| + struct mt76_phy *mphy = &dev->mt76.phy; |
| + struct mt76_connac_pm *pm = &dev->pm; |
| + int err = 0; |
| + |
| + mutex_lock(&pm->mutex); |
| + |
| + if (mt76_connac_skip_fw_pmctrl(mphy, pm)) |
| + goto out; |
| + |
| + err = __mt792x_mcu_fw_pmctrl(dev); |
| +out: |
| + mutex_unlock(&pm->mutex); |
| + |
| + if (err) |
| + mt792x_reset(&dev->mt76); |
| + |
| + return err; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mcu_fw_pmctrl); |
| + |
| +int __mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev) |
| +{ |
| + int i, err = 0; |
| + |
| + for (i = 0; i < MT792x_DRV_OWN_RETRY_COUNT; i++) { |
| + mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN); |
| + if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL, |
| + PCIE_LPCR_HOST_OWN_SYNC, 0, 50, 1)) |
| + break; |
| + } |
| + |
| + if (i == MT792x_DRV_OWN_RETRY_COUNT) { |
| + dev_err(dev->mt76.dev, "driver own failed\n"); |
| + err = -EIO; |
| + } |
| + |
| + return err; |
| +} |
| +EXPORT_SYMBOL_GPL(__mt792xe_mcu_drv_pmctrl); |
| + |
| +int mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev) |
| +{ |
| + struct mt76_phy *mphy = &dev->mt76.phy; |
| + struct mt76_connac_pm *pm = &dev->pm; |
| + int err; |
| + |
| + err = __mt792xe_mcu_drv_pmctrl(dev); |
| + if (err < 0) |
| + goto out; |
| + |
| + mt792x_wpdma_reinit_cond(dev); |
| + clear_bit(MT76_STATE_PM, &mphy->state); |
| + |
| + pm->stats.last_wake_event = jiffies; |
| + pm->stats.doze_time += pm->stats.last_wake_event - |
| + pm->stats.last_doze_event; |
| +out: |
| + return err; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xe_mcu_drv_pmctrl); |
| + |
| +int mt792xe_mcu_fw_pmctrl(struct mt792x_dev *dev) |
| +{ |
| + struct mt76_phy *mphy = &dev->mt76.phy; |
| + struct mt76_connac_pm *pm = &dev->pm; |
| + int i; |
| + |
| + for (i = 0; i < MT792x_DRV_OWN_RETRY_COUNT; i++) { |
| + mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN); |
| + if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL, |
| + PCIE_LPCR_HOST_OWN_SYNC, 4, 50, 1)) |
| + break; |
| + } |
| + |
| + if (i == MT792x_DRV_OWN_RETRY_COUNT) { |
| + dev_err(dev->mt76.dev, "firmware own failed\n"); |
| + clear_bit(MT76_STATE_PM, &mphy->state); |
| + return -EIO; |
| + } |
| + |
| + pm->stats.last_doze_event = jiffies; |
| + pm->stats.awake_time += pm->stats.last_doze_event - |
| + pm->stats.last_wake_event; |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xe_mcu_fw_pmctrl); |
| + |
| +int mt792x_load_firmware(struct mt792x_dev *dev) |
| +{ |
| + int ret; |
| + |
| + ret = mt76_connac2_load_patch(&dev->mt76, mt792x_patch_name(dev)); |
| + if (ret) |
| + return ret; |
| + |
| + if (mt76_is_sdio(&dev->mt76)) { |
| + /* activate again */ |
| + ret = __mt792x_mcu_fw_pmctrl(dev); |
| + if (!ret) |
| + ret = __mt792x_mcu_drv_pmctrl(dev); |
| + } |
| + |
| + ret = mt76_connac2_load_ram(&dev->mt76, mt792x_ram_name(dev), NULL); |
| + if (ret) |
| + return ret; |
| + |
| + if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY, |
| + MT_TOP_MISC2_FW_N9_RDY, 1500)) { |
| + dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); |
| + |
| + return -EIO; |
| + } |
| + |
| +#ifdef CONFIG_PM |
| + dev->mt76.hw->wiphy->wowlan = &mt76_connac_wowlan_support; |
| +#endif /* CONFIG_PM */ |
| + |
| + dev_dbg(dev->mt76.dev, "Firmware init done\n"); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_load_firmware); |
| + |
| +MODULE_LICENSE("Dual BSD/GPL"); |
| +MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); |
| diff --git a/mt792x_debugfs.c b/mt792x_debugfs.c |
| new file mode 100644 |
| index 00000000..9858d9a9 |
| --- /dev/null |
| +++ b/mt792x_debugfs.c |
| @@ -0,0 +1,168 @@ |
| +// SPDX-License-Identifier: ISC |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| + |
| +#include "mt792x.h" |
| + |
| +static void |
| +mt792x_ampdu_stat_read_phy(struct mt792x_phy *phy, |
| + struct seq_file *file) |
| +{ |
| + struct mt792x_dev *dev = file->private; |
| + int bound[15], range[4], i; |
| + |
| + if (!phy) |
| + return; |
| + |
| + mt792x_mac_update_mib_stats(phy); |
| + |
| + /* Tx ampdu stat */ |
| + for (i = 0; i < ARRAY_SIZE(range); i++) |
| + range[i] = mt76_rr(dev, MT_MIB_ARNG(0, i)); |
| + |
| + for (i = 0; i < ARRAY_SIZE(bound); i++) |
| + bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1; |
| + |
| + seq_puts(file, "\nPhy0\n"); |
| + |
| + seq_printf(file, "Length: %8d | ", bound[0]); |
| + for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) |
| + seq_printf(file, "%3d %3d | ", bound[i] + 1, bound[i + 1]); |
| + |
| + seq_puts(file, "\nCount: "); |
| + for (i = 0; i < ARRAY_SIZE(bound); i++) |
| + seq_printf(file, "%8d | ", phy->mt76->aggr_stats[i]); |
| + seq_puts(file, "\n"); |
| + |
| + seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); |
| +} |
| + |
| +int mt792x_tx_stats_show(struct seq_file *file, void *data) |
| +{ |
| + struct mt792x_dev *dev = file->private; |
| + struct mt792x_phy *phy = &dev->phy; |
| + struct mt76_mib_stats *mib = &phy->mib; |
| + int i; |
| + |
| + mt792x_mutex_acquire(dev); |
| + |
| + mt792x_ampdu_stat_read_phy(phy, file); |
| + |
| + seq_puts(file, "Tx MSDU stat:\n"); |
| + for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { |
| + seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ", |
| + i + 1, mib->tx_amsdu[i]); |
| + if (mib->tx_amsdu_cnt) |
| + seq_printf(file, "(%3d%%)\n", |
| + mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt); |
| + else |
| + seq_puts(file, "\n"); |
| + } |
| + |
| + mt792x_mutex_release(dev); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_tx_stats_show); |
| + |
| +int mt792x_queues_acq(struct seq_file *s, void *data) |
| +{ |
| + struct mt792x_dev *dev = dev_get_drvdata(s->private); |
| + int i; |
| + |
| + mt792x_mutex_acquire(dev); |
| + |
| + for (i = 0; i < 4; i++) { |
| + u32 ctrl, val, qlen = 0; |
| + int j; |
| + |
| + val = mt76_rr(dev, MT_PLE_AC_QEMPTY(i)); |
| + ctrl = BIT(31) | BIT(11) | (i << 24); |
| + |
| + for (j = 0; j < 32; j++) { |
| + if (val & BIT(j)) |
| + continue; |
| + |
| + mt76_wr(dev, MT_PLE_FL_Q0_CTRL, ctrl | j); |
| + qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL, |
| + GENMASK(11, 0)); |
| + } |
| + seq_printf(s, "AC%d: queued=%d\n", i, qlen); |
| + } |
| + |
| + mt792x_mutex_release(dev); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_queues_acq); |
| + |
| +int mt792x_queues_read(struct seq_file *s, void *data) |
| +{ |
| + struct mt792x_dev *dev = dev_get_drvdata(s->private); |
| + struct { |
| + struct mt76_queue *q; |
| + char *queue; |
| + } queue_map[] = { |
| + { dev->mphy.q_tx[MT_TXQ_BE], "WFDMA0" }, |
| + { dev->mt76.q_mcu[MT_MCUQ_WM], "MCUWM" }, |
| + { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" }, |
| + }; |
| + int i; |
| + |
| + for (i = 0; i < ARRAY_SIZE(queue_map); i++) { |
| + struct mt76_queue *q = queue_map[i].q; |
| + |
| + if (!q) |
| + continue; |
| + |
| + seq_printf(s, |
| + "%s: queued=%d head=%d tail=%d\n", |
| + queue_map[i].queue, q->queued, q->head, |
| + q->tail); |
| + } |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_queues_read); |
| + |
| +int mt792x_pm_stats(struct seq_file *s, void *data) |
| +{ |
| + struct mt792x_dev *dev = dev_get_drvdata(s->private); |
| + struct mt76_connac_pm *pm = &dev->pm; |
| + |
| + unsigned long awake_time = pm->stats.awake_time; |
| + unsigned long doze_time = pm->stats.doze_time; |
| + |
| + if (!test_bit(MT76_STATE_PM, &dev->mphy.state)) |
| + awake_time += jiffies - pm->stats.last_wake_event; |
| + else |
| + doze_time += jiffies - pm->stats.last_doze_event; |
| + |
| + seq_printf(s, "awake time: %14u\ndoze time: %15u\n", |
| + jiffies_to_msecs(awake_time), |
| + jiffies_to_msecs(doze_time)); |
| + |
| + seq_printf(s, "low power wakes: %9d\n", pm->stats.lp_wake); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_pm_stats); |
| + |
| +int mt792x_pm_idle_timeout_set(void *data, u64 val) |
| +{ |
| + struct mt792x_dev *dev = data; |
| + |
| + dev->pm.idle_timeout = msecs_to_jiffies(val); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_pm_idle_timeout_set); |
| + |
| +int mt792x_pm_idle_timeout_get(void *data, u64 *val) |
| +{ |
| + struct mt792x_dev *dev = data; |
| + |
| + *val = jiffies_to_msecs(dev->pm.idle_timeout); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_pm_idle_timeout_get); |
| diff --git a/mt7921/dma.c b/mt792x_dma.c |
| similarity index 55% |
| rename from mt7921/dma.c |
| rename to mt792x_dma.c |
| index 4153cd6c..a3dbd386 100644 |
| --- a/mt7921/dma.c |
| +++ b/mt792x_dma.c |
| @@ -1,52 +1,93 @@ |
| // SPDX-License-Identifier: ISC |
| -/* Copyright (C) 2020 MediaTek Inc. */ |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| |
| -#include "mt7921.h" |
| -#include "../dma.h" |
| -#include "../mt76_connac2_mac.h" |
| +#include <linux/module.h> |
| +#include <linux/firmware.h> |
| |
| -static int mt7921_poll_tx(struct napi_struct *napi, int budget) |
| +#include "mt792x.h" |
| +#include "dma.h" |
| +#include "trace.h" |
| + |
| +irqreturn_t mt792x_irq_handler(int irq, void *dev_instance) |
| { |
| - struct mt7921_dev *dev; |
| + struct mt792x_dev *dev = dev_instance; |
| |
| - dev = container_of(napi, struct mt7921_dev, mt76.tx_napi); |
| + mt76_wr(dev, dev->irq_map->host_irq_enable, 0); |
| |
| - if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { |
| - napi_complete(napi); |
| - queue_work(dev->mt76.wq, &dev->pm.wake_work); |
| - return 0; |
| - } |
| + if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) |
| + return IRQ_NONE; |
| |
| - mt76_connac_tx_cleanup(&dev->mt76); |
| - if (napi_complete(napi)) |
| - mt76_connac_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL); |
| - mt76_connac_pm_unref(&dev->mphy, &dev->pm); |
| + tasklet_schedule(&dev->mt76.irq_tasklet); |
| |
| - return 0; |
| + return IRQ_HANDLED; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_irq_handler); |
| |
| -static int mt7921_poll_rx(struct napi_struct *napi, int budget) |
| +void mt792x_irq_tasklet(unsigned long data) |
| { |
| - struct mt7921_dev *dev; |
| - int done; |
| + struct mt792x_dev *dev = (struct mt792x_dev *)data; |
| + const struct mt792x_irq_map *irq_map = dev->irq_map; |
| + u32 intr, mask = 0; |
| |
| - dev = container_of(napi->dev, struct mt7921_dev, mt76.napi_dev); |
| + mt76_wr(dev, irq_map->host_irq_enable, 0); |
| |
| - if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { |
| - napi_complete(napi); |
| - queue_work(dev->mt76.wq, &dev->pm.wake_work); |
| - return 0; |
| + intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA); |
| + intr &= dev->mt76.mmio.irqmask; |
| + mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr); |
| + |
| + trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); |
| + |
| + mask |= intr & (irq_map->rx.data_complete_mask | |
| + irq_map->rx.wm_complete_mask | |
| + irq_map->rx.wm2_complete_mask); |
| + if (intr & dev->irq_map->tx.mcu_complete_mask) |
| + mask |= dev->irq_map->tx.mcu_complete_mask; |
| + |
| + if (intr & MT_INT_MCU_CMD) { |
| + u32 intr_sw; |
| + |
| + intr_sw = mt76_rr(dev, MT_MCU_CMD); |
| + /* ack MCU2HOST_SW_INT_STA */ |
| + mt76_wr(dev, MT_MCU_CMD, intr_sw); |
| + if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) { |
| + mask |= irq_map->rx.data_complete_mask; |
| + intr |= irq_map->rx.data_complete_mask; |
| + } |
| } |
| - done = mt76_dma_rx_poll(napi, budget); |
| - mt76_connac_pm_unref(&dev->mphy, &dev->pm); |
| |
| - return done; |
| + mt76_set_irq_mask(&dev->mt76, irq_map->host_irq_enable, mask, 0); |
| + |
| + if (intr & dev->irq_map->tx.all_complete_mask) |
| + napi_schedule(&dev->mt76.tx_napi); |
| + |
| + if (intr & irq_map->rx.wm_complete_mask) |
| + napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); |
| + |
| + if (intr & irq_map->rx.wm2_complete_mask) |
| + napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); |
| + |
| + if (intr & irq_map->rx.data_complete_mask) |
| + napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_irq_tasklet); |
| |
| -static void mt7921_dma_prefetch(struct mt7921_dev *dev) |
| +void mt792x_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) |
| { |
| -#define PREFETCH(base, depth) ((base) << 16 | (depth)) |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| + const struct mt792x_irq_map *irq_map = dev->irq_map; |
| + |
| + if (q == MT_RXQ_MAIN) |
| + mt76_connac_irq_enable(mdev, irq_map->rx.data_complete_mask); |
| + else if (q == MT_RXQ_MCU_WA) |
| + mt76_connac_irq_enable(mdev, irq_map->rx.wm2_complete_mask); |
| + else |
| + mt76_connac_irq_enable(mdev, irq_map->rx.wm_complete_mask); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_rx_poll_complete); |
| |
| +#define PREFETCH(base, depth) ((base) << 16 | (depth)) |
| +static void mt792x_dma_prefetch(struct mt792x_dev *dev) |
| +{ |
| mt76_wr(dev, MT_WFDMA0_RX_RING0_EXT_CTRL, PREFETCH(0x0, 0x4)); |
| mt76_wr(dev, MT_WFDMA0_RX_RING2_EXT_CTRL, PREFETCH(0x40, 0x4)); |
| mt76_wr(dev, MT_WFDMA0_RX_RING3_EXT_CTRL, PREFETCH(0x80, 0x4)); |
| @@ -64,44 +105,10 @@ static void mt7921_dma_prefetch(struct mt7921_dev *dev) |
| mt76_wr(dev, MT_WFDMA0_TX_RING17_EXT_CTRL, PREFETCH(0x380, 0x4)); |
| } |
| |
| -static int mt7921_dma_disable(struct mt7921_dev *dev, bool force) |
| -{ |
| - /* disable WFDMA0 */ |
| - mt76_clear(dev, MT_WFDMA0_GLO_CFG, |
| - MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN | |
| - MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | |
| - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | |
| - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | |
| - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); |
| - |
| - if (!mt76_poll_msec_tick(dev, MT_WFDMA0_GLO_CFG, |
| - MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | |
| - MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 100, 1)) |
| - return -ETIMEDOUT; |
| - |
| - /* disable dmashdl */ |
| - mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0, |
| - MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); |
| - mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); |
| - |
| - if (force) { |
| - /* reset */ |
| - mt76_clear(dev, MT_WFDMA0_RST, |
| - MT_WFDMA0_RST_DMASHDL_ALL_RST | |
| - MT_WFDMA0_RST_LOGIC_RST); |
| - |
| - mt76_set(dev, MT_WFDMA0_RST, |
| - MT_WFDMA0_RST_DMASHDL_ALL_RST | |
| - MT_WFDMA0_RST_LOGIC_RST); |
| - } |
| - |
| - return 0; |
| -} |
| - |
| -static int mt7921_dma_enable(struct mt7921_dev *dev) |
| +int mt792x_dma_enable(struct mt792x_dev *dev) |
| { |
| /* configure perfetch settings */ |
| - mt7921_dma_prefetch(dev); |
| + mt792x_dma_prefetch(dev); |
| |
| /* reset dma idx */ |
| mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); |
| @@ -124,18 +131,23 @@ static int mt7921_dma_enable(struct mt7921_dev *dev) |
| |
| /* enable interrupts for TX/RX rings */ |
| mt76_connac_irq_enable(&dev->mt76, |
| - MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | |
| + dev->irq_map->tx.all_complete_mask | |
| + dev->irq_map->rx.data_complete_mask | |
| + dev->irq_map->rx.wm2_complete_mask | |
| + dev->irq_map->rx.wm_complete_mask | |
| MT_INT_MCU_CMD); |
| mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE); |
| |
| return 0; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_dma_enable); |
| |
| -static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) |
| +static int |
| +mt792x_dma_reset(struct mt792x_dev *dev, bool force) |
| { |
| int i, err; |
| |
| - err = mt7921_dma_disable(dev, force); |
| + err = mt792x_dma_disable(dev, force); |
| if (err) |
| return err; |
| |
| @@ -151,23 +163,10 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) |
| |
| mt76_tx_status_check(&dev->mt76, true); |
| |
| - return mt7921_dma_enable(dev); |
| -} |
| - |
| -int mt7921_wfsys_reset(struct mt7921_dev *dev) |
| -{ |
| - mt76_clear(dev, MT_WFSYS_SW_RST_B, WFSYS_SW_RST_B); |
| - msleep(50); |
| - mt76_set(dev, MT_WFSYS_SW_RST_B, WFSYS_SW_RST_B); |
| - |
| - if (!__mt76_poll_msec(&dev->mt76, MT_WFSYS_SW_RST_B, |
| - WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500)) |
| - return -ETIMEDOUT; |
| - |
| - return 0; |
| + return mt792x_dma_enable(dev); |
| } |
| |
| -int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force) |
| +int mt792x_wpdma_reset(struct mt792x_dev *dev, bool force) |
| { |
| int i, err; |
| |
| @@ -182,11 +181,11 @@ int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force) |
| mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]); |
| |
| if (force) { |
| - err = mt7921_wfsys_reset(dev); |
| + err = mt792x_wfsys_reset(dev); |
| if (err) |
| return err; |
| } |
| - err = mt7921_dma_reset(dev, force); |
| + err = mt792x_dma_reset(dev, force); |
| if (err) |
| return err; |
| |
| @@ -195,19 +194,20 @@ int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force) |
| |
| return 0; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_wpdma_reset); |
| |
| -int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev) |
| +int mt792x_wpdma_reinit_cond(struct mt792x_dev *dev) |
| { |
| struct mt76_connac_pm *pm = &dev->pm; |
| int err; |
| |
| /* check if the wpdma must be reinitialized */ |
| - if (mt7921_dma_need_reinit(dev)) { |
| + if (mt792x_dma_need_reinit(dev)) { |
| /* disable interrutpts */ |
| - mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); |
| + mt76_wr(dev, dev->irq_map->host_irq_enable, 0); |
| mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0); |
| |
| - err = mt7921_wpdma_reset(dev, false); |
| + err = mt792x_wpdma_reset(dev, false); |
| if (err) { |
| dev_err(dev->mt76.dev, "wpdma reset failed\n"); |
| return err; |
| @@ -220,73 +220,44 @@ int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev) |
| |
| return 0; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_wpdma_reinit_cond); |
| |
| -int mt7921_dma_init(struct mt7921_dev *dev) |
| +int mt792x_dma_disable(struct mt792x_dev *dev, bool force) |
| { |
| - int ret; |
| - |
| - mt76_dma_attach(&dev->mt76); |
| - |
| - ret = mt7921_dma_disable(dev, true); |
| - if (ret) |
| - return ret; |
| - |
| - /* init tx queue */ |
| - ret = mt76_connac_init_tx_queues(dev->phy.mt76, MT7921_TXQ_BAND0, |
| - MT7921_TX_RING_SIZE, |
| - MT_TX_RING_BASE, 0); |
| - if (ret) |
| - return ret; |
| - |
| - mt76_wr(dev, MT_WFDMA0_TX_RING0_EXT_CTRL, 0x4); |
| - |
| - /* command to WM */ |
| - ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7921_TXQ_MCU_WM, |
| - MT7921_TX_MCU_RING_SIZE, MT_TX_RING_BASE); |
| - if (ret) |
| - return ret; |
| - |
| - /* firmware download */ |
| - ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7921_TXQ_FWDL, |
| - MT7921_TX_FWDL_RING_SIZE, MT_TX_RING_BASE); |
| - if (ret) |
| - return ret; |
| - |
| - /* event from WM before firmware download */ |
| - ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU], |
| - MT7921_RXQ_MCU_WM, |
| - MT7921_RX_MCU_RING_SIZE, |
| - MT_RX_BUF_SIZE, MT_RX_EVENT_RING_BASE); |
| - if (ret) |
| - return ret; |
| - |
| - /* Change mcu queue after firmware download */ |
| - ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU_WA], |
| - MT7921_RXQ_MCU_WM, |
| - MT7921_RX_MCU_RING_SIZE, |
| - MT_RX_BUF_SIZE, MT_WFDMA0(0x540)); |
| - if (ret) |
| - return ret; |
| - |
| - /* rx data */ |
| - ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], |
| - MT7921_RXQ_BAND0, MT7921_RX_RING_SIZE, |
| - MT_RX_BUF_SIZE, MT_RX_DATA_RING_BASE); |
| - if (ret) |
| - return ret; |
| - |
| - ret = mt76_init_queues(dev, mt7921_poll_rx); |
| - if (ret < 0) |
| - return ret; |
| - |
| - netif_napi_add_tx(&dev->mt76.tx_napi_dev, &dev->mt76.tx_napi, |
| - mt7921_poll_tx); |
| - napi_enable(&dev->mt76.tx_napi); |
| - |
| - return mt7921_dma_enable(dev); |
| + /* disable WFDMA0 */ |
| + mt76_clear(dev, MT_WFDMA0_GLO_CFG, |
| + MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN | |
| + MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | |
| + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | |
| + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | |
| + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); |
| + |
| + if (!mt76_poll_msec_tick(dev, MT_WFDMA0_GLO_CFG, |
| + MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | |
| + MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 100, 1)) |
| + return -ETIMEDOUT; |
| + |
| + /* disable dmashdl */ |
| + mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0, |
| + MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); |
| + mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); |
| + |
| + if (force) { |
| + /* reset */ |
| + mt76_clear(dev, MT_WFDMA0_RST, |
| + MT_WFDMA0_RST_DMASHDL_ALL_RST | |
| + MT_WFDMA0_RST_LOGIC_RST); |
| + |
| + mt76_set(dev, MT_WFDMA0_RST, |
| + MT_WFDMA0_RST_DMASHDL_ALL_RST | |
| + MT_WFDMA0_RST_LOGIC_RST); |
| + } |
| + |
| + return 0; |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_dma_disable); |
| |
| -void mt7921_dma_cleanup(struct mt7921_dev *dev) |
| +void mt792x_dma_cleanup(struct mt792x_dev *dev) |
| { |
| /* disable */ |
| mt76_clear(dev, MT_WFDMA0_GLO_CFG, |
| @@ -312,3 +283,62 @@ void mt7921_dma_cleanup(struct mt7921_dev *dev) |
| |
| mt76_dma_cleanup(&dev->mt76); |
| } |
| +EXPORT_SYMBOL_GPL(mt792x_dma_cleanup); |
| + |
| +int mt792x_poll_tx(struct napi_struct *napi, int budget) |
| +{ |
| + struct mt792x_dev *dev; |
| + |
| + dev = container_of(napi, struct mt792x_dev, mt76.tx_napi); |
| + |
| + if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { |
| + napi_complete(napi); |
| + queue_work(dev->mt76.wq, &dev->pm.wake_work); |
| + return 0; |
| + } |
| + |
| + mt76_connac_tx_cleanup(&dev->mt76); |
| + if (napi_complete(napi)) |
| + mt76_connac_irq_enable(&dev->mt76, |
| + dev->irq_map->tx.all_complete_mask); |
| + mt76_connac_pm_unref(&dev->mphy, &dev->pm); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_poll_tx); |
| + |
| +int mt792x_poll_rx(struct napi_struct *napi, int budget) |
| +{ |
| + struct mt792x_dev *dev; |
| + int done; |
| + |
| + dev = container_of(napi->dev, struct mt792x_dev, mt76.napi_dev); |
| + |
| + if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { |
| + napi_complete(napi); |
| + queue_work(dev->mt76.wq, &dev->pm.wake_work); |
| + return 0; |
| + } |
| + done = mt76_dma_rx_poll(napi, budget); |
| + mt76_connac_pm_unref(&dev->mphy, &dev->pm); |
| + |
| + return done; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_poll_rx); |
| + |
| +int mt792x_wfsys_reset(struct mt792x_dev *dev) |
| +{ |
| + u32 addr = is_mt7921(&dev->mt76) ? 0x18000140 : 0x7c000140; |
| + |
| + mt76_clear(dev, addr, WFSYS_SW_RST_B); |
| + msleep(50); |
| + mt76_set(dev, addr, WFSYS_SW_RST_B); |
| + |
| + if (!__mt76_poll_msec(&dev->mt76, addr, WFSYS_SW_INIT_DONE, |
| + WFSYS_SW_INIT_DONE, 500)) |
| + return -ETIMEDOUT; |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_wfsys_reset); |
| + |
| diff --git a/mt792x_mac.c b/mt792x_mac.c |
| new file mode 100644 |
| index 00000000..5d1f8229 |
| --- /dev/null |
| +++ b/mt792x_mac.c |
| @@ -0,0 +1,385 @@ |
| +// SPDX-License-Identifier: ISC |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| + |
| +#include <linux/module.h> |
| + |
| +#include "mt792x.h" |
| +#include "mt792x_regs.h" |
| + |
| +void mt792x_mac_work(struct work_struct *work) |
| +{ |
| + struct mt792x_phy *phy; |
| + struct mt76_phy *mphy; |
| + |
| + mphy = (struct mt76_phy *)container_of(work, struct mt76_phy, |
| + mac_work.work); |
| + phy = mphy->priv; |
| + |
| + mt792x_mutex_acquire(phy->dev); |
| + |
| + mt76_update_survey(mphy); |
| + if (++mphy->mac_work_count == 2) { |
| + mphy->mac_work_count = 0; |
| + |
| + mt792x_mac_update_mib_stats(phy); |
| + } |
| + |
| + mt792x_mutex_release(phy->dev); |
| + |
| + mt76_tx_status_check(mphy->dev, false); |
| + ieee80211_queue_delayed_work(phy->mt76->hw, &mphy->mac_work, |
| + MT792x_WATCHDOG_TIME); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mac_work); |
| + |
| +void mt792x_mac_set_timeing(struct mt792x_phy *phy) |
| +{ |
| + s16 coverage_class = phy->coverage_class; |
| + struct mt792x_dev *dev = phy->dev; |
| + u32 val, reg_offset; |
| + u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) | |
| + FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); |
| + u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) | |
| + FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28); |
| + bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; |
| + int sifs = is_2ghz ? 10 : 16, offset; |
| + |
| + if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) |
| + return; |
| + |
| + mt76_set(dev, MT_ARB_SCR(0), |
| + MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); |
| + udelay(1); |
| + |
| + offset = 3 * coverage_class; |
| + reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) | |
| + FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset); |
| + |
| + mt76_wr(dev, MT_TMAC_CDTR(0), cck + reg_offset); |
| + mt76_wr(dev, MT_TMAC_ODTR(0), ofdm + reg_offset); |
| + mt76_wr(dev, MT_TMAC_ICR0(0), |
| + FIELD_PREP(MT_IFS_EIFS, 360) | |
| + FIELD_PREP(MT_IFS_RIFS, 2) | |
| + FIELD_PREP(MT_IFS_SIFS, sifs) | |
| + FIELD_PREP(MT_IFS_SLOT, phy->slottime)); |
| + |
| + if (phy->slottime < 20 || !is_2ghz) |
| + val = MT792x_CFEND_RATE_DEFAULT; |
| + else |
| + val = MT792x_CFEND_RATE_11B; |
| + |
| + mt76_rmw_field(dev, MT_AGG_ACR0(0), MT_AGG_ACR_CFEND_RATE, val); |
| + mt76_clear(dev, MT_ARB_SCR(0), |
| + MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mac_set_timeing); |
| + |
| +void mt792x_mac_update_mib_stats(struct mt792x_phy *phy) |
| +{ |
| + struct mt76_mib_stats *mib = &phy->mib; |
| + struct mt792x_dev *dev = phy->dev; |
| + int i, aggr0 = 0, aggr1; |
| + u32 val; |
| + |
| + mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0), |
| + MT_MIB_SDR3_FCS_ERR_MASK); |
| + mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0), |
| + MT_MIB_ACK_FAIL_COUNT_MASK); |
| + mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0), |
| + MT_MIB_BA_FAIL_COUNT_MASK); |
| + mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0), |
| + MT_MIB_RTS_COUNT_MASK); |
| + mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0), |
| + MT_MIB_RTS_FAIL_COUNT_MASK); |
| + |
| + mib->tx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR12(0)); |
| + mib->tx_mpdu_attempts_cnt += mt76_rr(dev, MT_MIB_SDR14(0)); |
| + mib->tx_mpdu_success_cnt += mt76_rr(dev, MT_MIB_SDR15(0)); |
| + |
| + val = mt76_rr(dev, MT_MIB_SDR32(0)); |
| + mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR9_EBF_CNT_MASK, val); |
| + mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR9_IBF_CNT_MASK, val); |
| + |
| + val = mt76_rr(dev, MT_ETBF_TX_APP_CNT(0)); |
| + mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, val); |
| + mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, val); |
| + |
| + val = mt76_rr(dev, MT_ETBF_RX_FB_CNT(0)); |
| + mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, val); |
| + mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, val); |
| + mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, val); |
| + mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, val); |
| + |
| + mib->rx_mpdu_cnt += mt76_rr(dev, MT_MIB_SDR5(0)); |
| + mib->rx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR22(0)); |
| + mib->rx_ampdu_bytes_cnt += mt76_rr(dev, MT_MIB_SDR23(0)); |
| + mib->rx_ba_cnt += mt76_rr(dev, MT_MIB_SDR31(0)); |
| + |
| + for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { |
| + val = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i)); |
| + mib->tx_amsdu[i] += val; |
| + mib->tx_amsdu_cnt += val; |
| + } |
| + |
| + for (i = 0, aggr1 = aggr0 + 8; i < 4; i++) { |
| + u32 val2; |
| + |
| + val = mt76_rr(dev, MT_TX_AGG_CNT(0, i)); |
| + val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i)); |
| + |
| + phy->mt76->aggr_stats[aggr0++] += val & 0xffff; |
| + phy->mt76->aggr_stats[aggr0++] += val >> 16; |
| + phy->mt76->aggr_stats[aggr1++] += val2 & 0xffff; |
| + phy->mt76->aggr_stats[aggr1++] += val2 >> 16; |
| + } |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mac_update_mib_stats); |
| + |
| +struct mt76_wcid *mt792x_rx_get_wcid(struct mt792x_dev *dev, u16 idx, |
| + bool unicast) |
| +{ |
| + struct mt792x_sta *sta; |
| + struct mt76_wcid *wcid; |
| + |
| + if (idx >= ARRAY_SIZE(dev->mt76.wcid)) |
| + return NULL; |
| + |
| + wcid = rcu_dereference(dev->mt76.wcid[idx]); |
| + if (unicast || !wcid) |
| + return wcid; |
| + |
| + if (!wcid->sta) |
| + return NULL; |
| + |
| + sta = container_of(wcid, struct mt792x_sta, wcid); |
| + if (!sta->vif) |
| + return NULL; |
| + |
| + return &sta->vif->sta.wcid; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_rx_get_wcid); |
| + |
| +static void |
| +mt792x_mac_rssi_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| +{ |
| + struct sk_buff *skb = priv; |
| + struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; |
| + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; |
| + struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb); |
| + |
| + if (status->signal > 0) |
| + return; |
| + |
| + if (!ether_addr_equal(vif->addr, hdr->addr1)) |
| + return; |
| + |
| + ewma_rssi_add(&mvif->rssi, -status->signal); |
| +} |
| + |
| +void mt792x_mac_assoc_rssi(struct mt792x_dev *dev, struct sk_buff *skb) |
| +{ |
| + struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb); |
| + |
| + if (!ieee80211_is_assoc_resp(hdr->frame_control) && |
| + !ieee80211_is_auth(hdr->frame_control)) |
| + return; |
| + |
| + ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev), |
| + IEEE80211_IFACE_ITER_RESUME_ALL, |
| + mt792x_mac_rssi_iter, skb); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mac_assoc_rssi); |
| + |
| +void mt792x_mac_reset_counters(struct mt792x_phy *phy) |
| +{ |
| + struct mt792x_dev *dev = phy->dev; |
| + int i; |
| + |
| + for (i = 0; i < 4; i++) { |
| + mt76_rr(dev, MT_TX_AGG_CNT(0, i)); |
| + mt76_rr(dev, MT_TX_AGG_CNT2(0, i)); |
| + } |
| + |
| + dev->mt76.phy.survey_time = ktime_get_boottime(); |
| + memset(phy->mt76->aggr_stats, 0, sizeof(phy->mt76->aggr_stats)); |
| + |
| + /* reset airtime counters */ |
| + mt76_rr(dev, MT_MIB_SDR9(0)); |
| + mt76_rr(dev, MT_MIB_SDR36(0)); |
| + mt76_rr(dev, MT_MIB_SDR37(0)); |
| + |
| + mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); |
| + mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mac_reset_counters); |
| + |
| +static u8 |
| +mt792x_phy_get_nf(struct mt792x_phy *phy, int idx) |
| +{ |
| + return 0; |
| +} |
| + |
| +static void |
| +mt792x_phy_update_channel(struct mt76_phy *mphy, int idx) |
| +{ |
| + struct mt792x_dev *dev = container_of(mphy->dev, struct mt792x_dev, mt76); |
| + struct mt792x_phy *phy = (struct mt792x_phy *)mphy->priv; |
| + struct mt76_channel_state *state; |
| + u64 busy_time, tx_time, rx_time, obss_time; |
| + int nf; |
| + |
| + busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx), |
| + MT_MIB_SDR9_BUSY_MASK); |
| + tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx), |
| + MT_MIB_SDR36_TXTIME_MASK); |
| + rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx), |
| + MT_MIB_SDR37_RXTIME_MASK); |
| + obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx), |
| + MT_MIB_OBSSTIME_MASK); |
| + |
| + nf = mt792x_phy_get_nf(phy, idx); |
| + if (!phy->noise) |
| + phy->noise = nf << 4; |
| + else if (nf) |
| + phy->noise += nf - (phy->noise >> 4); |
| + |
| + state = mphy->chan_state; |
| + state->cc_busy += busy_time; |
| + state->cc_tx += tx_time; |
| + state->cc_rx += rx_time + obss_time; |
| + state->cc_bss_rx += rx_time; |
| + state->noise = -(phy->noise >> 4); |
| +} |
| + |
| +void mt792x_update_channel(struct mt76_phy *mphy) |
| +{ |
| + struct mt792x_dev *dev = container_of(mphy->dev, struct mt792x_dev, mt76); |
| + |
| + if (mt76_connac_pm_wake(mphy, &dev->pm)) |
| + return; |
| + |
| + mt792x_phy_update_channel(mphy, 0); |
| + /* reset obss airtime */ |
| + mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); |
| + mt76_connac_power_save_sched(mphy, &dev->pm); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_update_channel); |
| + |
| +void mt792x_reset(struct mt76_dev *mdev) |
| +{ |
| + struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); |
| + struct mt76_connac_pm *pm = &dev->pm; |
| + |
| + if (!dev->hw_init_done) |
| + return; |
| + |
| + if (dev->hw_full_reset) |
| + return; |
| + |
| + if (pm->suspended) |
| + return; |
| + |
| + queue_work(dev->mt76.wq, &dev->reset_work); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_reset); |
| + |
| +void mt792x_mac_init_band(struct mt792x_dev *dev, u8 band) |
| +{ |
| + u32 mask, set; |
| + |
| + mt76_rmw_field(dev, MT_TMAC_CTCR0(band), |
| + MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); |
| + mt76_set(dev, MT_TMAC_CTCR0(band), |
| + MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | |
| + MT_TMAC_CTCR0_INS_DDLMT_EN); |
| + |
| + mt76_set(dev, MT_WF_RMAC_MIB_TIME0(band), MT_WF_RMAC_MIB_RXTIME_EN); |
| + mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(band), MT_WF_RMAC_MIB_RXTIME_EN); |
| + |
| + /* enable MIB tx-rx time reporting */ |
| + mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_TXDUR_EN); |
| + mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_RXDUR_EN); |
| + |
| + mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 1536); |
| + /* disable rx rate report by default due to hw issues */ |
| + mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN); |
| + |
| + /* filter out non-resp frames and get instantaneous signal reporting */ |
| + mask = MT_WTBLOFF_TOP_RSCR_RCPI_MODE | MT_WTBLOFF_TOP_RSCR_RCPI_PARAM; |
| + set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) | |
| + FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3); |
| + mt76_rmw(dev, MT_WTBLOFF_TOP_RSCR(band), mask, set); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_mac_init_band); |
| + |
| +void mt792x_pm_wake_work(struct work_struct *work) |
| +{ |
| + struct mt792x_dev *dev; |
| + struct mt76_phy *mphy; |
| + |
| + dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev, |
| + pm.wake_work); |
| + mphy = dev->phy.mt76; |
| + |
| + if (!mt792x_mcu_drv_pmctrl(dev)) { |
| + struct mt76_dev *mdev = &dev->mt76; |
| + int i; |
| + |
| + if (mt76_is_sdio(mdev)) { |
| + mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); |
| + mt76_worker_schedule(&mdev->sdio.txrx_worker); |
| + } else { |
| + local_bh_disable(); |
| + mt76_for_each_q_rx(mdev, i) |
| + napi_schedule(&mdev->napi[i]); |
| + local_bh_enable(); |
| + mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); |
| + mt76_connac_tx_cleanup(mdev); |
| + } |
| + if (test_bit(MT76_STATE_RUNNING, &mphy->state)) |
| + ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work, |
| + MT792x_WATCHDOG_TIME); |
| + } |
| + |
| + ieee80211_wake_queues(mphy->hw); |
| + wake_up(&dev->pm.wait); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_pm_wake_work); |
| + |
| +void mt792x_pm_power_save_work(struct work_struct *work) |
| +{ |
| + struct mt792x_dev *dev; |
| + unsigned long delta; |
| + struct mt76_phy *mphy; |
| + |
| + dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev, |
| + pm.ps_work.work); |
| + mphy = dev->phy.mt76; |
| + |
| + delta = dev->pm.idle_timeout; |
| + if (test_bit(MT76_HW_SCANNING, &mphy->state) || |
| + test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) || |
| + dev->fw_assert) |
| + goto out; |
| + |
| + if (mutex_is_locked(&dev->mt76.mutex)) |
| + /* if mt76 mutex is held we should not put the device |
| + * to sleep since we are currently accessing device |
| + * register map. We need to wait for the next power_save |
| + * trigger. |
| + */ |
| + goto out; |
| + |
| + if (time_is_after_jiffies(dev->pm.last_activity + delta)) { |
| + delta = dev->pm.last_activity + delta - jiffies; |
| + goto out; |
| + } |
| + |
| + if (!mt792x_mcu_fw_pmctrl(dev)) { |
| + cancel_delayed_work_sync(&mphy->mac_work); |
| + return; |
| + } |
| +out: |
| + queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792x_pm_power_save_work); |
| diff --git a/mt792x_regs.h b/mt792x_regs.h |
| new file mode 100644 |
| index 00000000..a99af23e |
| --- /dev/null |
| +++ b/mt792x_regs.h |
| @@ -0,0 +1,479 @@ |
| +/* SPDX-License-Identifier: ISC */ |
| +/* Copyright (C) 2023 MediaTek Inc. */ |
| + |
| +#ifndef __MT792X_REGS_H |
| +#define __MT792X_REGS_H |
| + |
| +/* MCU WFDMA1 */ |
| +#define MT_MCU_WFDMA1_BASE 0x3000 |
| +#define MT_MCU_WFDMA1(ofs) (MT_MCU_WFDMA1_BASE + (ofs)) |
| + |
| +#define MT_MCU_INT_EVENT MT_MCU_WFDMA1(0x108) |
| +#define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0) |
| +#define MT_MCU_INT_EVENT_DMA_INIT BIT(1) |
| +#define MT_MCU_INT_EVENT_SER_TRIGGER BIT(2) |
| +#define MT_MCU_INT_EVENT_RESET_DONE BIT(3) |
| + |
| +#define MT_PLE_BASE 0x820c0000 |
| +#define MT_PLE(ofs) (MT_PLE_BASE + (ofs)) |
| + |
| +#define MT_PLE_FL_Q0_CTRL MT_PLE(0x3e0) |
| +#define MT_PLE_FL_Q1_CTRL MT_PLE(0x3e4) |
| +#define MT_PLE_FL_Q2_CTRL MT_PLE(0x3e8) |
| +#define MT_PLE_FL_Q3_CTRL MT_PLE(0x3ec) |
| + |
| +#define MT_PLE_AC_QEMPTY(_n) MT_PLE(0x500 + 0x40 * (_n)) |
| +#define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2)) |
| + |
| +/* TMAC: band 0(0x21000), band 1(0xa1000) */ |
| +#define MT_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000) |
| +#define MT_WF_TMAC(_band, ofs) (MT_WF_TMAC_BASE(_band) + (ofs)) |
| + |
| +#define MT_TMAC_TCR0(_band) MT_WF_TMAC(_band, 0) |
| +#define MT_TMAC_TCR0_TBTT_STOP_CTRL BIT(25) |
| + |
| +#define MT_TMAC_CDTR(_band) MT_WF_TMAC(_band, 0x090) |
| +#define MT_TMAC_ODTR(_band) MT_WF_TMAC(_band, 0x094) |
| +#define MT_TIMEOUT_VAL_PLCP GENMASK(15, 0) |
| +#define MT_TIMEOUT_VAL_CCA GENMASK(31, 16) |
| + |
| +#define MT_TMAC_ICR0(_band) MT_WF_TMAC(_band, 0x0a4) |
| +#define MT_IFS_EIFS GENMASK(8, 0) |
| +#define MT_IFS_RIFS GENMASK(14, 10) |
| +#define MT_IFS_SIFS GENMASK(22, 16) |
| +#define MT_IFS_SLOT GENMASK(30, 24) |
| + |
| +#define MT_TMAC_CTCR0(_band) MT_WF_TMAC(_band, 0x0f4) |
| +#define MT_TMAC_CTCR0_INS_DDLMT_REFTIME GENMASK(5, 0) |
| +#define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17) |
| +#define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18) |
| + |
| +#define MT_TMAC_TRCR0(_band) MT_WF_TMAC(_band, 0x09c) |
| +#define MT_TMAC_TFCR0(_band) MT_WF_TMAC(_band, 0x1e0) |
| + |
| +#define MT_WF_DMA_BASE(_band) ((_band) ? 0x820f7000 : 0x820e7000) |
| +#define MT_WF_DMA(_band, ofs) (MT_WF_DMA_BASE(_band) + (ofs)) |
| + |
| +#define MT_DMA_DCR0(_band) MT_WF_DMA(_band, 0x000) |
| +#define MT_DMA_DCR0_MAX_RX_LEN GENMASK(15, 3) |
| +#define MT_DMA_DCR0_RXD_G5_EN BIT(23) |
| + |
| +/* WTBLOFF TOP: band 0(0x820e9000),band 1(0x820f9000) */ |
| +#define MT_WTBLOFF_TOP_BASE(_band) ((_band) ? 0x820f9000 : 0x820e9000) |
| +#define MT_WTBLOFF_TOP(_band, ofs) (MT_WTBLOFF_TOP_BASE(_band) + (ofs)) |
| + |
| +#define MT_WTBLOFF_TOP_RSCR(_band) MT_WTBLOFF_TOP(_band, 0x008) |
| +#define MT_WTBLOFF_TOP_RSCR_RCPI_MODE GENMASK(31, 30) |
| +#define MT_WTBLOFF_TOP_RSCR_RCPI_PARAM GENMASK(25, 24) |
| + |
| +/* LPON: band 0(0x24200), band 1(0xa4200) */ |
| +#define MT_WF_LPON_BASE(_band) ((_band) ? 0x820fb000 : 0x820eb000) |
| +#define MT_WF_LPON(_band, ofs) (MT_WF_LPON_BASE(_band) + (ofs)) |
| + |
| +#define MT_LPON_UTTR0(_band) MT_WF_LPON(_band, 0x080) |
| +#define MT_LPON_UTTR1(_band) MT_WF_LPON(_band, 0x084) |
| + |
| +#define MT_LPON_TCR(_band, n) MT_WF_LPON(_band, 0x0a8 + (n) * 4) |
| +#define MT_LPON_TCR_SW_MODE GENMASK(1, 0) |
| +#define MT_LPON_TCR_SW_WRITE BIT(0) |
| + |
| +/* ETBF: band 0(0x24000), band 1(0xa4000) */ |
| +#define MT_WF_ETBF_BASE(_band) ((_band) ? 0x820fa000 : 0x820ea000) |
| +#define MT_WF_ETBF(_band, ofs) (MT_WF_ETBF_BASE(_band) + (ofs)) |
| + |
| +#define MT_ETBF_TX_APP_CNT(_band) MT_WF_ETBF(_band, 0x150) |
| +#define MT_ETBF_TX_IBF_CNT GENMASK(31, 16) |
| +#define MT_ETBF_TX_EBF_CNT GENMASK(15, 0) |
| + |
| +#define MT_ETBF_RX_FB_CNT(_band) MT_WF_ETBF(_band, 0x158) |
| +#define MT_ETBF_RX_FB_ALL GENMASK(31, 24) |
| +#define MT_ETBF_RX_FB_HE GENMASK(23, 16) |
| +#define MT_ETBF_RX_FB_VHT GENMASK(15, 8) |
| +#define MT_ETBF_RX_FB_HT GENMASK(7, 0) |
| + |
| +/* MIB: band 0(0x24800), band 1(0xa4800) */ |
| +#define MT_WF_MIB_BASE(_band) ((_band) ? 0x820fd000 : 0x820ed000) |
| +#define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs)) |
| + |
| +#define MT_MIB_SCR1(_band) MT_WF_MIB(_band, 0x004) |
| +#define MT_MIB_TXDUR_EN BIT(8) |
| +#define MT_MIB_RXDUR_EN BIT(9) |
| + |
| +#define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x698) |
| +#define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(31, 16) |
| + |
| +#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, 0x780) |
| + |
| +#define MT_MIB_SDR9(_band) MT_WF_MIB(_band, 0x02c) |
| +#define MT_MIB_SDR9_BUSY_MASK GENMASK(23, 0) |
| + |
| +#define MT_MIB_SDR12(_band) MT_WF_MIB(_band, 0x558) |
| +#define MT_MIB_SDR14(_band) MT_WF_MIB(_band, 0x564) |
| +#define MT_MIB_SDR15(_band) MT_WF_MIB(_band, 0x568) |
| + |
| +#define MT_MIB_SDR16(_band) MT_WF_MIB(_band, 0x048) |
| +#define MT_MIB_SDR16_BUSY_MASK GENMASK(23, 0) |
| + |
| +#define MT_MIB_SDR22(_band) MT_WF_MIB(_band, 0x770) |
| +#define MT_MIB_SDR23(_band) MT_WF_MIB(_band, 0x774) |
| +#define MT_MIB_SDR31(_band) MT_WF_MIB(_band, 0x55c) |
| + |
| +#define MT_MIB_SDR32(_band) MT_WF_MIB(_band, 0x7a8) |
| +#define MT_MIB_SDR9_IBF_CNT_MASK GENMASK(31, 16) |
| +#define MT_MIB_SDR9_EBF_CNT_MASK GENMASK(15, 0) |
| + |
| +#define MT_MIB_SDR34(_band) MT_WF_MIB(_band, 0x090) |
| +#define MT_MIB_MU_BF_TX_CNT GENMASK(15, 0) |
| + |
| +#define MT_MIB_SDR36(_band) MT_WF_MIB(_band, 0x054) |
| +#define MT_MIB_SDR36_TXTIME_MASK GENMASK(23, 0) |
| +#define MT_MIB_SDR37(_band) MT_WF_MIB(_band, 0x058) |
| +#define MT_MIB_SDR37_RXTIME_MASK GENMASK(23, 0) |
| + |
| +#define MT_MIB_DR8(_band) MT_WF_MIB(_band, 0x0c0) |
| +#define MT_MIB_DR9(_band) MT_WF_MIB(_band, 0x0c4) |
| +#define MT_MIB_DR11(_band) MT_WF_MIB(_band, 0x0cc) |
| + |
| +#define MT_MIB_MB_SDR0(_band, n) MT_WF_MIB(_band, 0x100 + ((n) << 4)) |
| +#define MT_MIB_RTS_RETRIES_COUNT_MASK GENMASK(31, 16) |
| + |
| +#define MT_MIB_MB_BSDR0(_band) MT_WF_MIB(_band, 0x688) |
| +#define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0) |
| +#define MT_MIB_MB_BSDR1(_band) MT_WF_MIB(_band, 0x690) |
| +#define MT_MIB_RTS_FAIL_COUNT_MASK GENMASK(15, 0) |
| +#define MT_MIB_MB_BSDR2(_band) MT_WF_MIB(_band, 0x518) |
| +#define MT_MIB_BA_FAIL_COUNT_MASK GENMASK(15, 0) |
| +#define MT_MIB_MB_BSDR3(_band) MT_WF_MIB(_band, 0x520) |
| +#define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(15, 0) |
| + |
| +#define MT_MIB_MB_SDR2(_band, n) MT_WF_MIB(_band, 0x108 + ((n) << 4)) |
| +#define MT_MIB_FRAME_RETRIES_COUNT_MASK GENMASK(15, 0) |
| + |
| +#define MT_TX_AGG_CNT(_band, n) MT_WF_MIB(_band, 0x7dc + ((n) << 2)) |
| +#define MT_TX_AGG_CNT2(_band, n) MT_WF_MIB(_band, 0x7ec + ((n) << 2)) |
| +#define MT_MIB_ARNG(_band, n) MT_WF_MIB(_band, 0x0b0 + ((n) << 2)) |
| +#define MT_MIB_ARNCR_RANGE(val, n) (((val) >> ((n) << 3)) & GENMASK(7, 0)) |
| + |
| +#define MT_WTBLON_TOP_BASE 0x820d4000 |
| +#define MT_WTBLON_TOP(ofs) (MT_WTBLON_TOP_BASE + (ofs)) |
| + |
| +#define MT_WTBL_UPDATE_BUSY BIT(31) |
| + |
| +#define MT_WTBL_ITCR MT_WTBLON_TOP(0x3b0) |
| +#define MT_WTBL_ITCR_WR BIT(16) |
| +#define MT_WTBL_ITCR_EXEC BIT(31) |
| +#define MT_WTBL_ITDR0 MT_WTBLON_TOP(0x3b8) |
| +#define MT_WTBL_ITDR1 MT_WTBLON_TOP(0x3bc) |
| +#define MT_WTBL_SPE_IDX_SEL BIT(6) |
| + |
| +#define MT_WTBL_BASE 0x820d8000 |
| +#define MT_WTBL_LMAC_ID GENMASK(14, 8) |
| +#define MT_WTBL_LMAC_DW GENMASK(7, 2) |
| +#define MT_WTBL_LMAC_OFFS(_id, _dw) (MT_WTBL_BASE | \ |
| + FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \ |
| + FIELD_PREP(MT_WTBL_LMAC_DW, _dw)) |
| + |
| +/* AGG: band 0(0x20800), band 1(0xa0800) */ |
| +#define MT_WF_AGG_BASE(_band) ((_band) ? 0x820f2000 : 0x820e2000) |
| +#define MT_WF_AGG(_band, ofs) (MT_WF_AGG_BASE(_band) + (ofs)) |
| + |
| +#define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, 0x05c + (_n) * 4) |
| +#define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, 0x06c + (_n) * 4) |
| +#define MT_AGG_PCR0_MM_PROT BIT(0) |
| +#define MT_AGG_PCR0_GF_PROT BIT(1) |
| +#define MT_AGG_PCR0_BW20_PROT BIT(2) |
| +#define MT_AGG_PCR0_BW40_PROT BIT(4) |
| +#define MT_AGG_PCR0_BW80_PROT BIT(6) |
| +#define MT_AGG_PCR0_ERP_PROT GENMASK(12, 8) |
| +#define MT_AGG_PCR0_VHT_PROT BIT(13) |
| +#define MT_AGG_PCR0_PTA_WIN_DIS BIT(15) |
| + |
| +#define MT_AGG_PCR1_RTS0_NUM_THRES GENMASK(31, 23) |
| +#define MT_AGG_PCR1_RTS0_LEN_THRES GENMASK(19, 0) |
| + |
| +#define MT_AGG_ACR0(_band) MT_WF_AGG(_band, 0x084) |
| +#define MT_AGG_ACR_CFEND_RATE GENMASK(13, 0) |
| +#define MT_AGG_ACR_BAR_RATE GENMASK(29, 16) |
| + |
| +#define MT_AGG_MRCR(_band) MT_WF_AGG(_band, 0x098) |
| +#define MT_AGG_MRCR_BAR_CNT_LIMIT GENMASK(15, 12) |
| +#define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6) |
| +#define MT_AGG_MRCR_RTS_FAIL_LIMIT GENMASK(11, 7) |
| +#define MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT GENMASK(28, 24) |
| + |
| +#define MT_AGG_ATCR1(_band) MT_WF_AGG(_band, 0x0f0) |
| +#define MT_AGG_ATCR3(_band) MT_WF_AGG(_band, 0x0f4) |
| + |
| +/* ARB: band 0(0x20c00), band 1(0xa0c00) */ |
| +#define MT_WF_ARB_BASE(_band) ((_band) ? 0x820f3000 : 0x820e3000) |
| +#define MT_WF_ARB(_band, ofs) (MT_WF_ARB_BASE(_band) + (ofs)) |
| + |
| +#define MT_ARB_SCR(_band) MT_WF_ARB(_band, 0x080) |
| +#define MT_ARB_SCR_TX_DISABLE BIT(8) |
| +#define MT_ARB_SCR_RX_DISABLE BIT(9) |
| + |
| +#define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, 0x194 + (_n) * 4) |
| + |
| +/* RMAC: band 0(0x21400), band 1(0xa1400) */ |
| +#define MT_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820e5000) |
| +#define MT_WF_RMAC(_band, ofs) (MT_WF_RMAC_BASE(_band) + (ofs)) |
| + |
| +#define MT_WF_RFCR(_band) MT_WF_RMAC(_band, 0x000) |
| +#define MT_WF_RFCR_DROP_STBC_MULTI BIT(0) |
| +#define MT_WF_RFCR_DROP_FCSFAIL BIT(1) |
| +#define MT_WF_RFCR_DROP_VERSION BIT(3) |
| +#define MT_WF_RFCR_DROP_PROBEREQ BIT(4) |
| +#define MT_WF_RFCR_DROP_MCAST BIT(5) |
| +#define MT_WF_RFCR_DROP_BCAST BIT(6) |
| +#define MT_WF_RFCR_DROP_MCAST_FILTERED BIT(7) |
| +#define MT_WF_RFCR_DROP_A3_MAC BIT(8) |
| +#define MT_WF_RFCR_DROP_A3_BSSID BIT(9) |
| +#define MT_WF_RFCR_DROP_A2_BSSID BIT(10) |
| +#define MT_WF_RFCR_DROP_OTHER_BEACON BIT(11) |
| +#define MT_WF_RFCR_DROP_FRAME_REPORT BIT(12) |
| +#define MT_WF_RFCR_DROP_CTL_RSV BIT(13) |
| +#define MT_WF_RFCR_DROP_CTS BIT(14) |
| +#define MT_WF_RFCR_DROP_RTS BIT(15) |
| +#define MT_WF_RFCR_DROP_DUPLICATE BIT(16) |
| +#define MT_WF_RFCR_DROP_OTHER_BSS BIT(17) |
| +#define MT_WF_RFCR_DROP_OTHER_UC BIT(18) |
| +#define MT_WF_RFCR_DROP_OTHER_TIM BIT(19) |
| +#define MT_WF_RFCR_DROP_NDPA BIT(20) |
| +#define MT_WF_RFCR_DROP_UNWANTED_CTL BIT(21) |
| + |
| +#define MT_WF_RFCR1(_band) MT_WF_RMAC(_band, 0x004) |
| +#define MT_WF_RFCR1_DROP_ACK BIT(4) |
| +#define MT_WF_RFCR1_DROP_BF_POLL BIT(5) |
| +#define MT_WF_RFCR1_DROP_BA BIT(6) |
| +#define MT_WF_RFCR1_DROP_CFEND BIT(7) |
| +#define MT_WF_RFCR1_DROP_CFACK BIT(8) |
| + |
| +#define MT_WF_RMAC_MIB_TIME0(_band) MT_WF_RMAC(_band, 0x03c4) |
| +#define MT_WF_RMAC_MIB_RXTIME_CLR BIT(31) |
| +#define MT_WF_RMAC_MIB_RXTIME_EN BIT(30) |
| + |
| +#define MT_WF_RMAC_MIB_AIRTIME14(_band) MT_WF_RMAC(_band, 0x03b8) |
| +#define MT_MIB_OBSSTIME_MASK GENMASK(23, 0) |
| +#define MT_WF_RMAC_MIB_AIRTIME0(_band) MT_WF_RMAC(_band, 0x0380) |
| + |
| +/* WFDMA0 */ |
| +#define MT_WFDMA0_BASE 0xd4000 |
| +#define MT_WFDMA0(ofs) (MT_WFDMA0_BASE + (ofs)) |
| + |
| +#define MT_WFDMA0_RST MT_WFDMA0(0x100) |
| +#define MT_WFDMA0_RST_LOGIC_RST BIT(4) |
| +#define MT_WFDMA0_RST_DMASHDL_ALL_RST BIT(5) |
| + |
| +#define MT_WFDMA0_BUSY_ENA MT_WFDMA0(0x13c) |
| +#define MT_WFDMA0_BUSY_ENA_TX_FIFO0 BIT(0) |
| +#define MT_WFDMA0_BUSY_ENA_TX_FIFO1 BIT(1) |
| +#define MT_WFDMA0_BUSY_ENA_RX_FIFO BIT(2) |
| + |
| +#define MT_MCU_CMD MT_WFDMA0(0x1f0) |
| +#define MT_MCU_CMD_WAKE_RX_PCIE BIT(0) |
| +#define MT_MCU_CMD_STOP_DMA_FW_RELOAD BIT(1) |
| +#define MT_MCU_CMD_STOP_DMA BIT(2) |
| +#define MT_MCU_CMD_RESET_DONE BIT(3) |
| +#define MT_MCU_CMD_RECOVERY_DONE BIT(4) |
| +#define MT_MCU_CMD_NORMAL_STATE BIT(5) |
| +#define MT_MCU_CMD_ERROR_MASK GENMASK(5, 1) |
| + |
| +#define MT_MCU2HOST_SW_INT_ENA MT_WFDMA0(0x1f4) |
| + |
| +#define MT_WFDMA0_HOST_INT_STA MT_WFDMA0(0x200) |
| +#define HOST_RX_DONE_INT_STS0 BIT(0) /* Rx mcu */ |
| +#define HOST_RX_DONE_INT_STS2 BIT(2) /* Rx data */ |
| +#define HOST_RX_DONE_INT_STS4 BIT(22) /* Rx mcu after fw downloaded */ |
| +#define HOST_TX_DONE_INT_STS16 BIT(26) |
| +#define HOST_TX_DONE_INT_STS17 BIT(27) /* MCU tx done*/ |
| + |
| +#define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208) |
| +#define MT_WFDMA0_GLO_CFG_TX_DMA_EN BIT(0) |
| +#define MT_WFDMA0_GLO_CFG_TX_DMA_BUSY BIT(1) |
| +#define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2) |
| +#define MT_WFDMA0_GLO_CFG_RX_DMA_BUSY BIT(3) |
| +#define MT_WFDMA0_GLO_CFG_TX_WB_DDONE BIT(6) |
| +#define MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL BIT(9) |
| +#define MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12) |
| +#define MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN BIT(15) |
| +#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21) |
| +#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO BIT(27) |
| +#define MT_WFDMA0_GLO_CFG_OMIT_TX_INFO BIT(28) |
| +#define MT_WFDMA0_GLO_CFG_CLK_GAT_DIS BIT(30) |
| + |
| +#define HOST_RX_DONE_INT_ENA0 BIT(0) |
| +#define HOST_RX_DONE_INT_ENA1 BIT(1) |
| +#define HOST_RX_DONE_INT_ENA2 BIT(2) |
| +#define HOST_RX_DONE_INT_ENA3 BIT(3) |
| +#define HOST_TX_DONE_INT_ENA0 BIT(4) |
| +#define HOST_TX_DONE_INT_ENA1 BIT(5) |
| +#define HOST_TX_DONE_INT_ENA2 BIT(6) |
| +#define HOST_TX_DONE_INT_ENA3 BIT(7) |
| +#define HOST_TX_DONE_INT_ENA4 BIT(8) |
| +#define HOST_TX_DONE_INT_ENA5 BIT(9) |
| +#define HOST_TX_DONE_INT_ENA6 BIT(10) |
| +#define HOST_TX_DONE_INT_ENA7 BIT(11) |
| +#define HOST_RX_COHERENT_EN BIT(20) |
| +#define HOST_TX_COHERENT_EN BIT(21) |
| +#define MCU2HOST_SW_INT_ENA BIT(29) |
| +#define HOST_TX_DONE_INT_ENA18 BIT(30) |
| + |
| +#define MT_INT_MCU_CMD MCU2HOST_SW_INT_ENA |
| + |
| +#define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c) |
| +#define MT_WFDMA0_RST_DRX_PTR MT_WFDMA0(0x280) |
| +#define MT_WFDMA0_GLO_CFG_EXT0 MT_WFDMA0(0x2b0) |
| +#define MT_WFDMA0_CSR_TX_DMASHDL_ENABLE BIT(6) |
| +#define MT_WFDMA0_PRI_DLY_INT_CFG0 MT_WFDMA0(0x2f0) |
| + |
| +#define MT_WFDMA0_TX_RING0_EXT_CTRL MT_WFDMA0(0x600) |
| +#define MT_WFDMA0_TX_RING1_EXT_CTRL MT_WFDMA0(0x604) |
| +#define MT_WFDMA0_TX_RING2_EXT_CTRL MT_WFDMA0(0x608) |
| +#define MT_WFDMA0_TX_RING3_EXT_CTRL MT_WFDMA0(0x60c) |
| +#define MT_WFDMA0_TX_RING4_EXT_CTRL MT_WFDMA0(0x610) |
| +#define MT_WFDMA0_TX_RING5_EXT_CTRL MT_WFDMA0(0x614) |
| +#define MT_WFDMA0_TX_RING6_EXT_CTRL MT_WFDMA0(0x618) |
| +#define MT_WFDMA0_TX_RING15_EXT_CTRL MT_WFDMA0(0x63c) |
| +#define MT_WFDMA0_TX_RING16_EXT_CTRL MT_WFDMA0(0x640) |
| +#define MT_WFDMA0_TX_RING17_EXT_CTRL MT_WFDMA0(0x644) |
| + |
| +#define MT_WPDMA0_MAX_CNT_MASK GENMASK(7, 0) |
| +#define MT_WPDMA0_BASE_PTR_MASK GENMASK(31, 16) |
| + |
| +#define MT_WFDMA0_RX_RING0_EXT_CTRL MT_WFDMA0(0x680) |
| +#define MT_WFDMA0_RX_RING1_EXT_CTRL MT_WFDMA0(0x684) |
| +#define MT_WFDMA0_RX_RING2_EXT_CTRL MT_WFDMA0(0x688) |
| +#define MT_WFDMA0_RX_RING3_EXT_CTRL MT_WFDMA0(0x68c) |
| +#define MT_WFDMA0_RX_RING4_EXT_CTRL MT_WFDMA0(0x690) |
| +#define MT_WFDMA0_RX_RING5_EXT_CTRL MT_WFDMA0(0x694) |
| +#define MT_WFDMA0_RX_RING6_EXT_CTRL MT_WFDMA0(0x698) |
| +#define MT_WFDMA0_RX_RING7_EXT_CTRL MT_WFDMA0(0x69c) |
| + |
| +#define MT_TX_RING_BASE MT_WFDMA0(0x300) |
| +#define MT_RX_EVENT_RING_BASE MT_WFDMA0(0x500) |
| + |
| +/* WFDMA CSR */ |
| +#define MT_WFDMA_EXT_CSR_BASE 0xd7000 |
| +#define MT_WFDMA_EXT_CSR(ofs) (MT_WFDMA_EXT_CSR_BASE + (ofs)) |
| +#define MT_WFDMA_EXT_CSR_HIF_MISC MT_WFDMA_EXT_CSR(0x44) |
| +#define MT_WFDMA_EXT_CSR_HIF_MISC_BUSY BIT(0) |
| + |
| +#define MT_SWDEF_BASE 0x41f200 |
| +#define MT_SWDEF(ofs) (MT_SWDEF_BASE + (ofs)) |
| +#define MT_SWDEF_MODE MT_SWDEF(0x3c) |
| +#define MT_SWDEF_NORMAL_MODE 0 |
| +#define MT_SWDEF_ICAP_MODE 1 |
| +#define MT_SWDEF_SPECTRUM_MODE 2 |
| + |
| +#define MT_TOP_BASE 0x18060000 |
| +#define MT_TOP(ofs) (MT_TOP_BASE + (ofs)) |
| + |
| +#define MT_TOP_LPCR_HOST_BAND0 MT_TOP(0x10) |
| +#define MT_TOP_LPCR_HOST_FW_OWN BIT(0) |
| +#define MT_TOP_LPCR_HOST_DRV_OWN BIT(1) |
| + |
| +#define MT_TOP_MISC MT_TOP(0xf0) |
| +#define MT_TOP_MISC_FW_STATE GENMASK(2, 0) |
| + |
| +#define MT_MCU_WPDMA0_BASE 0x54000000 |
| +#define MT_MCU_WPDMA0(ofs) (MT_MCU_WPDMA0_BASE + (ofs)) |
| + |
| +#define MT_WFDMA_DUMMY_CR MT_MCU_WPDMA0(0x120) |
| +#define MT_WFDMA_NEED_REINIT BIT(1) |
| + |
| +#define MT_CBTOP_RGU(ofs) (0x70002000 + (ofs)) |
| +#define MT_CBTOP_RGU_WF_SUBSYS_RST MT_CBTOP_RGU(0x600) |
| +#define MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH BIT(0) |
| + |
| +#define MT_HW_BOUND 0x70010020 |
| +#define MT_HW_CHIPID 0x70010200 |
| +#define MT_HW_REV 0x70010204 |
| + |
| +#define MT_PCIE_MAC_BASE 0x10000 |
| +#define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs)) |
| +#define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188) |
| +#define MT_PCIE_MAC_PM MT_PCIE_MAC(0x194) |
| +#define MT_PCIE_MAC_PM_L0S_DIS BIT(8) |
| + |
| +#define MT_DMA_SHDL(ofs) (0x7c026000 + (ofs)) |
| +#define MT_DMASHDL_SW_CONTROL MT_DMA_SHDL(0x004) |
| +#define MT_DMASHDL_DMASHDL_BYPASS BIT(28) |
| +#define MT_DMASHDL_OPTIONAL MT_DMA_SHDL(0x008) |
| +#define MT_DMASHDL_PAGE MT_DMA_SHDL(0x00c) |
| +#define MT_DMASHDL_GROUP_SEQ_ORDER BIT(16) |
| +#define MT_DMASHDL_REFILL MT_DMA_SHDL(0x010) |
| +#define MT_DMASHDL_REFILL_MASK GENMASK(31, 16) |
| +#define MT_DMASHDL_PKT_MAX_SIZE MT_DMA_SHDL(0x01c) |
| +#define MT_DMASHDL_PKT_MAX_SIZE_PLE GENMASK(11, 0) |
| +#define MT_DMASHDL_PKT_MAX_SIZE_PSE GENMASK(27, 16) |
| + |
| +#define MT_DMASHDL_GROUP_QUOTA(_n) MT_DMA_SHDL(0x020 + ((_n) << 2)) |
| +#define MT_DMASHDL_GROUP_QUOTA_MIN GENMASK(11, 0) |
| +#define MT_DMASHDL_GROUP_QUOTA_MAX GENMASK(27, 16) |
| + |
| +#define MT_DMASHDL_Q_MAP(_n) MT_DMA_SHDL(0x060 + ((_n) << 2)) |
| +#define MT_DMASHDL_Q_MAP_MASK GENMASK(3, 0) |
| +#define MT_DMASHDL_Q_MAP_SHIFT(_n) (4 * ((_n) % 8)) |
| + |
| +#define MT_DMASHDL_SCHED_SET(_n) MT_DMA_SHDL(0x070 + ((_n) << 2)) |
| + |
| +#define MT_WFDMA_HOST_CONFIG 0x7c027030 |
| +#define MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN BIT(6) |
| + |
| +#define MT_UMAC(ofs) (0x74000000 + (ofs)) |
| +#define MT_UDMA_TX_QSEL MT_UMAC(0x008) |
| +#define MT_FW_DL_EN BIT(3) |
| + |
| +#define MT_UDMA_WLCFG_1 MT_UMAC(0x00c) |
| +#define MT_WL_RX_AGG_PKT_LMT GENMASK(7, 0) |
| +#define MT_WL_TX_TMOUT_LMT GENMASK(27, 8) |
| + |
| +#define MT_UDMA_WLCFG_0 MT_UMAC(0x18) |
| +#define MT_WL_RX_AGG_TO GENMASK(7, 0) |
| +#define MT_WL_RX_AGG_LMT GENMASK(15, 8) |
| +#define MT_WL_TX_TMOUT_FUNC_EN BIT(16) |
| +#define MT_WL_TX_DPH_CHK_EN BIT(17) |
| +#define MT_WL_RX_MPSZ_PAD0 BIT(18) |
| +#define MT_WL_RX_FLUSH BIT(19) |
| +#define MT_TICK_1US_EN BIT(20) |
| +#define MT_WL_RX_AGG_EN BIT(21) |
| +#define MT_WL_RX_EN BIT(22) |
| +#define MT_WL_TX_EN BIT(23) |
| +#define MT_WL_RX_BUSY BIT(30) |
| +#define MT_WL_TX_BUSY BIT(31) |
| + |
| +#define MT_UDMA_CONN_INFRA_STATUS MT_UMAC(0xa20) |
| +#define MT_UDMA_CONN_WFSYS_INIT_DONE BIT(22) |
| +#define MT_UDMA_CONN_INFRA_STATUS_SEL MT_UMAC(0xa24) |
| + |
| +#define MT_SSUSB_EPCTL_CSR(ofs) (0x74011800 + (ofs)) |
| +#define MT_SSUSB_EPCTL_CSR_EP_RST_OPT MT_SSUSB_EPCTL_CSR(0x090) |
| + |
| +#define MT_UWFDMA0(ofs) (0x7c024000 + (ofs)) |
| +#define MT_UWFDMA0_GLO_CFG MT_UWFDMA0(0x208) |
| +#define MT_UWFDMA0_GLO_CFG_EXT0 MT_UWFDMA0(0x2b0) |
| +#define MT_UWFDMA0_GLO_CFG_EXT1 MT_UWFDMA0(0x2b4) |
| +#define MT_UWFDMA0_TX_RING_EXT_CTRL(_n) MT_UWFDMA0(0x600 + ((_n) << 2)) |
| + |
| +#define MT_CONN_STATUS 0x7c053c10 |
| +#define MT_WIFI_PATCH_DL_STATE BIT(0) |
| + |
| +#define MT_CONN_ON_LPCTL 0x7c060010 |
| +#define PCIE_LPCR_HOST_SET_OWN BIT(0) |
| +#define PCIE_LPCR_HOST_CLR_OWN BIT(1) |
| +#define PCIE_LPCR_HOST_OWN_SYNC BIT(2) |
| + |
| +#define MT_CONN_ON_MISC 0x7c0600f0 |
| +#define MT_TOP_MISC2_FW_PWR_ON BIT(0) |
| +#define MT_TOP_MISC2_FW_N9_ON BIT(1) |
| +#define MT_TOP_MISC2_FW_N9_RDY GENMASK(1, 0) |
| + |
| +#define MT_WF_SW_DEF_CR(ofs) (0x401a00 + (ofs)) |
| +#define MT_WF_SW_DEF_CR_USB_MCU_EVENT MT_WF_SW_DEF_CR(0x028) |
| +#define MT_WF_SW_SER_TRIGGER_SUSPEND BIT(6) |
| +#define MT_WF_SW_SER_DONE_SUSPEND BIT(7) |
| + |
| +#define WFSYS_SW_RST_B BIT(0) |
| +#define WFSYS_SW_INIT_DONE BIT(4) |
| + |
| +#endif /* __MT792X_REGS_H */ |
| diff --git a/mt792x_trace.c b/mt792x_trace.c |
| new file mode 100644 |
| index 00000000..b6f284fb |
| --- /dev/null |
| +++ b/mt792x_trace.c |
| @@ -0,0 +1,14 @@ |
| +// SPDX-License-Identifier: ISC |
| +/* |
| + * Copyright (C) 2023 Lorenzo Bianconi <lorenzo@kernel.org> |
| + */ |
| + |
| +#include <linux/module.h> |
| + |
| +#ifndef __CHECKER__ |
| +#define CREATE_TRACE_POINTS |
| +#include "mt792x_trace.h" |
| + |
| +EXPORT_TRACEPOINT_SYMBOL_GPL(lp_event); |
| + |
| +#endif |
| diff --git a/mt7921/mt7921_trace.h b/mt792x_trace.h |
| similarity index 68% |
| rename from mt7921/mt7921_trace.h |
| rename to mt792x_trace.h |
| index 9bc4db67..61f2aa26 100644 |
| --- a/mt7921/mt7921_trace.h |
| +++ b/mt792x_trace.h |
| @@ -1,27 +1,27 @@ |
| /* SPDX-License-Identifier: ISC */ |
| /* |
| - * Copyright (C) 2021 Lorenzo Bianconi <lorenzo@kernel.org> |
| + * Copyright (C) 2023 Lorenzo Bianconi <lorenzo@kernel.org> |
| */ |
| |
| -#if !defined(__MT7921_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) |
| -#define __MT7921_TRACE_H |
| +#if !defined(__MT792X_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) |
| +#define __MT792X_TRACE_H |
| |
| #include <linux/tracepoint.h> |
| -#include "mt7921.h" |
| +#include "mt792x.h" |
| |
| #undef TRACE_SYSTEM |
| -#define TRACE_SYSTEM mt7921 |
| +#define TRACE_SYSTEM mt792x |
| |
| #define MAXNAME 32 |
| #define DEV_ENTRY __array(char, wiphy_name, 32) |
| -#define DEV_ASSIGN strlcpy(__entry->wiphy_name, \ |
| +#define DEV_ASSIGN strscpy(__entry->wiphy_name, \ |
| wiphy_name(mt76_hw(dev)->wiphy), MAXNAME) |
| #define DEV_PR_FMT "%s" |
| #define DEV_PR_ARG __entry->wiphy_name |
| #define LP_STATE_PR_ARG __entry->lp_state ? "lp ready" : "lp not ready" |
| |
| TRACE_EVENT(lp_event, |
| - TP_PROTO(struct mt7921_dev *dev, u8 lp_state), |
| + TP_PROTO(struct mt792x_dev *dev, u8 lp_state), |
| |
| TP_ARGS(dev, lp_state), |
| |
| @@ -46,6 +46,6 @@ TRACE_EVENT(lp_event, |
| #undef TRACE_INCLUDE_PATH |
| #define TRACE_INCLUDE_PATH . |
| #undef TRACE_INCLUDE_FILE |
| -#define TRACE_INCLUDE_FILE mt7921_trace |
| +#define TRACE_INCLUDE_FILE mt792x_trace |
| |
| #include <trace/define_trace.h> |
| diff --git a/mt792x_usb.c b/mt792x_usb.c |
| new file mode 100644 |
| index 00000000..20e7f9c7 |
| --- /dev/null |
| +++ b/mt792x_usb.c |
| @@ -0,0 +1,309 @@ |
| +// SPDX-License-Identifier: ISC |
| +/* Copyright (C) 2023 MediaTek Inc. |
| + * |
| + * Author: Lorenzo Bianconi <lorenzo@kernel.org> |
| + */ |
| + |
| +#include <linux/kernel.h> |
| +#include <linux/module.h> |
| +#include <linux/usb.h> |
| + |
| +#include "mt792x.h" |
| +#include "mt76_connac2_mac.h" |
| + |
| +u32 mt792xu_rr(struct mt76_dev *dev, u32 addr) |
| +{ |
| + u32 ret; |
| + |
| + mutex_lock(&dev->usb.usb_ctrl_mtx); |
| + ret = ___mt76u_rr(dev, MT_VEND_READ_EXT, |
| + USB_DIR_IN | MT_USB_TYPE_VENDOR, addr); |
| + mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| + |
| + return ret; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_rr); |
| + |
| +void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val) |
| +{ |
| + mutex_lock(&dev->usb.usb_ctrl_mtx); |
| + ___mt76u_wr(dev, MT_VEND_WRITE_EXT, |
| + USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val); |
| + mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_wr); |
| + |
| +u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val) |
| +{ |
| + mutex_lock(&dev->usb.usb_ctrl_mtx); |
| + val |= ___mt76u_rr(dev, MT_VEND_READ_EXT, |
| + USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask; |
| + ___mt76u_wr(dev, MT_VEND_WRITE_EXT, |
| + USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val); |
| + mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| + |
| + return val; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_rmw); |
| + |
| +void mt792xu_copy(struct mt76_dev *dev, u32 offset, const void *data, int len) |
| +{ |
| + struct mt76_usb *usb = &dev->usb; |
| + int ret, i = 0, batch_len; |
| + const u8 *val = data; |
| + |
| + len = round_up(len, 4); |
| + |
| + mutex_lock(&usb->usb_ctrl_mtx); |
| + while (i < len) { |
| + batch_len = min_t(int, usb->data_len, len - i); |
| + memcpy(usb->data, val + i, batch_len); |
| + ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT, |
| + USB_DIR_OUT | MT_USB_TYPE_VENDOR, |
| + (offset + i) >> 16, offset + i, |
| + usb->data, batch_len); |
| + if (ret < 0) |
| + break; |
| + |
| + i += batch_len; |
| + } |
| + mutex_unlock(&usb->usb_ctrl_mtx); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_copy); |
| + |
| +int mt792xu_mcu_power_on(struct mt792x_dev *dev) |
| +{ |
| + int ret; |
| + |
| + ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON, |
| + USB_DIR_OUT | MT_USB_TYPE_VENDOR, |
| + 0x0, 0x1, NULL, 0); |
| + if (ret) |
| + return ret; |
| + |
| + if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON, |
| + MT_TOP_MISC2_FW_PWR_ON, 500)) { |
| + dev_err(dev->mt76.dev, "Timeout for power on\n"); |
| + ret = -EIO; |
| + } |
| + |
| + return ret; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_mcu_power_on); |
| + |
| +static void mt792xu_cleanup(struct mt792x_dev *dev) |
| +{ |
| + clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); |
| + mt792xu_wfsys_reset(dev); |
| + skb_queue_purge(&dev->mt76.mcu.res_q); |
| + mt76u_queues_deinit(&dev->mt76); |
| +} |
| + |
| +static u32 mt792xu_uhw_rr(struct mt76_dev *dev, u32 addr) |
| +{ |
| + u32 ret; |
| + |
| + mutex_lock(&dev->usb.usb_ctrl_mtx); |
| + ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE, |
| + USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr); |
| + mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| + |
| + return ret; |
| +} |
| + |
| +static void mt792xu_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val) |
| +{ |
| + mutex_lock(&dev->usb.usb_ctrl_mtx); |
| + ___mt76u_wr(dev, MT_VEND_WRITE, |
| + USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val); |
| + mutex_unlock(&dev->usb.usb_ctrl_mtx); |
| +} |
| + |
| +static void mt792xu_dma_prefetch(struct mt792x_dev *dev) |
| +{ |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), |
| + MT_WPDMA0_MAX_CNT_MASK, 4); |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), |
| + MT_WPDMA0_BASE_PTR_MASK, 0x80); |
| + |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), |
| + MT_WPDMA0_MAX_CNT_MASK, 4); |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), |
| + MT_WPDMA0_BASE_PTR_MASK, 0xc0); |
| + |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), |
| + MT_WPDMA0_MAX_CNT_MASK, 4); |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), |
| + MT_WPDMA0_BASE_PTR_MASK, 0x100); |
| + |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), |
| + MT_WPDMA0_MAX_CNT_MASK, 4); |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), |
| + MT_WPDMA0_BASE_PTR_MASK, 0x140); |
| + |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), |
| + MT_WPDMA0_MAX_CNT_MASK, 4); |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), |
| + MT_WPDMA0_BASE_PTR_MASK, 0x180); |
| + |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), |
| + MT_WPDMA0_MAX_CNT_MASK, 4); |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), |
| + MT_WPDMA0_BASE_PTR_MASK, 0x280); |
| + |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), |
| + MT_WPDMA0_MAX_CNT_MASK, 4); |
| + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), |
| + MT_WPDMA0_BASE_PTR_MASK, 0x2c0); |
| +} |
| + |
| +static void mt792xu_wfdma_init(struct mt792x_dev *dev) |
| +{ |
| + mt792xu_dma_prefetch(dev); |
| + |
| + mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO); |
| + mt76_set(dev, MT_UWFDMA0_GLO_CFG, |
| + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | |
| + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 | |
| + MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL | |
| + MT_WFDMA0_GLO_CFG_TX_DMA_EN | |
| + MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
| + |
| + /* disable dmashdl */ |
| + mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0, |
| + MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); |
| + mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); |
| + |
| + mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); |
| +} |
| + |
| +static int mt792xu_dma_rx_evt_ep4(struct mt792x_dev *dev) |
| +{ |
| + if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG, |
| + MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000)) |
| + return -ETIMEDOUT; |
| + |
| + mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
| + mt76_set(dev, MT_WFDMA_HOST_CONFIG, |
| + MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN); |
| + mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN); |
| + |
| + return 0; |
| +} |
| + |
| +static void mt792xu_epctl_rst_opt(struct mt792x_dev *dev, bool reset) |
| +{ |
| + u32 val; |
| + |
| + /* usb endpoint reset opt |
| + * bits[4,9]: out blk ep 4-9 |
| + * bits[20,21]: in blk ep 4-5 |
| + * bits[22]: in int ep 6 |
| + */ |
| + val = mt792xu_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT); |
| + if (reset) |
| + val |= GENMASK(9, 4) | GENMASK(22, 20); |
| + else |
| + val &= ~(GENMASK(9, 4) | GENMASK(22, 20)); |
| + mt792xu_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val); |
| +} |
| + |
| +int mt792xu_dma_init(struct mt792x_dev *dev, bool resume) |
| +{ |
| + int err; |
| + |
| + mt792xu_wfdma_init(dev); |
| + |
| + mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH); |
| + |
| + mt76_set(dev, MT_UDMA_WLCFG_0, |
| + MT_WL_RX_EN | MT_WL_TX_EN | |
| + MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN); |
| + mt76_clear(dev, MT_UDMA_WLCFG_0, |
| + MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT); |
| + mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT); |
| + |
| + if (resume) |
| + return 0; |
| + |
| + err = mt792xu_dma_rx_evt_ep4(dev); |
| + if (err) |
| + return err; |
| + |
| + mt792xu_epctl_rst_opt(dev, false); |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_dma_init); |
| + |
| +int mt792xu_wfsys_reset(struct mt792x_dev *dev) |
| +{ |
| + u32 val; |
| + int i; |
| + |
| + mt792xu_epctl_rst_opt(dev, false); |
| + |
| + val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST); |
| + val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH; |
| + mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val); |
| + |
| + usleep_range(10, 20); |
| + |
| + val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST); |
| + val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH; |
| + mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val); |
| + |
| + mt792xu_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0); |
| + for (i = 0; i < MT792x_WFSYS_INIT_RETRY_COUNT; i++) { |
| + val = mt792xu_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS); |
| + if (val & MT_UDMA_CONN_WFSYS_INIT_DONE) |
| + break; |
| + |
| + msleep(100); |
| + } |
| + |
| + if (i == MT792x_WFSYS_INIT_RETRY_COUNT) |
| + return -ETIMEDOUT; |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_wfsys_reset); |
| + |
| +int mt792xu_init_reset(struct mt792x_dev *dev) |
| +{ |
| + set_bit(MT76_RESET, &dev->mphy.state); |
| + |
| + wake_up(&dev->mt76.mcu.wait); |
| + skb_queue_purge(&dev->mt76.mcu.res_q); |
| + |
| + mt76u_stop_rx(&dev->mt76); |
| + mt76u_stop_tx(&dev->mt76); |
| + |
| + mt792xu_wfsys_reset(dev); |
| + |
| + clear_bit(MT76_RESET, &dev->mphy.state); |
| + |
| + return mt76u_resume_rx(&dev->mt76); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_init_reset); |
| + |
| +void mt792xu_disconnect(struct usb_interface *usb_intf) |
| +{ |
| + struct mt792x_dev *dev = usb_get_intfdata(usb_intf); |
| + |
| + cancel_work_sync(&dev->init_work); |
| + if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) |
| + return; |
| + |
| + mt76_unregister_device(&dev->mt76); |
| + mt792xu_cleanup(dev); |
| + |
| + usb_set_intfdata(usb_intf, NULL); |
| + usb_put_dev(interface_to_usbdev(usb_intf)); |
| + |
| + mt76_free_device(&dev->mt76); |
| +} |
| +EXPORT_SYMBOL_GPL(mt792xu_disconnect); |
| + |
| +MODULE_LICENSE("Dual BSD/GPL"); |
| +MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); |
| diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
| index 726c222e..7354e5cf 100644 |
| --- a/mt7996/mt7996.h |
| +++ b/mt7996/mt7996.h |
| @@ -254,20 +254,6 @@ enum { |
| __MT_WFDMA_MAX, |
| }; |
| |
| -enum { |
| - MT_CTX0, |
| - MT_HIF0 = 0x0, |
| - |
| - MT_LMAC_AC00 = 0x0, |
| - MT_LMAC_AC01, |
| - MT_LMAC_AC02, |
| - MT_LMAC_AC03, |
| - MT_LMAC_ALTX0 = 0x10, |
| - MT_LMAC_BMC0, |
| - MT_LMAC_BCN0, |
| - MT_LMAC_PSMP0, |
| -}; |
| - |
| enum { |
| MT_RX_SEL0, |
| MT_RX_SEL1, |
| diff --git a/testmode.c b/testmode.c |
| index 0accc71a..4644dace 100644 |
| --- a/testmode.c |
| +++ b/testmode.c |
| @@ -8,6 +8,7 @@ const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS] = { |
| [MT76_TM_ATTR_RESET] = { .type = NLA_FLAG }, |
| [MT76_TM_ATTR_STATE] = { .type = NLA_U8 }, |
| [MT76_TM_ATTR_TX_COUNT] = { .type = NLA_U32 }, |
| + [MT76_TM_ATTR_TX_LENGTH] = { .type = NLA_U32 }, |
| [MT76_TM_ATTR_TX_RATE_MODE] = { .type = NLA_U8 }, |
| [MT76_TM_ATTR_TX_RATE_NSS] = { .type = NLA_U8 }, |
| [MT76_TM_ATTR_TX_RATE_IDX] = { .type = NLA_U8 }, |
| -- |
| 2.39.2 |
| |