- fa01598 aarch64: Fix stack pointer maintenance on EA handling path by Jan Dabros · 5 years ago
- eb1e7e4 Merge changes from topic "aa/sel2_support" into integration by Olivier Deprez · 5 years ago
- 94606d6 Merge "libc: add memrchr" into integration by Alexei Fedorov · 5 years ago
- 35248f2 libc: add memrchr by Ambroise Vincent · 5 years ago
- a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · 5 years ago
- 023c155 Add support for enabling S-EL2 by Achin Gupta · 5 years ago
- 02c3568 adding support to enable different personality of the same soc. by Pankaj Gupta · 5 years ago
- e5dce5d Merge "Coding guideline suggest not to use unsigned long" into integration by Sandrine Bailleux · 5 years ago
- d091bf6 Merge "Fix white space errors + remove #if defined" into integration by Sandrine Bailleux · 5 years ago
- eb2b2b6 Coding guideline suggest not to use unsigned long by Deepika Bhavnani · 5 years ago
- 839a966 Merge "Disable stack protection explicitly" into integration by Paul Beesley · 5 years ago
- cd9a943 Fix white space errors + remove #if defined by laurenw-arm · 5 years ago
- da12924 Disable stack protection explicitly by Simon South · 5 years ago
- bce728f xlat_table_v2: Fix enable WARMBOOT_ENABLE_DCACHE_EARLY config by Artsem Artsemenka · 5 years ago
- 2fbce24 Merge "Neoverse N1 Errata Workaround 1542419" into integration by Soby Mathew · 5 years ago
- a5b401b Merge "Fix the CAS spinlock implementation" into integration by Soby Mathew · 5 years ago
- 94accd3 Neoverse N1 Errata Workaround 1542419 by laurenw-arm · 5 years ago
- ad04201 Fix the CAS spinlock implementation by Soby Mathew · 5 years ago
- efda055 Merge "TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U" into integration by Soby Mathew · 5 years ago
- 3dd9f2b TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U by Alexei Fedorov · 5 years ago
- 584410e Introducing support for Cortex-A65AE by Imre Kis · 5 years ago
- 05e4d22 Introducing support for Cortex-A65 by Imre Kis · 5 years ago
- d3dc940 Merge "Cortex_hercules: Add support for Hercules-AE" into integration by Soby Mathew · 5 years ago
- fea97f7 Cortex_hercules: Add support for Hercules-AE by Artsem Artsemenka · 5 years ago
- 14e508b Merge "AArch32: Disable Secure Cycle Counter" into integration by Soby Mathew · 5 years ago
- 4bb606c Merge "Fix MTE support from causing unused variable warnings" into integration by Soby Mathew · 5 years ago
- 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
- 33bd514 Adding new optional PSCI hook pwr_domain_on_finish_late by Madhukar Pappireddy · 5 years ago
- 05e030e Fix MTE support from causing unused variable warnings by Justin Chadwell · 5 years ago
- c3a1836 Merge changes from topic "db/unsigned_long" into integration by Sandrine Bailleux · 5 years ago
- b0f2602 SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64 by Deepika Bhavnani · 5 years ago
- 7c9a4e6 Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration by Soby Mathew · 5 years ago
- f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 5 years ago
- 4490ad2 Merge "Assert if power level value greater then PSCI_INVALID_PWR_LVL" into integration by Soby Mathew · 5 years ago
- fd276b2 Merge "Unify type of "cpu_idx" across PSCI module." into integration by Soby Mathew · 5 years ago
- 79ffab5 Unify type of "cpu_idx" across PSCI module. by Deepika Bhavnani · 5 years ago
- 9180af2 Merge "libc: fix sparse warning for __assert()" into integration by Soby Mathew · 5 years ago
- c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · 5 years ago
- e412788 Zeus: apply the MSR SSBS instruction by John Tsichritzis · 5 years ago
- 77389b2 libc: fix sparse warning for __assert() by Masahiro Yamada · 5 years ago
- 523024c Assert if power level value greater then PSCI_INVALID_PWR_LVL by Deepika Bhavnani · 5 years ago
- 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · 5 years ago
- c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · 5 years ago
- 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
- 5866c59 Merge "Fix for N1 1043202 Errata Workaround" into integration by Alexei Fedorov · 5 years ago
- 9771749 Merge "Coverity fix: Remove GGC ignore -Warray-bounds" into integration by Paul Beesley · 5 years ago
- 33e58f3 Fix for N1 1043202 Errata Workaround by laurenw-arm · 5 years ago
- 6bd4666 Coverity fix: Remove GGC ignore -Warray-bounds by Deepika Bhavnani · 5 years ago
- a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · 5 years ago
- 1da61af Merge changes from topic "jc/coverity-fixes" into integration by Paul Beesley · 5 years ago
- ca536f3 Fix Coverity #261967, Infinite loop by Justin Chadwell · 5 years ago
- 0aab960 Fix Coverity #343008, Side affect in assertion by Justin Chadwell · 5 years ago
- 72065ec Fix Coverity #342970, Uninitialized scalar variable by Justin Chadwell · 5 years ago
- 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · 5 years ago
- 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 5 years ago
- db2ec85 Enable AMU for Cortex-Hercules by Balint Dobszay · 5 years ago
- 33bc410 Merge "Romlib makefile refactoring and script rewriting" into integration by Soby Mathew · 5 years ago
- 4047728 Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration by Soby Mathew · 5 years ago
- f0081be Merge "Cortex_hercules: Introduce preliminary cpu support" into integration by Soby Mathew · 5 years ago
- 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · 5 years ago
- 2d137c5 Romlib makefile refactoring and script rewriting by Imre Kis · 5 years ago
- dbba2b3 Introduce lightweight BL platform parameter library by Julius Werner · 5 years ago
- f57f108 Cortex_hercules: Introduce preliminary cpu support by Louis Mayencourt · 6 years ago
- c81e4f1 Merge changes from topic "jc/shift-overflow" into integration by Soby Mathew · 5 years ago
- 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · 5 years ago
- 8294602 Update base code to not rely on undefined overflow behaviour by Justin Chadwell · 5 years ago
- cc94264 Rename Cortex-Deimos to Cortex-A77 by Balint Dobszay · 5 years ago
- cf12f26 Removing redundant ISB instructions by lauwal01 · 5 years ago
- 644b6ed Workaround for Neoverse N1 erratum 1275112 by lauwal01 · 5 years ago
- 00396bf Workaround for Neoverse N1 erratum 1262888 by lauwal01 · 5 years ago
- 42771af Workaround for Neoverse N1 erratum 1262606 by lauwal01 · 5 years ago
- 07c2a23 Workaround for Neoverse N1 erratum 1257314 by lauwal01 · 5 years ago
- 197f14c Workaround for Neoverse N1 erratum 1220197 by lauwal01 · 5 years ago
- e159044 Workaround for Neoverse N1 erratum 1207823 by lauwal01 · 5 years ago
- f2adb13 Workaround for Neoverse N1 erratum 1165347 by lauwal01 · 5 years ago
- 363ee3c Workaround for Neoverse N1 erratum 1130799 by lauwal01 · 5 years ago
- bd555f4 Workaround for Neoverse N1 erratum 1073348 by lauwal01 · 5 years ago
- 782f7e6 libc: fix memchr implementation by Ambroise Vincent · 5 years ago
- 714d43a Merge "DSU: Apply erratum 936184 for Neoverse N1/E1" into integration by John Tsichritzis · 5 years ago
- 8b8b13b DSU: Apply erratum 936184 for Neoverse N1/E1 by Louis Mayencourt · 5 years ago
- 7901252 Merge changes from topic "jts/ti_fix" into integration by Soby Mathew · 5 years ago
- 31df678 Merge "PSCI: Lookup list of parent nodes to lock only once" into integration by Soby Mathew · 5 years ago
- 401cc1f Merge "Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703" into integration by John Tsichritzis · 5 years ago
- 74e8978 PSCI: Lookup list of parent nodes to lock only once by Andrew F. Davis · 5 years ago
- b934740 Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 by Andre Przywara · 5 years ago
- c23d78c Merge "Introduce BTI support in ROMLIB" into integration by John Tsichritzis · 5 years ago
- f4acb92 ti: k3: common: Remove coherency workaround for AM65x by Andrew F. Davis · 6 years ago
- 7557c66 Apply compile-time check for AArch64-only cores by John Tsichritzis · 5 years ago
- db737bb Merge "Cortex-A55: workarounds for errata 1221012" into integration by Paul Beesley · 5 years ago
- b72fe7a Cortex-A55: workarounds for errata 1221012 by Ambroise Vincent · 5 years ago
- 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
- f6ea99b Introduce BTI support in ROMLIB by John Tsichritzis · 5 years ago
- 70d4c9c romlib: Improve compilation flags definition by Louis Mayencourt · 6 years ago
- 66e121a Merge changes from topic "sami/550_fix_n1sdp_issues_v1" into integration by Soby Mathew · 6 years ago
- a8722e9 Disable speculative loads only if SSBS is supported by Sami Mujawar · 6 years ago
- 3a377b2 Remove .arch directives from spinlock.S by Alexei Fedorov · 6 years ago
- 7fa6965 Merge changes from topic "sm/fix_a76_errata" into integration by Soby Mathew · 6 years ago
- 16d006b Workaround for cortex-A76 errata 1286807 by Soby Mathew · 6 years ago
- 1d3ba1c Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112 by Soby Mathew · 6 years ago
- fe6df39 Add compile-time errors for HW_ASSISTED_COHERENCY flag by John Tsichritzis · 6 years ago