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git01.mediatek.com / filogic / atf / fd5ff02a854272c25030fc027d54c480feb3846b / fdts / stm32mp157c-odyssey-som.dtsi
  1. e658cfe feat(stm32mp1-fdts): remove PLL1 settings by Gabriel Fernandez · Wed Feb 01 14:25:25 2023 +0100
  2. df4be52 feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1 by Gabriel Fernandez · Tue Aug 16 11:40:03 2022 +0200
  3. 7a4308f feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation by Lionel Debieve · Wed Feb 23 00:05:51 2022 +0100
  4. 4c68e56 refactor(st): use dashes for BSEC node names by Yann Gautier · Thu Jan 04 11:45:31 2024 +0100
  5. f55efba refactor(stm32mp15-fdts): remove RCC secure-status by Yann Gautier · Tue Mar 29 16:49:48 2022 +0200
  6. 9d3c53c fix(stm32mp1): fdts: stm32mp1: align DDR regulators with new driver by Ahmad Fatoum · Thu Jun 02 06:28:31 2022 +0200
  7. 2366adc fdts: stm32mp1: add support for the Seeed Odyssey SoM and board by Grzegorz Szymaszek · Wed Apr 21 19:46:18 2021 +0200