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git01.mediatek.com / filogic / atf / fc0b8679efd0c90b804bf9fc91376008ff9146d7 / include / arch / aarch64 / arch.h
  1. 9461a89 refactor(el3-runtime): add arch-features detection mechanism by Jayanth Dodderi Chidanand · Mon Jan 17 18:57:17 2022 +0000
  2. 74b7e44 feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX by johpow01 · Wed Dec 01 13:18:30 2021 -0600
  3. 9baade3 feat(sme): enable SME functionality by johpow01 · Thu Jul 08 14:14:00 2021 -0500
  4. 03be39d feat(mpmm): add support for MPMM by Chris Kay · Wed May 05 13:38:30 2021 +0100
  5. a40141d refactor(amu): detect architected counters at runtime by Chris Kay · Tue May 25 12:33:18 2021 +0100
  6. a5fde28 refactor(amu): factor out register accesses by Chris Kay · Wed May 26 11:58:23 2021 +0100
  7. 88fb9af Merge "feat(fvp_r): configure system registers to boot rich OS" into integration by Joanna Farley · Thu Oct 07 18:14:43 2021 +0200
  8. 5693afe feat(fvp_r): configure system registers to boot rich OS by Manish Pandey · Wed Oct 06 17:28:09 2021 +0100
  9. 9d13402 refactor(gpt): productize and refactor GPT library by johpow01 · Wed Jun 16 17:57:28 2021 -0500
  10. 13dc8f1 feat(rme): add RMM dispatcher (RMMD) by Zelalem Aweke · Fri Jul 09 14:20:03 2021 -0500
  11. 79e3d29 feat(rme): add register definitions and helper functions for FEAT_RME by Zelalem Aweke · Thu Jul 08 16:51:14 2021 -0500
  12. 3d7f654 chore: fvp_r: Initial No-EL3 and MPU Implementation by Gary Morrison · Wed Jan 27 13:08:47 2021 -0600
  13. f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · Wed Aug 04 19:38:18 2021 -0500
  14. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · Sun Jul 18 02:26:27 2021 +0100
  15. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · Wed Jul 07 16:27:10 2021 +0100
  16. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · Fri Jul 02 09:10:56 2021 +0100
  17. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · Wed Jun 23 20:02:39 2021 +0100
  18. 44b4333 fix(sdei): set SPSR for SDEI based on TakeException by Daniel Boulby · Wed Nov 25 16:36:46 2020 +0000
  19. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  20. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · Fri May 14 11:21:56 2021 +0100
  21. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
  22. 6fd816e Define registers for FEAT_RNG support by Tomas Pilar · Wed Oct 28 15:34:12 2020 +0000
  23. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · Mon Nov 23 18:38:15 2020 +0000
  24. 9ecc255 Merge "Aarch64: Add support for FEAT_PANx extensions" into integration by Manish Pandey · Thu Dec 03 13:08:02 2020 +0000
  25. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · Tue Dec 01 13:22:25 2020 +0000
  26. c082f03 Aarch64: Add support for FEAT_PANx extensions by Alexei Fedorov · Wed Nov 25 14:07:05 2020 +0000
  27. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  28. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
  29. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  30. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  31. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  32. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · Tue May 26 13:16:41 2020 +0100
  33. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · Wed Apr 22 14:05:13 2020 -0500
  34. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · Tue Apr 28 04:53:32 2020 +0100
  35. 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · Wed Oct 30 14:24:39 2019 -0500
  36. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · Fri Mar 20 14:21:05 2020 -0500
  37. 813c9f9 Fix crash dump for lower EL by Alexei Fedorov · Tue Mar 03 13:31:58 2020 +0000
  38. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  39. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  40. 787a129 Tegra: delay_timer: support for physical secure timer by Varun Wadekar · Mon Jun 18 16:15:51 2018 -0700
  41. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · Tue Nov 26 16:40:31 2019 +0000
  42. 023c155 Add support for enabling S-EL2 by Achin Gupta · Fri Oct 11 14:44:05 2019 +0100
  43. c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · Thu Sep 12 12:31:22 2019 +0000
  44. 83e0488 Add UBSAN support and handlers by Justin Chadwell · Tue Aug 20 11:01:52 2019 +0100
  45. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  46. c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · Fri Aug 23 11:26:57 2019 +0000
  47. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  48. a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · Mon Jul 29 17:22:53 2019 +0100
  49. c97455a Merge changes from topic "jts/spsr" into integration by Soby Mathew · Thu Jul 25 09:13:49 2019 +0000
  50. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · Tue Jul 23 11:12:41 2019 +0100
  51. 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · Tue Jul 23 08:55:10 2019 +0000
  52. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · Fri Jul 12 09:23:38 2019 +0100
  53. c31ab38 Aarch64: Fix SCTLR bit definitions by Alexei Fedorov · Wed Jul 10 10:49:12 2019 +0100
  54. 007d745 arch: add some defines for generic timer registers by Yann Gautier · Wed Apr 17 13:47:07 2019 +0200
  55. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  56. 37f97a5 SPM: Move shim layer to TTBR1_EL1 by Antonio Nino Diaz · Wed Mar 27 11:10:31 2019 +0000
  57. 1f9ff49 Apply variant 4 mitigation for Neoverse N1 by John Tsichritzis · Mon Mar 04 16:41:26 2019 +0000
  58. f6505a7 Merge pull request #1845 from ambroise-arm/av/errata by Antonio Niño Díaz · Fri Mar 01 09:17:27 2019 +0000
  59. 92cad35 Merge pull request #1846 from loumay-arm/lm/mpam by Antonio Niño Díaz · Fri Mar 01 09:17:16 2019 +0000
  60. bdfa103 MPAM: enable MPAM EL2 traps by Louis Mayencourt · Mon Feb 11 11:25:50 2019 +0000
  61. 23b7b69 Merge pull request #1839 from loumay-arm/lm/a7x_errata by Antonio Niño Díaz · Thu Feb 28 10:19:24 2019 +0000
  62. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · Thu Feb 21 14:16:24 2019 +0000
  63. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · Thu Jan 31 11:58:00 2019 +0000
  64. 78a0aed Add workaround for errata 764081 of Cortex-A75 by Louis Mayencourt · Wed Feb 20 12:11:41 2019 +0000
  65. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · Mon Feb 18 16:55:43 2019 +0000
  66. 7415597 lib/xlat_tables: Add support for ARMv8.4-TTST by Sathees Balya · Fri Jan 25 11:36:01 2019 +0000
  67. c326c34 xlat v2: Dynamically detect need for CnP bit by Antonio Nino Diaz · Fri Jan 11 11:20:10 2019 +0000
  68. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  69. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · Mon Dec 17 17:20:57 2018 +0000[Renamed from include/lib/aarch64/arch.h]
  70. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · Fri Jan 04 09:14:22 2019 +0000