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git01.mediatek.com / filogic / atf / f8e6c63d1ecc8966c573e8c5a62ccd17cd32475f / plat
  1. f8e6c63 Merge "corstone700: splitting the platform support into FVP and FPGA" into integration by Manish Pandey · Tue Jul 07 15:49:14 2020 +0000
  2. 95294c9 corstone700: splitting the platform support into FVP and FPGA by Abdellatif El Khlifi · Mon Jul 06 16:15:23 2020 +0100
  3. ac295aa Merge "arm_fpga: Fix MPIDR topology checks" into integration by Madhukar Pappireddy · Thu Jul 02 23:47:50 2020 +0000
  4. a5b7388 Merge changes from topic "stm32-shres" into integration by Mark Dykes · Thu Jul 02 16:11:10 2020 +0000
  5. fb167ca Merge "stm32mp1: introduce shared resources support" into integration by Mark Dykes · Thu Jul 02 16:10:12 2020 +0000
  6. bffb81e Merge "plat/arm: Add assert for the valid address of dtb information" into integration by Sandrine Bailleux · Tue Jun 30 12:12:32 2020 +0000
  7. b94bd05 Merge "stm32mp1: disable neon in sp_min" into integration by Mark Dykes · Mon Jun 29 15:59:45 2020 +0000
  8. 5f8d417 Merge "stm32mp1: check stronger the secondary CPU entry point" into integration by Mark Dykes · Mon Jun 29 15:58:23 2020 +0000
  9. 9cb29f0 plat/arm: Add assert for the valid address of dtb information by Manish V Badarkhe · Mon Jun 29 07:17:24 2020 +0100
  10. 62d401a allwinner: Disable NS access to PRCM power control registers by Samuel Holland · Sun Dec 29 16:12:12 2019 -0600
  11. 1934d51 Merge changes Ib9c82b85,Ib348e097,I4dc315e4,I58a8ce44,Iebc03361, ... into integration by Manish Pandey · Fri Jun 26 13:59:38 2020 +0000
  12. 43318de arm_fpga: Fix MPIDR topology checks by Andre Przywara · Thu Jun 25 13:10:13 2020 +0100
  13. 8717e03 plat/arm: Use only fw_config between bl2 and bl31 by Manish V Badarkhe · Sat May 30 17:40:44 2020 +0100
  14. 8d0effa Merge changes from topic "fw_config_handoff" into integration by Sandrine Bailleux · Fri Jun 26 07:06:52 2020 +0000
  15. 81200ac Merge "stm32mp1: use last page of SYSRAM as SCMI shared memory" into integration by Mark Dykes · Thu Jun 25 18:37:51 2020 +0000
  16. df6075e Merge "stm32mp1: SP_MIN embeds Arm Architecture services" into integration by Mark Dykes · Thu Jun 25 18:33:27 2020 +0000
  17. 61acf62 Merge "plat/fvp: Dynamic description of clock freq" into integration by Mark Dykes · Thu Jun 25 18:20:21 2020 +0000
  18. 38bd575 Merge "fconf: Extract Timer clock freq from HW_CONFIG dtb" into integration by Mark Dykes · Thu Jun 25 18:18:57 2020 +0000
  19. fbf1fd2 plat/arm: Increase size of firmware configuration area by Manish V Badarkhe · Tue Jun 09 11:31:17 2020 +0100
  20. 99a8e14 plat/arm: Load and populate fw_config and tb_fw_config by Manish V Badarkhe · Thu Jun 11 22:32:11 2020 +0100
  21. 9656a30 plat/fvp: Dynamic description of clock freq by laurenw-arm · Wed Jun 10 16:33:18 2020 -0500
  22. fc3e7a2 fconf: Extract Timer clock freq from HW_CONFIG dtb by laurenw-arm · Thu Feb 06 11:42:18 2020 -0600
  23. 8c66f7a plat/arm: Update the fw_config load call and populate it's information by Manish V Badarkhe · Thu Jun 11 22:09:10 2020 +0100
  24. 1da211a fconf: Clean confused naming between TB_FW and FW_CONFIG by Manish V Badarkhe · Sun May 31 10:17:59 2020 +0100
  25. 244027d tbbr/dualroot: Add fw_config image in chain of trust by Louis Mayencourt · Thu Jun 11 21:15:15 2020 +0100
  26. 64616a5 plat/arm: Rentroduce tb_fw_config device tree by Manish V Badarkhe · Sun May 31 08:53:40 2020 +0100
  27. 2396cde Fix usage of incorrect function name by Sheetal Tigadoli · Tue Jun 23 21:12:28 2020 +0530
  28. 196c2ac stm32mp1: SP_MIN embeds Arm Architecture services by Etienne Carriere · Tue Jun 23 09:26:15 2020 +0200
  29. 72369b1 stm32mp1: use last page of SYSRAM as SCMI shared memory by Etienne Carriere · Sun Dec 08 08:17:56 2019 +0100
  30. 5a0f82f stm32mp1: check stronger the secondary CPU entry point by Etienne Carriere · Mon Jun 08 20:25:08 2020 +0200
  31. ca651fb stm32mp1: disable neon in sp_min by Etienne Carriere · Fri Apr 10 18:51:54 2020 +0200
  32. 7a4a34f stm32mp1: shared resources: apply registered configuration by Etienne Carriere · Wed May 13 10:07:45 2020 +0200
  33. beb53d9 stm32mp1: shared resources: count GPIOZ bank pins by Etienne Carriere · Wed May 13 10:13:54 2020 +0200
  34. 316d634 stm32mp1: shared resources: define resource identifiers by Etienne Carriere · Mon Dec 02 10:08:48 2019 +0100
  35. 7ad2c01 stm32mp1: introduce shared resources support by Etienne Carriere · Sun Dec 08 08:14:03 2019 +0100
  36. fb272c7 Merge changes from topic "tegra-memctrlv2-vpr-resize-bugfix" into integration by Manish Pandey · Mon Jun 22 21:45:12 2020 +0000
  37. 11f5db5 Tegra: sanity check NS address and size before use by Varun Wadekar · Tue Jun 02 21:16:00 2020 -0700
  38. 841ffeb plat: marvell: armada: a8k: add OP-TEE OS MMU tables by Konstantin Porotchkin · Mon Apr 15 16:29:08 2019 +0300
  39. 2ef36a3 drivers: marvell: add support for mapping the entire LLC to SRAM by Konstantin Porotchkin · Sun Mar 31 16:58:11 2019 +0300
  40. 03f3541 plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms by Konstantin Porotchkin · Sun Mar 31 17:16:35 2019 +0300
  41. d2a19cc plat: marvell: armada: reduce memory size reserved for FIP image by Marcin Wojtas · Fri Jun 19 17:51:08 2020 +0200
  42. 5f8630b plat: marvell: armada: platform definitions cleanup by Konstantin Porotchkin · Fri Jun 19 17:48:48 2020 +0200
  43. ac2cf92 plat: marvell: armada: a8k: check CCU window state before loading MSS BL2 by Konstantin Porotchkin · Sun Mar 31 17:22:53 2019 +0300
  44. fa8c130 drivers: marvell: align and extend llc macros by Konstantin Porotchkin · Mon Mar 25 15:35:41 2019 +0200
  45. 7947359 plat: marvell: a8k: move address config of cp1/2 to BL2 by Ben Peled · Tue Mar 26 19:06:24 2019 +0200
  46. 459366b plat: marvell: armada: re-enable BL32_BASE definition by Konstantin Porotchkin · Thu Mar 14 17:24:40 2019 +0200
  47. d3d6a1c plat: marvell: a8k: extend includes to take advantage of the phy_porting_layer by Grzegorz Jaszczyk · Thu Mar 28 16:09:38 2019 +0100
  48. 95ad87c plat: marvell: armada: configure amb for all CPs by Grzegorz Jaszczyk · Fri Apr 12 12:56:07 2019 +0200
  49. 5b7c50d Tegra: introduce support for GICv3 by Varun Wadekar · Thu Jun 11 21:53:09 2020 -0700
  50. e31d083 Tegra: memctrl_v2: fixup sequence to resize video memory by Varun Wadekar · Tue Jun 02 21:08:38 2020 -0700
  51. 45f1655 plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs by Marcin Wojtas · Thu Jun 18 19:50:47 2020 +0200
  52. 46c4b14 Merge changes I80316689,I23cac4fb,If911e7de,I169ff358,I4e040cd5, ... into integration by Manish Pandey · Wed Jun 17 19:44:51 2020 +0000
  53. 6eaaec1 plat/arm: Fix load address of TB_FW_CONFIG by Manish V Badarkhe · Tue Jun 09 09:09:39 2020 +0100
  54. c14ae53 Tegra194: ras: verbose prints for SErrors by David Pu · Thu May 16 17:20:27 2019 -0700
  55. 6718842 Tegra194: SiP: clear RAS corrected error records by Varun Wadekar · Thu Mar 21 08:23:05 2019 -0700
  56. 70f6597 Tegra194: add RAS exception handling by David Pu · Mon Mar 18 15:14:49 2019 -0700
  57. 2de9a5d Merge "rockchip: rk3368: fix PLAT_RK_CLST_TO_CPUID_SHIFT" into integration by Madhukar Pappireddy · Thu Jun 11 17:51:07 2020 +0000
  58. bcac995 Merge "GICv3: GIC-600: Detect GIC-600 at runtime" into integration by Madhukar Pappireddy · Tue Jun 09 20:17:39 2020 +0000
  59. 7e067e3 rockchip: rk3368: fix PLAT_RK_CLST_TO_CPUID_SHIFT by Philipp Tomsich · Wed Jul 05 12:20:44 2017 +0200
  60. ae58772 Merge changes from topic "sp_secure_boot" into integration by Manish Pandey · Tue Jun 09 19:47:04 2020 +0000
  61. 02cc3ff plat/fvp: Add support for dynamic description of secure interrupts by Madhukar Pappireddy · Tue Jun 02 09:26:30 2020 -0500
  62. e1cc130 GICv3: GIC-600: Detect GIC-600 at runtime by Andre Przywara · Wed Mar 25 15:50:38 2020 +0000
  63. 5f8e1a0 dualroot: add chain of trust for secure partitions by Manish Pandey · Wed May 27 22:40:10 2020 +0100
  64. 883322b Merge "plat/arm: do not include export header directly" into integration by Sandrine Bailleux · Tue Jun 09 15:10:37 2020 +0000
  65. 6e74bc7 Merge "rockchip: increase FDT buffer size" into integration by Madhukar Pappireddy · Tue Jun 09 13:56:40 2020 +0000
  66. 64d2b2f plat: intel: Additional instruction required to enable global timer by Tien Hock Loh · Mon May 11 01:12:03 2020 -0700
  67. 070ffbb plat: intel: Fix CCU initialization for Agilex by Tien Hock Loh · Mon May 11 01:11:55 2020 -0700
  68. ee96cda rockchip: increase FDT buffer size by Hugh Cole-Baker · Mon Jun 08 22:24:36 2020 +0100
  69. c5baddf plat: intel: Add FPGAINTF configuration to when configuring pinmux by Tien Hock Loh · Mon May 11 01:11:48 2020 -0700
  70. fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · Mon May 11 01:11:39 2020 -0700
  71. 7a5f8da plat: intel: Fix clock configuration bugs by Tien Hock Loh · Mon May 11 01:11:23 2020 -0700
  72. f411024 plat/arm: do not include export header directly by Manish Pandey · Mon Jun 08 14:48:09 2020 +0100
  73. 04a5468 ddr: a80x0: add DDR 32-bit ECC mode support by Alex Leibovich · Sun Mar 10 16:45:02 2019 +0200
  74. 605162e ble: ap807: clean-up PLL configuration sequence by Alex Leibovich · Sun Feb 10 15:08:25 2019 +0200
  75. ed2fb47 ddr: a80x0: add DDR 32-bit mode support by Alex Leibovich · Mon Feb 25 12:24:29 2019 +0200
  76. 582fdfd plat: marvell: mci: perform mci link tuning for all mci interfaces by Grzegorz Jaszczyk · Wed Feb 06 14:16:51 2019 +0100
  77. 106eb82 plat: marvell: mci: use more meaningful name for mci link tuning by Grzegorz Jaszczyk · Thu Feb 07 15:15:14 2019 +0100
  78. e59fd0a plat: marvell: a8k: remove wrong or unnecessary comments by Grzegorz Jaszczyk · Wed Feb 06 15:58:42 2019 +0100
  79. 785ab75 plat: marvell: ap807: enable snoop filter for ap807 by Grzegorz Jaszczyk · Wed Jan 23 15:47:57 2019 +0100
  80. 02721c7 plat: marvell: ap807: update configuration space of each CP by Grzegorz Jaszczyk · Sun Jan 13 17:33:45 2019 +0200
  81. a5d0627 plat: marvell: add support for PLL 2.2GHz mode by Grzegorz Jaszczyk · Thu Dec 20 17:13:19 2018 +0100
  82. 2d3d86a plat: marvell: armada: make a8k_common.mk and mss_common.mk more generic by Grzegorz Jaszczyk · Sun Dec 09 23:11:20 2018 +0100
  83. 3039bce marvell: armada: add extra level in marvell platform hierarchy by Grzegorz Jaszczyk · Tue Nov 05 13:14:59 2019 +0100
  84. 0727b01 Merge "ti: k3: common: Make UART number configurable" into integration by Madhukar Pappireddy · Fri Jun 05 22:32:13 2020 +0000
  85. 00bff82 rockchip: rk3368: increase MAX_MMAP_REGIONS by Heiko Stuebner · Fri Jun 05 17:51:19 2020 +0200
  86. b76e198 Merge "xlat_tables_v2: add base table section name parameter for spm_mm" into integration by Lauren Wehrmeister · Thu Jun 04 18:35:30 2020 +0000
  87. a70cf19 Merge "ti: k3: common: Implement stub system_off" into integration by Manish Pandey · Wed Jun 03 22:12:38 2020 +0000
  88. 83d6461 Merge "Rename Cortex Hercules Files to Cortex A78" into integration by Madhukar Pappireddy · Wed Jun 03 19:26:08 2020 +0000
  89. cbeb7e5 qemu/qemu_sbsa: increase size to handle fdt by Masahisa Kojima · Tue May 19 19:49:36 2020 +0900
  90. 3a2e6c7 Merge changes from topic "stm32-etzpc" into integration by Manish Pandey · Wed Jun 03 15:11:43 2020 +0000
  91. e96162e plat/stm32mp1: sp_min relies on etzpc driver by Etienne Carriere · Fri Apr 10 11:32:54 2020 +0200
  92. a86fe0c marvell: a8k: enable BL31 cache by default by Marcin Wojtas · Tue Jun 02 15:12:06 2020 +0200
  93. 813b50b xlat_tables_v2: add base table section name parameter for spm_mm by Masahisa Kojima · Tue Jun 02 05:54:13 2020 +0900
  94. 7ec175e Rename Cortex Hercules Files to Cortex A78 by Jimmy Brisson · Mon Jun 01 16:49:34 2020 -0500
  95. b99c078 ti: k3: common: Make UART number configurable by Jan Kiszka · Wed May 20 07:35:48 2020 +0200
  96. f9083d5 Merge "drivers: stm32_reset adapt interface to timeout argument" into integration by Mark Dykes · Mon Jun 01 18:07:10 2020 +0000
  97. f02647a drivers: stm32_reset adapt interface to timeout argument by Etienne Carriere · Sun Dec 08 08:14:40 2019 +0100
  98. 490ace7 TF-A: Fix BL31 linker script error by Alexei Fedorov · Sat May 30 17:33:26 2020 +0100
  99. 388cc9f Merge "Fix the build error for dualroot chain of trust." into integration by Sandrine Bailleux · Thu May 28 08:06:57 2020 +0000
  100. b821ae5 Merge "plat/stm32mp1: fdt helpers for secure aware gpio bank" into integration by Mark Dykes · Wed May 27 19:34:09 2020 +0000