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cpus
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aarch32
c3b4ca1
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· Wed Aug 02 18:33:41 2017 +0100
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· Wed Aug 02 16:35:04 2017 +0100
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· Wed Aug 09 16:42:40 2017 +0100
b83e42b
CPU: Make shifted constants unsigned
by Eleanor Bonnici
· Wed Aug 09 10:36:08 2017 +0100
ac838c5
aarch32: Fix L2CTRL definition for Cortex A57 and A72
by Dimitris Papastamos
· Tue Jun 13 12:33:39 2017 +0100
9c47a5a
aarch32: Implement errata workarounds for Cortex A53
by Dimitris Papastamos
· Mon Jun 05 13:37:25 2017 +0100
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· Mon Jun 05 14:54:46 2017 -0700
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
a9f776c
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
by Yatharth Kochar
· Thu Nov 10 16:17:51 2016 +0000
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· Tue Jan 03 11:01:51 2017 +0000
441bfdd
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· Sun Dec 25 23:36:24 2016 +0900
ee5eb80
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· Fri Nov 18 12:58:28 2016 +0000
a4c219a
AArch32: Add support for ARM Cortex-A32 MPCore Processor
by Yatharth Kochar
· Tue Jul 12 15:47:03 2016 +0100
f528faf
AArch32: Common changes needed for BL1/BL2
by Yatharth Kochar
· Tue Jun 28 16:58:26 2016 +0100
748be1d
AArch32: Add support in TF libraries
by Soby Mathew
· Thu May 05 14:10:46 2016 +0100