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git01.mediatek.com / filogic / atf / e7e2afde35d51ad8be56217841d1841a4499b55f / drivers
  1. 5cb8d7c Merge changes from topic "st_fixes" into integration by Mark Dykes · Thu Oct 14 23:16:36 2021 +0200
  2. d2ebda6 Merge "fix(stm32mp1_clk): fix MPU clock rate" into integration by Mark Dykes · Thu Oct 14 22:56:25 2021 +0200
  3. 50d881e Merge "fix(stm32mp1_clk): fix MCU/AXI parent clock" into integration by Mark Dykes · Thu Oct 14 22:56:15 2021 +0200
  4. 1b93cbe Merge "refactor(stm32mp_clk): keep RCC node offset" into integration by Mark Dykes · Thu Oct 14 22:55:48 2021 +0200
  5. 9710245 Merge "fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe" into integration by Manish Pandey · Thu Oct 14 18:03:28 2021 +0200
  6. a74d963 feat(measured_boot): image hash measurement and recording in BL1 by Manish V Badarkhe · Tue Sep 14 23:12:42 2021 +0100
  7. 7ca9d65 refactor(measured boot): remove platform calls from Event Log driver by Manish V Badarkhe · Tue Sep 14 22:41:46 2021 +0100
  8. 898c099 refactor(measured boot): move BL2 measurement to platform layer by Sandrine Bailleux · Thu Jun 17 16:10:40 2021 +0200
  9. 36af1c8 refactor(measured boot): rename add_event2() by Sandrine Bailleux · Thu Jun 17 15:44:40 2021 +0200
  10. 3c2db6f build(measured boot): rename measured boot makefile by Sandrine Bailleux · Wed Jul 07 14:47:08 2021 +0200
  11. 5797b80 feat(measured boot): move init and teardown functions to platform layer by Manish V Badarkhe · Fri Aug 06 09:26:20 2021 +0100
  12. 4e9af17 refactor(measured boot): rename tpm_record_measurement() by Sandrine Bailleux · Thu Jul 01 14:13:09 2021 +0200
  13. 6e150d1 fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe by Pali Rohár · Tue Oct 12 14:53:25 2021 +0200
  14. 84bca88 fix(stpmic1): fix power switches activation by Pascal Paillet · Wed Mar 10 14:37:03 2021 +0100
  15. 328bba6 fix(stpmic1): update error cases return by Yann Gautier · Mon Mar 23 17:44:30 2020 +0100
  16. c47c816 fix(stm32mp1_clk): keep RTC clock always on by HE Shushan · Mon Jul 12 23:04:10 2021 +0200
  17. 4d19874 fix(stm32mp1_clk): fix MPU clock rate by Gabriel Fernandez · Fri Feb 28 09:09:06 2020 +0100
  18. 40c28e8 fix(stm32mp1_clk): fix MCU/AXI parent clock by Etienne Carriere · Thu Dec 19 10:03:23 2019 +0100
  19. eaab37d refactor(stm32mp_clk): keep RCC node offset by Yann Gautier · Thu Oct 22 15:37:22 2020 +0200
  20. b39a152 fix(stm32mp1_clk): set other clocks as always on by Yann Gautier · Wed Sep 16 16:41:55 2020 +0200
  21. 2f9681a Merge changes from topic "ethosn-multi-device" into integration by Madhukar Pappireddy · Tue Oct 05 22:15:40 2021 +0200
  22. 5a76116 Merge changes Ie7c0eaf2,I11d882f3,I3f173ac4,If1fa12bf,I3e3a202f, ... into integration by Manish Pandey · Tue Oct 05 16:50:23 2021 +0200
  23. 87a6382 Merge "refactor(drivers/st/clk): change fdt_get_rcc_node as static" into integration by Manish Pandey · Mon Oct 04 14:15:41 2021 +0200
  24. 8b11fc8 Merge changes I16cac81b,I6c709c0c,I69581714,I018d158f,I23146f56, ... into integration by Manish Pandey · Mon Oct 04 10:54:55 2021 +0200
  25. 5205df2 feat(drivers/arm/ethosn)!: multi-device support by Laurent Carlier · Thu Sep 16 15:10:35 2021 +0100
  26. 56f1e3e fvp_r: load, auth, and transfer from BL1 to BL33 by laurenw-arm · Wed Mar 03 14:19:38 2021 -0600
  27. a5ed1a6 Merge changes from topic "st_fixes" into integration by Madhukar Pappireddy · Thu Sep 30 16:42:56 2021 +0200
  28. 2f4d69d fix(drivers/marvell/comphy-cp110): fix error code in pcie power on by Pali Rohár · Fri Sep 24 14:43:54 2021 +0200
  29. 26a9862 fix(drivers/marvell/comphy-3700): handle failures in power functions by Pali Rohár · Thu Sep 23 14:47:18 2021 +0200
  30. c335e37 fix(drivers/marvell/comphy-3700): fix address overflow by Pali Rohár · Thu Sep 23 18:19:24 2021 +0200
  31. 58e9925 refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init() by Pali Rohár · Thu Sep 23 15:08:00 2021 +0200
  32. 15b183c refactor(drivers/marvell/comphy-3700): simplify usage of indirect access on lane2 by Pali Rohár · Thu Sep 23 14:11:25 2021 +0200
  33. 754cec9 refactor(drivers/marvell/comphy-3700): simplify usage of sata power off by Pali Rohár · Thu Sep 23 12:33:42 2021 +0200
  34. 286d81e refactor(drivers/st/clk): change fdt_get_rcc_node as static by Patrick Delaunay · Tue Oct 06 14:32:26 2020 +0200
  35. 9ee1f9c fix(stm32_console): do not skip init for crash console by Yann Gautier · Thu Sep 09 17:34:53 2021 +0200
  36. faa9bcf refactor(stm32mp1_clk): update RCC registers file by Yann Gautier · Tue Aug 31 18:23:13 2021 +0200
  37. cfa88cc fix(stm32mp1_clk): keep RTCAPB clock always on by Lionel Debieve · Mon Sep 02 18:15:45 2019 +0200
  38. 4e3a51a fix(stm32mp1_clk): fix RTC clock rating by Gabriel Fernandez · Tue Jul 27 15:39:16 2021 +0200
  39. 74aa83a fix(stm32mp1_clk): correctly manage RTC clock source by Yann Gautier · Tue Apr 06 13:41:19 2021 +0200
  40. a9ae6b1 fix(spi_nand): check correct manufacturer id by Christophe Kerello · Fri Jun 18 15:38:40 2021 +0200
  41. fc4c400 fix(spi_nand): check that parameters have been set by Christophe Kerello · Fri Jun 18 15:09:37 2021 +0200
  42. 5fc61a6 fix(drivers/tzc400): never disable filter 0 by Stas Sergeev · Thu Apr 29 22:32:10 2021 +0300
  43. 62ae542 feat(drivers/rcar3): add extra offset if booting B-side by Marek Vasut · Sun Mar 21 00:55:48 2021 +0100
  44. b54bac0 feat(plat/rcar3): modify SWDT counter setting for R-Car D3 by Toshiyuki Ogasahara · Mon Jul 12 19:22:29 2021 +0900
  45. 7176f87 feat(plat/rcar3): update DDR setting for R-Car D3 by Toshiyuki Ogasahara · Mon Jul 12 19:21:38 2021 +0900
  46. 9be13a9 feat(plat/rcar3): add process of SSCG setting for R-Car D3 by Toshiyuki Ogasahara · Mon Jul 12 19:19:39 2021 +0900
  47. 4198e75 feat(plat/rcar3): modify operation register from SYSCISR to SYSCISCR by Toshiyuki Ogasahara · Mon Jul 12 19:14:11 2021 +0900
  48. c2dfd8e feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up by Toshiyuki Ogasahara · Mon Jul 12 19:13:17 2021 +0900
  49. 8ff7987 fix(drivers/rcar3): console: fix a return value of console_rcar_init by Toshiyuki Ogasahara · Mon Jul 12 18:58:23 2021 +0900
  50. 46dff79 Merge changes from topic "gic-700-auto" into integration by André Przywara · Fri Sep 10 17:17:46 2021 +0200
  51. a56367b Merge "feat(tzc400): update filters by region" into integration by Mark Dykes · Thu Sep 09 17:49:06 2021 +0200
  52. d09845c Merge "fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode" into integration by Madhukar Pappireddy · Thu Sep 09 00:32:08 2021 +0200
  53. 7bd2336 feat(tzc400): update filters by region by Lionel Debieve · Sun Sep 27 20:48:30 2020 +0200
  54. b21886a Merge "feat(gic600ae): introduce support for Fault Management Unit" into integration by Joanna Farley · Mon Sep 06 21:00:56 2021 +0200
  55. eea6dc1 feat(gic600ae): introduce support for Fault Management Unit by Varun Wadekar · Tue May 04 16:14:09 2021 -0700
  56. f70f4b9 feat(gicv3): detect GICv4 feature at runtime by Andre Przywara · Tue May 18 15:51:06 2021 +0100
  57. 9e1dc68 feat(gicv3): multichip: detect GIC-700 at runtime by Andre Przywara · Tue May 18 15:46:58 2021 +0100
  58. daf89a7 refactor(gic): move GIC IIDR numbers by Andre Przywara · Tue Aug 24 10:02:52 2021 +0100
  59. 51974d2 fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode by Pali Rohár · Fri Aug 27 11:16:43 2021 +0200
  60. b27ac80 refactor(plat/nxp): refine api to read SVR register by Jiafei Pan · Tue Jul 20 17:14:32 2021 +0800
  61. b6c24ce refactor(gicv3): rename GIC Clayton to GIC-700 by Andre Przywara · Tue Jul 20 19:20:07 2021 +0100
  62. b2d04d0 Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration by Joanna Farley · Fri Aug 13 10:16:20 2021 +0200
  63. ff99a77 Merge changes from topic "st_fip_fconf" into integration by Manish Pandey · Fri Aug 13 00:22:55 2021 +0200
  64. 7834b46 refactor: moved drivers hdr files to include/drivers/nxp by Pankaj Gupta · Thu Mar 25 15:15:52 2021 +0530
  65. a26bf35 refactor(hw_crc32): renamed hw_crc32 to tf_crc32 by Manish V Badarkhe · Fri Jul 02 20:29:56 2021 +0100
  66. 04005b7 feat(fwu): avoid NV counter upgrade in trial run state by Manish V Badarkhe · Sun Jun 20 22:29:22 2021 +0100
  67. 7ef036f feat(fwu): add FWU driver by Manish V Badarkhe · Sun Jun 20 20:35:25 2021 +0100
  68. 6933a59 Merge "fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif" into integration by Manish Pandey · Wed Jul 28 11:29:32 2021 +0200
  69. 94e1976 fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif by Ming Huang · Fri Jun 04 16:23:22 2021 +0800
  70. 1d4a383 fix(drivers/scmi-msg): entry: add weak functions by Peng Fan · Fri Jun 11 11:16:08 2021 +0800
  71. a662df5 feat(drivers/scmi-msg): add power domain protocol by Peng Fan · Wed Jun 09 20:35:49 2021 +0800
  72. 9b9665d fix(drivers/scmi-msg): smt: fix build for aarch64 by Peng Fan · Wed Jun 09 20:33:43 2021 +0800
  73. 02a4807 feat(io_mtd): offset management for FIP usage by Lionel Debieve · Fri Jul 17 12:35:30 2020 +0200
  74. 0970414 feat(nand): count bad blocks before a given offset by Yann Gautier · Wed Aug 05 14:39:00 2020 +0200
  75. debafb8 feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB by Toshiyuki Ogasahara · Mon Nov 30 14:52:19 2020 +0900
  76. 62e19ac feat(drivers/rcar3): ddr: add function to judge a DDR rank by Toshiyuki Ogasahara · Tue Dec 08 16:14:56 2020 +0900
  77. 750b5c9 fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N by Chiaki Fujii · Fri Oct 30 10:45:18 2020 +0900
  78. 6552f64 fix(drivers/rcar3): i2c_dvfs: fix I2C operation by Toshiyuki Ogasahara · Mon Nov 30 20:42:27 2020 +0900
  79. 7762658 fix(drivers/rcar3): fix CPG registers redefinition by Toshiyuki Ogasahara · Mon Nov 30 20:39:21 2020 +0900
  80. 594919f fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition by Toshiyuki Ogasahara · Mon Nov 30 20:36:09 2020 +0900
  81. 74b8e17 refactor(measured boot): revisit error handling (3/3) by Sandrine Bailleux · Wed Jun 23 15:44:18 2021 +0200
  82. 9ebe81e refactor(measured boot): revisit error handling (2/3) by Sandrine Bailleux · Wed Jun 23 15:43:02 2021 +0200
  83. 7225e62 refactor(measured boot): revisit error handling (1/3) by Sandrine Bailleux · Wed Jun 23 15:15:19 2021 +0200
  84. be76143 style(measured boot): fix incorrect indentation by Sandrine Bailleux · Wed Jun 23 10:40:08 2021 +0200
  85. 0b2b045 Merge changes from topic "st_fixes" into integration by Mark Dykes · Thu Jul 01 17:23:30 2021 +0200
  86. e80a81d Merge "fix(drivers/mtd): macronix quad enable bit issue" into integration by Mark Dykes · Thu Jul 01 17:21:07 2021 +0200
  87. d28d41b refactor(measured boot): remove weak definition of plat_get_measured_boot_data() by Sandrine Bailleux · Thu Jun 17 17:18:39 2021 +0200
  88. 9fe78b5 Merge "fix(drivers/mtd): fix MISRA issues and logic improvement" into integration by Mark Dykes · Mon Jun 28 22:15:02 2021 +0200
  89. 82a9881 Merge "style(scmi_common): add \n to warning messages" into integration by Mark Dykes · Mon Jun 28 21:59:41 2021 +0200
  90. 9f3dd1a fix(drivers/mtd): macronix quad enable bit issue by Lionel Debieve · Tue Nov 24 11:44:52 2020 +0100
  91. d9ed336 fix(drivers/mtd): fix MISRA issues and logic improvement by Lionel Debieve · Tue Nov 24 11:46:42 2020 +0100
  92. 72ceb35 fix(drivers/st/pmic): missing error check by Nicolas Le Bayon · Tue Mar 10 18:18:45 2020 +0100
  93. 53ee7d3 fix(drivers/st/pmic): initialize i2c_state by Benjamin Gaignard · Mon Feb 24 13:57:40 2020 +0100
  94. 360e0e9 fix(drivers/st/clk): use correct return value by Yann Gautier · Wed Sep 16 16:40:34 2020 +0200
  95. 4d479e2 Merge changes from topic "io_stm32image" into integration by Madhukar Pappireddy · Fri Jun 18 15:40:20 2021 +0200
  96. 79bc7a7 refactor(gicv3): use helper functions to get SPI/ESPI INTID limit by Heyi Guo · Wed Jan 20 19:05:51 2021 +0800
  97. 60ce825 refactor(gicv3): add helper function to get the limit of ESPI INTID by Heyi Guo · Wed Jan 20 18:50:16 2021 +0800
  98. 9e28499 style(scmi_common): add \n to warning messages by Heyi Guo · Tue Jun 08 19:59:53 2021 +0800
  99. 06f85b4 refactor(gicv3): add helper function to get the limit of SPI INTID by Heyi Guo · Wed Jan 20 18:50:16 2021 +0800
  100. 89f465e Merge changes I85a87dc9,If75df769,I55b0c910 into integration by Madhukar Pappireddy · Mon Jun 07 18:21:16 2021 +0200